Hi,
On 2020-06-25 23:34, Nitesh Narayan Lal wrote:
From: Alex Belits
The current implementation of cpumask_local_spread() does not respect the
isolated CPUs, i.e., even if a CPU has been isolated for Real-Time task,
it will return it to the caller for pinning of its IRQ threads. Having
these
From: Stefan Chulski
This patch add ethtool flow control configuration support.
Tx flow control retrieved correctly by ethtool get function.
FW per port ethtool configuration capability added.
Patch also takes care about mtu change procedure, if PPv2 switch
BM pools during mtu change.
From: Stefan Chulski
This patch fix GMAC TX flow control autoneg.
Flow control autoneg wrongly were disabled with enabled TX
flow control.
Signed-off-by: Stefan Chulski
---
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
SAMA7G5 supports slew rate configuration. Adapt the driver for this.
For output switching frequencies lower than 50MHz the slew rate needs to
be enabled. Since most of the pins on SAMA7G5 fall into this category
enabled the slew rate by default.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic
From: Stefan Chulski
New FIFO flow control feature were added in PPv23.
PPv2 FIFO polled by HW and trigger pause frame if FIFO
fill level is below threshold.
FIFO HW flow control enabled with CM3 RXQ flow
control with ethtool.
Current FIFO thresholds is:
9KB for port with maximum speed 10Gb/s
From: Stefan Chulski
Feature double size of BPPI by decreasing number of pools from 16 to 8.
Increasing of BPPI size protect BM drop from BPPI underrun.
Underrun could occurred due to stress on DDR and as result slow buffer
transition from BPPE to BPPI.
New BPPI threshold recommended by spec is:
Hi,
On Fri 15 Jan 21, 18:58, Paul Kocialkowski wrote:
> The DE2 display engine hardware takes physical addresses that do not
> need PHYS_BASE subtracted. As a result, they should not be present
> on the mbus driver match list. Remove them.
>
> This was tested on the A83T, along with the patch
On 2021-01-27 12:31, Jianjun Wang wrote:
On Tue, 2021-01-26 at 13:57 +, Marc Zyngier wrote:
On 2021-01-13 11:39, Jianjun Wang wrote:
> Add MSI support for MediaTek Gen3 PCIe controller.
>
> This PCIe controller supports up to 256 MSI vectors, the MSI hardware
> block diagram is as follows:
Hello Nikita,
On Wed, 2021-01-27 at 13:46 +0300, Nikita Shubin wrote:
> - replace plain numbers with girq->num_parents in devm_kcalloc
> - replace plain numbers with ARRAY_SIZE(girq->parents) for port F
> - refactor i - 1 to i + 1 to make loop more readable
> - combine getting IRQ's loop and
On Wed, 27 Jan 2021 at 14:21, Mel Gorman wrote:
>
> On Wed, Jan 27, 2021 at 02:07:50PM +0100, Vincent Guittot wrote:
> > > @@ -6162,18 +6162,16 @@ static int select_idle_cpu(struct task_struct *p,
> > > struct sched_domain *sd, int t
> > >
> > > for_each_cpu_wrap(cpu, cpus, target) {
> >
On Wed, Jan 27, 2021 at 01:15:49PM +0530, Hariprasad Kelam wrote:
> From: Christina Jacob
>
> CGX LMAC, the physical interface support link configuration parameters
> like speed, auto negotiation, duplex etc. Firmware saves these into
> memory region shared between firmware and this driver.
>
On Wed, 27 Jan 2021 02:46:10 +
Jianlin Lv wrote:
>
>
> > -Original Message-
> > From: Masami Hiramatsu
> > Sent: Wednesday, January 27, 2021 10:02 AM
> > To: Oleg Nesterov
> > Cc: Steven Rostedt ; Jianlin Lv ;
> > mi...@redhat.com; linux-kernel@vger.kernel.org
> > Subject: Re:
From: zhangxuezhi
For st7789v ic,when we need continuous full screen refresh, it is best to
wait for the TE signal arrive to avoid screen tearing
Signed-off-by: zhangxuezhi
---
v11: remove devm_gpio_put and change a dev_err to dev_info
v10: additional notes
v9: change pr_* to dev_*
v8: delete
On Thu, Jan 14, 2021 at 07:07:47PM +0200, Ioana Ciornei wrote:
> From: Ioana Ciornei
>
> This patch set adds userspace support in the fsl-mc bus along with a
> rescan attribute to the root DPRC container. An earlier discussion on
> this functionality can be found at the link below. I didn't
On Mon, 25 Jan 2021 21:40:08 -0800, mgr...@linux.intel.com wrote:
> From: Paul Murphy
>
> Add DT bindings documentation for the Keem Bay VPU IPC driver.
>
> Cc: Rob Herring
> Cc: devicet...@vger.kernel.org
> Reviewed-by: Mark Gross
> Signed-off-by: Paul Murphy
> Co-developed-by: Daniele
> -Original Message-
> From: Greg KH
> Sent: Wednesday, January 27, 2021 7:29 AM
> To: Chen, Mike Ximing
> Cc: linux-kernel@vger.kernel.org; a...@arndb.de; Williams, Dan J
> ; pierre-louis.boss...@linux.intel.com; Gage Eads
>
> Subject: Re: [PATCH v9 04/20] dlb: add device ioctl layer
On Mon, 25 Jan 2021 21:40:19 -0800, mgr...@linux.intel.com wrote:
> From: Seamus Kelly
>
> Add device tree bindings for the xLink IPC driver which enables xLink to
> control and communicate with the VPU IP present on the Intel Keem Bay
> SoC.
>
> Cc: Rob Herring
> Cc:
On Mon, 25 Jan 2021 21:40:21 -0800, mgr...@linux.intel.com wrote:
> From: Seamus Kelly
>
> Add device tree bindings for keembay-xlink.
>
> Cc: Rob Herring
> Cc: devicet...@vger.kernel.org
> Reviewed-by: Mark Gross
> Signed-off-by: Seamus Kelly
> Signed-off-by: Ryan Carnaghi
> ---
>
On Tue, 26 Jan 2021 14:04:08 +, NÃcolas F. R. A. Prado wrote:
> Add devicetree binding for QCOM SPMI Flash LEDs, which are part of
> PM8941, and are used both as lantern and camera flash.
>
> Signed-off-by: NÃcolas F. R. A. Prado
> ---
> Changes in v2:
> - Add this commit
>
>
On Wed, Jan 27, 2021 at 12:03:53AM +0530, Anant Thazhemadam wrote:
> The newer usb_control_msg_{send|recv}() API are an improvement on the
> existing usb_control_msg() as it ensures that a short read/write is treated
Short write has always been an error (I won't repeat for the remaining
patches).
On Wed, 27 Jan 2021 14:51:55 +0100
Greg KH wrote:
> On Wed, Jan 27, 2021 at 09:42:52PM +0800, Carlis wrote:
> > From: zhangxuezhi
> >
> > For st7789v ic,when we need continuous full screen refresh, it is
> > best to wait for the TE signal arrive to avoid screen tearing
> >
> > Signed-off-by:
On 27.01.21 г. 15:57 ч., Michal Rostecki wrote:
> From: Michal Rostecki
>
> Before this change, the btrfs_get_io_geometry() function was calling
> btrfs_get_chunk_map() to get the extent mapping, necessary for
> calculating the I/O geometry. It was using that extent mapping only
> internally
On Wed, Jan 27, 2021 at 10:02:29PM +0800, Carlis wrote:
> From: zhangxuezhi
>
> For st7789v ic,when we need continuous full screen refresh, it is best to
> wait for the TE signal arrive to avoid screen tearing
>
> Signed-off-by: zhangxuezhi
Again, slow down, and wait for comments before
Hello,
On Tue, Jan 26, 2021 at 05:11:59PM -0800, Vipin Sharma wrote:
> Sounds good, we can have a single top level stat file
>
> misc.stat
> Shows how many are supported on the host:
> $ cat misc.stat
> sev 500
> sev_es 10
>
> If total value of some resource is 0 then it will be
Il 27/01/21 13:56, Matti Vaittinen ha scritto:
Hello Mark,
Hey Matti, hey Mark!
Nice to hear from you. :)
On Wed, 2021-01-27 at 12:27 +, Mark Brown wrote:
On Wed, Jan 27, 2021 at 12:01:55PM +, Vaittinen, Matti wrote:
Anyways - I was wondering if this is common thing amongst many
Hello, Baolin.
On Tue, Jan 26, 2021 at 09:33:25PM +0800, Baolin Wang wrote:
> On !PREEMPT kernel, we can get below softlockup when doing stress
> testing with creating and destroying block cgroup repeatly. The
> reason is it may take a long time to acquire the queue's lock in
> the loop of
On Wed, Jan 27, 2021 at 09:44:50AM +0200, Maxim Mikityanskiy wrote:
> On Wed, Jan 27, 2021 at 6:23 AM Bart Van Assche wrote:
> >
> > On 1/26/21 11:59 AM, Maxim Mikityanskiy wrote:
> > > The cited commit introduced a serious regression with SATA write speed,
> > > as found by bisecting. This patch
Willem de Bruijn writes:
> On Wed, Jan 27, 2021 at 5:23 AM Emil Renner Berthing wrote:
>>
>> In commit d3ccc14dfe95 most of the tasklets in this driver was
>> updated to the new API. However for the rx_work_tasklet only the
>> type of the callback was changed from
>> void
On Wed, Jan 27, 2021 at 05:12:10PM +0200, Avri Altman wrote:
> We will use it later, when we'll need to differentiate between device
> and host control modes.
>
> Signed-off-by: Avri Altman
> ---
> drivers/scsi/ufs/ufshpb.c | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
>
On Wed, Jan 27, 2021 at 05:12:11PM +0200, Avri Altman wrote:
> There are some limitations to activations / inactivations in host
> control mode - Add those.
I can not understand this changelog text, please make it more
descriptive as I have no way to know how to review this patch :(
thanks,
Hi Nishanth,
On 27/01/21 8:44 pm, Nishanth Menon wrote:
> On 20:38-20210127, Aswath Govindraju wrote:
>> The following speed modes are now supported in J7200 SoC,
>> - HS200 and HS400 modes at 1.8 V card voltage, in MMCSD0 subsystem [1].
>> - UHS-I speed modes in MMCSD1 sub
On Wed, Jan 27, 2021 at 05:12:12PM +0200, Avri Altman wrote:
> In host control mode, reads are the major source of activation trials.
> Keep track of those reads counters, for both active as well inactive
> regions.
>
> We reset the read counter upon write - we are only interested in "clean"
>
On Wed, 27 Jan 2021 at 16:20, Kalle Valo wrote:
>
> Willem de Bruijn writes:
>
> > On Wed, Jan 27, 2021 at 5:23 AM Emil Renner Berthing
> > wrote:
> >>
> >> In commit d3ccc14dfe95 most of the tasklets in this driver was
> >> updated to the new API. However for the rx_work_tasklet only the
> >>
Hi Andrey
On Tue, 26 Jan 2021 at 15:55, Andrey Konovalov
wrote:
>
> Hi Dave,
>
> On 26.01.2021 16:01, Dave Stevenson wrote:
> > Hi Andrey
> >
> > On Tue, 26 Jan 2021 at 07:50, Andrey Konovalov
> > wrote:
> >>
> >> This control is needed for imx219 driver, as the link frequency
> >> is
On Wed, Jan 27, 2021 at 05:12:16PM +0200, Avri Altman wrote:
> In order not to hang on to “cold” regions, we shall inactivate a
> region that has no READ access for a predefined amount of time -
> READ_TO_MS. For that purpose we shall monitor the active regions list,
> polling it on every
We will use it later, when we'll need to differentiate between device
and host control modes.
Signed-off-by: Avri Altman
---
drivers/scsi/ufs/ufshpb.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/scsi/ufs/ufshpb.c b/drivers/scsi/ufs/ufshpb.c
index
On Wed, Jan 27, 2021 at 05:03:12AM +, Bharat Kumar Gogada wrote:
> > On Thu, Jan 21, 2021 at 03:29:16PM +0530, Bharat Kumar Gogada wrote:
> Here is the CCI spec
> https://developer.arm.com/documentation/ddi0470/k/preface
I'm sure it was obvious, but please include this in the commit log as
> > You can devmem 0xF2400240(Device ID Status Register).
> > #define A8040_B0_DEVICE_ID 0x8045
> > #define A8040_AX_DEVICE_ID 0x8040
> > #define A7040_B0_DEVICE_ID 0x7045
> > #define A7040_AX_DEVICE_ID 0x7040
> > #define A3900_A1_DEVICE_ID 0x6025
> > #define
No need of BCLK state maintenance from driver side as
clock_enable and clk_disable API's maintaing state counter.
One of the major issue was spotted when Headset jack inserted
while playback continues, due to same PCM device node opens twice
for playaback/capture and closes once for capture and
On Wed, Jan 27, 2021 at 03:31:17PM +0100, Bartosz Golaszewski wrote:
> On Wed, Jan 27, 2021 at 3:22 PM Greg Kroah-Hartman
> wrote:
> >
> > On Fri, Jan 22, 2021 at 11:35:59AM -0800, Saravana Kannan wrote:
> > > There are multiple instances of GPIO device tree nodes of the form:
> > >
> > > foo {
>
On Wed, Jan 27, 2021 at 12:03:58AM +0530, Anant Thazhemadam wrote:
> The newer usb_control_msg_{send|recv}() API are an improvement on the
> existing usb_control_msg() as it ensures that a short read/write is treated
> as an error, data can be used off the stack, and raw usb pipes need not be
>
Commit cca079ef8ac29a7c02192d2bad2ffe4c0c5ffdd0 makes sparc32 use
memblocks instead of the previous bootmem solution. Unfortunately, due
to this:
#define PAGE_OFFSET 0xf000
#define __va(x) ((void *)((unsigned long) (x) - phys_base +
PAGE_OFFSET))
#define phys_to_virt __va
it
From: Lai Jiangshan
When X86_BUG_CPU_MELTDOWN & KPTI, cpu_current_top_of_stack lives in the
TSS which is also in the user CR3 and it becomes a coveted fruit. An
attacker can fetch the kernel stack top from it and continue next steps
of actions based on the kernel stack.
The address might not
On Wed, Jan 27, 2021 at 05:49:46PM +0300, Dan Carpenter wrote:
> On Wed, Jan 27, 2021 at 03:25:20PM +0100, Greg KH wrote:
> > On Wed, Jan 27, 2021 at 10:17:08PM +0800, carlis wrote:
> > > On Wed, 27 Jan 2021 15:13:05 +0100
> > > Greg KH wrote:
> > >
> > > > On Wed, Jan 27, 2021 at 10:08:09PM
From: Lai Jiangshan
TSS_entry2task_stack is used to refer to tss.sp1 which is stored the value
of thread.sp0.
At the code where TSS_entry2task_stack is used in sysenter, the CR3 is
already kernel CR3 and kernel segments is loaded.
So that we can directly use percpu for it instead of
From: Lai Jiangshan
Prepare for using percpu and removing TSS_entry2task_stack
Signed-off-by: Lai Jiangshan
---
arch/x86/entry/entry_32.S | 22 +-
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
index
From: Lai Jiangshan
sp1 is not used by hardware and is used as thread.sp0. We should just
use new percpu variable.
And remove unneeded TSS_sp1.
Signed-off-by: Lai Jiangshan
---
arch/x86/entry/entry_32.S| 6 +++---
arch/x86/include/asm/processor.h | 2 ++
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 867157311dc8..ecd988b4a838 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -7788,6 +7788,8 @@ F:include/linux/freezer.h
> F: include/linux/pm.h
> F: include/linux/suspend.h
> F: kernel/power/
> +F:
On Wed, 27 Jan 2021 09:23:04 -0500
Matthew Rosato wrote:
> On 1/26/21 6:18 PM, Alex Williamson wrote:
> > On Mon, 25 Jan 2021 09:40:38 -0500
> > Matthew Rosato wrote:
> >
> >> On 1/22/21 6:48 PM, Alex Williamson wrote:
> >>> On Tue, 19 Jan 2021 15:02:30 -0500
> >>> Matthew Rosato wrote:
>
On Wed, Jan 27, 2021 at 02:37:34PM +, Stefan Chulski wrote:
> Your mcbin-ss is A8K AX or A8K B0? On AX revisions we do not have FC support
> in firmware.
How do I tell? I don't want to remove the heatsink, and I don't see
anything in MV-S88-00E. I didn't grab a copy of the Errata before
On Fri, Jan 22, 2021 at 11:27:16AM -0800, Elliot Berman wrote:
> This series was developed after discussion in
> https://lkml.org/lkml/2021/1/19/850
>
> The motivation for this series is an out-of-tree module which contains a large
> number of source files. This causes Kbuild to exceed the
From: Lai Jiangshan
Like the way x86_64 uses the "old" stack, we can save the entry stack
pointer to a register and switch to the task stack. So that we have
space on the "old" stack to save more things or scratch registers.
Signed-off-by: Lai Jiangshan
---
arch/x86/entry/entry_32.S | 11
From: Lai Jiangshan
TSS_entry2task_stack is used to refer to tss.sp1 which is stored the value
of thread.sp0.
At the code where TSS_entry2task_stack is used in SWITCH_TO_KERNEL_STACK,
the CR3 is already kernel CR3 and kernel segments is loaded.
So we can directly use the percpu to get
Hi Sai,
On 27-01-21, 18:37, Sai Prakash Ranjan wrote:
> Hi Vinod,
>
> On 2021-01-27 18:00, Vinod Koul wrote:
> > + timer {
> > + compatible = "arm,armv8-timer";
> > + interrupts = > IRQ_TYPE_LEVEL_LOW)>,
> > + > IRQ_TYPE_LEVEL_LOW)>,
> > +
On Wed, Jan 27, 2021 at 12:29:08AM +0100, Ricardo Ribalda wrote:
> - Is there any platform where dma_alloc_noncontiguos can fail?
> This is, !ops->alloc_noncontiguous and !dev->coherent_dma_mask
> If yes then we need to add a function to let the driver know in
> advance that it has to use the
Hi David,
On 27.01.2021 18:25, Dave Stevenson wrote:
Hi Andrey
On Tue, 26 Jan 2021 at 15:55, Andrey Konovalov
wrote:
Hi Dave,
On 26.01.2021 16:01, Dave Stevenson wrote:
Hi Andrey
On Tue, 26 Jan 2021 at 07:50, Andrey Konovalov
wrote:
This control is needed for imx219 driver, as the
From: Bjorn Helgaas
This reverts commit 4257f7e008ea394fcecc050f1569c3503b8bcc15.
Kenneth reported that after 4257f7e008ea, he sees a torrent of disk I/O
errors on his NVMe device, and possibly other devices, until a reboot.
Link:
On Wed, 27 Jan 2021, Bjorn Helgaas wrote:
> Do you have a URL for your initial report that I could include in the
> revert commit log?
I don't, as I'd emailed the committers first and that was then CCed to the
mailing list, but here's what I'd sent:
Date: Fri, 25 Dec 2020 16:38:56
From:
On Wed, Jan 27, 2021 at 12:27:09PM +0100, Peter Zijlstra wrote:
> On Wed, Jan 27, 2021 at 10:13:47AM +0100, Peter Zijlstra wrote:
> > On Tue, Jan 26, 2021 at 05:57:30PM -0600, Josh Poimboeuf wrote:
>
> > > Well, I hate it, but I'm not sure I have any better ideas. It should be
> > > possible to
On Wed, 27 Jan 2021 at 16:33, Kalle Valo wrote:
> ...
> Forgot to mention that I can remove the Fixes tags during commit, so no
> need to resend just because of those.
Cool, thanks.
> > I can definitely see how you can reasonably disagree, but I would not
> > be comfortable having code that
On Wed, 27 Jan 2021, Bjorn Helgaas wrote:
> > Any new news on this? Disabling "tlp" (which just shifts the problem around
> > on my machine) shouldn't be a solution for this issue.
>
> Agreed; disabling "tlp" is a workaround but not a solution.
Actually, disabling "tlp" doesn't fix the issue;
On Tue, Jan 26, 2021 at 08:50:02AM +0800, brookxu wrote:
>
> trace point, eBPF and other hook technologies are better for production
> environments. But for pure debugging work, adding hook points feels a bit
> heavy. However, your suggestion is very valuable, thank you very much.
What feels
Hi Cristian,
On Tue, 12 Jan 2021 at 20:20, Cristian Marussi wrote:
>
> Hi all,
>
> The current SCMI implementation does not provide an interface to easily
> develop and include a custom vendor protocol implementation as prescribed
> by the SCMI standard, also because, there is not currently any
From: Ard Biesheuvel
commit 7bc1a0f9e1765830e945669c99c59c35cf9bca82 upstream.
On arm64, the global variable memstart_addr represents the physical
address of PAGE_OFFSET, and so physical to virtual translations or
vice versa used to come down to simple additions or subtractions
involving the
On Wed, 27 Jan 2021, Andy Shevchenko wrote:
> On Wednesday, January 27, 2021, Lee Jones wrote:
>
> > Fixes the following W=1 kernel build warning(s):
> >
> > drivers/thunderbolt/dma_port.c: In function ‘dma_port_flash_write_block’:
> > drivers/thunderbolt/dma_port.c:331:6: warning: variable
On Wed, Jan 27, 2021 at 09:59:14AM -0600, Josh Poimboeuf wrote:
> On Wed, Jan 27, 2021 at 12:27:09PM +0100, Peter Zijlstra wrote:
> > On Wed, Jan 27, 2021 at 10:13:47AM +0100, Peter Zijlstra wrote:
> > > On Tue, Jan 26, 2021 at 05:57:30PM -0600, Josh Poimboeuf wrote:
> >
> > > > Well, I hate it,
From: Stefan Berger
Detect whether a key is an sm2 type of key by its OID in the parameters
array rather than assuming that everything under OID_id_ecPublicKey
is sm2, which is not the case.
Signed-off-by: Stefan Berger
---
crypto/asymmetric_keys/x509_cert_parser.c | 13 -
1 file
From: Stefan Berger
This patch adds support for parsing of x509 certificates that contain
NIST P256 keys that have been signed by a CA using any of the current SHA
hash algorithms. Since self-signed certificates are verified, the ecc math
for signature verification is also added.
Signed-off-by:
On Tue, 2021-01-26 at 13:57 +, Marc Zyngier wrote:
> On 2021-01-13 11:39, Jianjun Wang wrote:
> > Add MSI support for MediaTek Gen3 PCIe controller.
> >
> > This PCIe controller supports up to 256 MSI vectors, the MSI hardware
> > block diagram is as follows:
> >
> >
From: Stefan Berger
This series of patches adds support for x509 certificates signed by a CA
that uses NIST p256 or p192 keys for signing. It also adds support for
certificates where the public key is a NIST p256 or p192 key. The math
for ECDSA signature verification is also added.
Since
From: Stefan Berger
Add support for NIST p192 keys in x509 certificates and support it in
'akcipher'.
Signed-off-by: Stefan Berger
---
crypto/asymmetric_keys/public_key.c | 3 ++
crypto/asymmetric_keys/x509_cert_parser.c | 1 +
crypto/ecc.c | 36
Hi Steen,
On 15/01/21 9:44 pm, Steen Hegelund wrote:
> Hi Kishon,
>
> On Fri, 2021-01-15 at 21:22 +0530, Kishon Vijay Abraham I wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you
>> know the content is safe
>>
>> Hi,
>>
>> On 07/01/21 2:49 pm, Steen Hegelund wrote:
>>>
Add basic devicetree support for Qualcomm Technologies, Inc SM8350 SoC.
This adds gcc, pinctrl, reserved memory, uart, cpu nodes for this SoC.
Signed-off-by: Vinod Koul
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 499 +++
1 file changed, 499 insertions(+)
create mode
Add compatible for SM8150 and SM8350 SoCs.
Signed-off-by: Vinod Koul
---
Documentation/devicetree/bindings/firmware/qcom,scm.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt
Add basic devicetree support for Qualcomm Technologies, Inc SM8350 SoC
MTP board. This enabled uart node and adds rpmh-regulators present for
this board.
Signed-off-by: Vinod Koul
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/sm8350-mtp.dts | 250
Kryo685 is found in SM8350, so add it to the list of cpu compatibles
Signed-off-by: Vinod Koul
---
Documentation/devicetree/bindings/arm/cpus.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml
On Thu, Jan 21, 2021 at 10:28:16AM +, Catangiu, Adrian Costin wrote:
> On 12/01/2021, 14:49, "Michael S. Tsirkin" wrote:
>
> On Tue, Jan 12, 2021 at 02:15:58PM +0200, Adrian Catangiu wrote:
> > The first patch in the set implements a device driver which exposes a
> > read-only
On Sat, Jan 23, 2021 at 02:29:56PM +, Paul Cercueil wrote:
> Add a 'auto_boot' module parameter that instructs the remoteproc driver
> whether or not it should auto-boot the remote processor, which will
> default to "false", since the VPU in Ingenic SoCs does not really have
> any
The commit 41b14fb8724d ("net: Do not clear the sock TX queue in
sk_set_socket()") removes sk_tx_queue_clear() from sk_set_socket() and adds
it instead in sk_alloc() and sk_clone_lock() to fix an issue introduced in
the commit e022f0b4a03f ("net: Introduce sk_tx_queue_mapping"). However,
the
Hi Vinod,
On 2021-01-27 18:00, Vinod Koul wrote:
Add basic devicetree support for Qualcomm Technologies, Inc SM8350 SoC.
This adds gcc, pinctrl, reserved memory, uart, cpu nodes for this SoC.
Signed-off-by: Vinod Koul
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 499 +++
On Wed, 27 Jan 2021 at 13:02, Mel Gorman wrote:
>
> On Wed, Jan 27, 2021 at 11:43:22AM +0100, Vincent Guittot wrote:
> > > @@ -6149,18 +6161,31 @@ static int select_idle_cpu(struct task_struct *p,
> > > struct sched_domain *sd, int t
> > > }
> > >
> > > for_each_cpu_wrap(cpu,
On 26/01/2021 23.48, Alexandre Belloni wrote:
> On 21/12/2020 22:17:54+0100, Rasmus Villemoes wrote:
>> On 19/12/2020 02.34, Alexandre Belloni wrote:
>>> pcf2127, pcf2129 and pca2129 support start-year and reset-source.
>>>
>>
>> No, the 2129 variant doesn't even have a reset output pin. Not sure
From: Bongsu Jeon
1/2 is the Virtual NCI device driver.
2/2 is the NCI selftest suite
v4:
1/2
- flip the condition for the ioctl.
- refactor some code.
- remove the unused function after refactoring.
v3:
1/2
- change the Kconfig help comment.
- remove the mutex init code.
- remove the
Stefan Berger wrote:
> k=$(keyctrl newring test @u)
keyctl - but I can fix that.
David
On Wed, 2021-01-27 at 01:57 +0530, Dwaipayan Ray wrote:
> On Wed, Jan 27, 2021 at 1:41 AM Joe Perches wrote:
> > On Wed, 2021-01-27 at 00:05 +0530, Dwaipayan Ray wrote:
> > > Add a new verbose mode to checkpatch.pl to emit additional verbose
> > > test descriptions.
> > >
> > > The verbose mode
On Sat, Jan 23, 2021 at 10:47:39PM +0100, Emil Renner Berthing wrote:
> This converts the keyboard_tasklet to use the new API in
> commit 12cc923f1ccc ("tasklet: Introduce new initialization API")
>
> The new API changes the argument passed to the callback function, but
> fortunately the argument
Stefan Berger wrote:
> This series of patches adds support for x509 certificates signed by a CA
> that uses NIST p256 or p192 keys for signing. It also adds support for
> certificates where the public key is a NIST p256 or p192 key. The math
> for ECDSA signature verification is also added.
>
>
On 1/26/21 6:18 PM, Alex Williamson wrote:
On Mon, 25 Jan 2021 09:40:38 -0500
Matthew Rosato wrote:
On 1/22/21 6:48 PM, Alex Williamson wrote:
On Tue, 19 Jan 2021 15:02:30 -0500
Matthew Rosato wrote:
Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
specific
On Fri, Jan 22, 2021 at 11:35:59AM -0800, Saravana Kannan wrote:
> There are multiple instances of GPIO device tree nodes of the form:
>
> foo {
> compatible = "acme,foo";
> ...
>
> gpio0: gpio0@ {
> compatible = "acme,bar";
> ...
>
On 27/01/2021 03:51, menglong8.d...@gmail.com wrote:
> From: Menglong Dong
>
> The 'r' in dsi_vc_send_short() is of type 'unsigned int', so the
> 'r < 0' can't be true.
>
> Fix this by introducing a 'err' of type 'int' insteaded.
>
> Fixes: 1ed6253856cb ("drm/omap: dsi: switch
On Wed, Jan 27, 2021 at 10:17:08PM +0800, carlis wrote:
> On Wed, 27 Jan 2021 15:13:05 +0100
> Greg KH wrote:
>
> > On Wed, Jan 27, 2021 at 10:08:09PM +0800, carlis wrote:
> > > On Wed, 27 Jan 2021 14:51:55 +0100
> > > Greg KH wrote:
> > >
> > > > On Wed, Jan 27, 2021 at 09:42:52PM +0800,
On 27/01/2021 13:59, Jürgen Groß wrote:
> On 27.01.21 12:23, Andrew Cooper wrote:
>> On 27/01/2021 10:26, Jürgen Groß wrote:
>>> On 27.01.21 10:43, Andrew Cooper wrote:
On 27/01/2021 09:38, Juergen Gross wrote:
> diff --git a/arch/x86/xen/enlighten_pv.c
> b/arch/x86/xen/enlighten_pv.c
On Wed, Jan 27, 2021 at 09:24:56PM +0900, Misono Tomohiro wrote:
> commit a7e1f67ed29f ("x86/msr: Filter MSR writes") introduces a
> module parameter to disable writing to msr device file (and add_taint()
> upon writing). As msr register can be written by X86_IOC_WRMSR_REGS
> ioctl too, they
On Wed, 27 Jan 2021 18:08:34 +1100
Alexey Kardashevskiy wrote:
>
> I am running syzkaller and the kernel keeps crashing in
> __traceiter_##_name. This patch makes these crashes happen lot less
I have another solution to the above issue. But I'm now concerned with what
you write below.
>
On Wed, Jan 27, 2021 at 6:05 AM Abaci Team
wrote:
>
> Fix the following coccicheck warnings:
>
> ./drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.c:
> 1876:11-13: WARNING: possible condition with no effect (if == else).
>
> Reported-by: Abaci Robot
> Suggested-by: Jiapeng Zhong
On Wed, Jan 27, 2021 at 1:50 PM Kuniyuki Iwashima wrote:
>
> The commit 41b14fb8724d ("net: Do not clear the sock TX queue in
> sk_set_socket()") removes sk_tx_queue_clear() from sk_set_socket() and adds
> it instead in sk_alloc() and sk_clone_lock() to fix an issue introduced in
> the commit
Enable camss & ov8856 DT nodes.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index
Add regulator to camss device tree node.
Signed-off-by: Robert Foss
---
arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index a943b3f353ce..5842ab65789c
On 1/27/21 3:11 AM, Abaci Team wrote:
Fix the following coccicheck warnings:
./fs/btrfs/delayed-inode.c:1157:39-41: WARNING !A || A && B is
equivalent to !A || B.
Reported-by: Abaci Robot
Suggested-by: Jiapeng Zhong
Signed-off-by: Abaci Team
Reviewed-by: Josef Bacik
Thanks,
Josef
On 27/01/2021 15:42, Pavel Begunkov wrote:
> On 27/01/2021 15:00, Kanchan Joshi wrote:
>> This RFC patchset adds asynchronous ioctl capability for NVMe devices.
>> Purpose of RFC is to get the feedback and optimize the path.
>>
>> At the uppermost io-uring layer, a new opcode IORING_OP_IOCTL_PT is
1 - 100 of 1636 matches
Mail list logo
