When op_alloc() returns NULL to new_op, no error return code of
orangefs_revalidate_lookup() is assigned.
To fix this bug, ret is assigned with -ENOMEM in this case.
Fixes: 8bb8aefd5afb ("OrangeFS: Change almost all instances of the string PVFS2
to OrangeFS.")
Reported-by: TOTE Robot
Signed-off-
>> >>> Is this a property of the hardware, that is, are there multiple versions
>> >>> of this IP core covered by the same compatible string that support HDCP
>> >>> 1.4 only, DHCP 2.2 only or both ? Or is it a way to select what a given
>> >>> system will offer ?[]
>> >>
>> >> MHDP hardware suppor
Fix the following coccicheck warnings:
./drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c:896:68-73:
WARNING: conversion to bool not needed here.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c | 2 +-
1 file changed, 1 insertion
On 03/09/2020 06.00, Samuel Holland wrote:
> Stephen, Maxime,
>
> You previously asked me to implement the protected-clocks property in a
> driver-independent way:
>
> https://www.spinics.net/lists/arm-kernel/msg753832.html
>
> I provided an implementation 6 months ago, which I am resending now:
Hi Sudeep,
On Mon, Mar 08, 2021 at 07:34:25AM +, Sudeep Holla wrote:
> On Tue, Feb 02, 2021 at 10:15:54PM +, Cristian Marussi wrote:
> > Extend SCMI protocols accounting mechanism to address possible module
> > usage and add the support to possibly define new protocols as loadable
> > modu
Update the copyright year for PSP TEE driver files.
Signed-off-by: Rijo Thomas
---
drivers/crypto/ccp/tee-dev.c | 2 +-
drivers/crypto/ccp/tee-dev.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/ccp/tee-dev.c b/drivers/crypto/ccp/tee-dev.c
index 1aa2648150
Multiple threads or clients can submit a command to the TEE ring
buffer. This patch helps to synchronize command submission to the
ring.
One thread shall write a command to a TEE ring buffer entry only if:
- Trusted OS has notified that the TEE command for the given entry
has been processed a
The first patch helps to improve the response time by reducing the
polling time of the tee command status variable.
Second patch is a bug fix to handle multi-threaded use-case.
During testing, race condition was seen due to missing synchronisation
in writes to the TEE ring buffer. This patch helps
The PSP TEE device driver polls the command status variable every
5ms to check for command completion. Reduce this time to 1ms so that
there is an improvement in driver response time to clients which submit
TEE commands.
Reviewed-by: Devaraj Rangasamy
Signed-off-by: Rijo Thomas
---
drivers/cryp
Hi Adrien,
On 21-03-08 13:55, Adrien Grassein wrote:
> Add the description for ecspi2 support.
>
> Signed-off-by: Adrien Grassein
> Reviewed-by: Krzysztof Kozlowski
> Reviewed-by: Fabio Estevam
> ---
> .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 20 +++
> 1 file changed, 2
On Thu, 25 Feb 2021 at 10:53, Nicolas Saenz Julienne
wrote:
>
> I'm seeing a rather odd behavior from sdhci-iproc's integration in BCM2711
> (Raspberry Pi 4's SoC), and would appreciate some opinions.
>
> The controller will timeout on SDHCI CMDs under the following conditions:
>
> - No SD card p
On Mon, Mar 08, 2021 at 09:59:27PM +0100, Loic Poulain wrote:
> The MHI WWWAN control driver allows MHI Qcom based modems to expose
> different modem control protocols to userspace, so that userspace
> modem tools or daemon (e.g. ModemManager) can control WWAN config
> and state (APN config, SMS, p
On Mon, Mar 8, 2021 at 8:52 PM Andy Shevchenko
wrote:
>
> On Mon, Mar 08, 2021 at 09:36:52PM +0200, Andy Shevchenko wrote:
> > On Mon, Mar 08, 2021 at 08:29:27PM +0100, Bartosz Golaszewski wrote:
> > > On Mon, Mar 8, 2021 at 8:26 PM Rafael J. Wysocki
> > > wrote:
> > > > On Mon, Mar 8, 2021 at 8
Hi Heiko,
On 21-03-09 06:31, Heiko Schocher wrote:
>
> This series enables support for the SPI NOR on the
> imx8mp based phyboard-pollux-rdk board.
>
> Patches new in v2:
> "spi: fspi: enable fspi driver for on imx8mp"
> which adds own compatible entry for imx8mp
>
> and seperate in own patch t
Hi Lee,
Thank you for having a look at the patch.
> > From: Hubert Streidl
> >
> > By default the PMIC DA9063 2-wire interface is SMBus compliant. This
> > means the PMIC will automatically reset the interface when the clock
> > signal ceases for more than the SMBus timeout of 35 ms.
> >
> > If
On 2021-03-06 3:47 PM, Jia-Ju Bai wrote:
When mlx5e_tc_get_counter() returns NULL to counter or
mlx5_devcom_get_peer_data() returns NULL to peer_esw, no error return
code of mlx5e_stats_flower() is assigned.
To fix this bug, err is assigned with -EINVAL in these cases.
Reported-by: TOTE Robot
Hi Jakub,
On Mon, 8 Mar 2021 at 19:51, Jakub Kicinski wrote:
>
> On Mon, 8 Mar 2021 19:40:51 +0100 Loic Poulain wrote:
> > The MHI WWWAN control driver allows MHI Qcom based modems to expose
> > different modem control protocols to userspace, so that userspace
> > modem tools or daemon (e.g. Mod
From: Daniel Baluta
Platform may be specified by either name or OF node but not
both.
For OF node platforms (e.g i.MX) we end up with both platform name
and of_node set and sound card registration will fail with the error:
asoc-simple-card sof-sound-wm8960: ASoC: Neither/both
platform name/
On 02/03/2021 05:22, Artem Lapkin wrote:
> Problem: random stucks on reboot stage about 1/20 stuck/reboots
> // debug kernel log
> [4.496660] reboot: kernel restart prepare CMD:(null)
> [4.498114] meson_ee_pwrc c883c000.system-controller:power-controller:
> shutdown begin
> [4.503949]
On Tue, 9 Mar 2021 at 09:19, Greg KH wrote:
>
> On Mon, Mar 08, 2021 at 09:59:27PM +0100, Loic Poulain wrote:
> > The MHI WWWAN control driver allows MHI Qcom based modems to expose
> > different modem control protocols to userspace, so that userspace
> > modem tools or daemon (e.g. ModemManager)
On 2021-03-09 10:20 AM, Roi Dayan wrote:
On 2021-03-06 3:47 PM, Jia-Ju Bai wrote:
When mlx5e_tc_get_counter() returns NULL to counter or
mlx5_devcom_get_peer_data() returns NULL to peer_esw, no error return
code of mlx5e_stats_flower() is assigned.
To fix this bug, err is assigned with -EIN
On Mon, Mar 08, 2021 at 07:43:30PM +0100, Oscar Salvador wrote:
> On Thu, Mar 04, 2021 at 09:02:36AM -0800, Dave Hansen wrote:
> > Also, logically, it would make a lot of sense if you can move the actual
> > PMD freeing logic in here. That way, the caller is just saying, "unuse
> > this PMD region
ck_usbo_48m is generated by usbphyc PLL and used by OTG controller
for Full-Speed use cases with dedicated Full-Speed transceiver.
ck_usbo_48m is available as soon as the PLL is enabled.
Signed-off-by: Amelie Delaunay
---
No changes in v3.
Changes in v2:
- fix COMMON_CLK dependency issue reporte
usbphyc provides a unique clock called ck_usbo_48m.
STM32 USB OTG needs a 48Mhz clock (utmifs_clk48) for Full-Speed operation.
ck_usbo_48m is a possible parent clock for USB OTG 48Mhz clock.
ck_usbo_48m is available as soon as the PLL is enabled.
Signed-off-by: Amelie Delaunay
Acked-by: Rob Herr
STM32 USBPHYC provides clocks to STM32 RCC pour STM32 USB controllers.
Specifically, ck_usbo_48m is a possible clock parent for USB OTG clock,
during OTG Full-Speed operation.
This series registers the usbphyc as clock provider of this ck_usbo_48m clock.
---
Resent with linux-phy ML in cc
Changes
On Tue 09-03-21 09:37:29, Balbir Singh wrote:
> On 4/3/21 6:40 pm, Zhou Guanghui wrote:
[...]
> > -#ifdef CONFIG_TRANSPARENT_HUGEPAGE
> > /*
> > - * Because page_memcg(head) is not set on compound tails, set it now.
> > + * Because page_memcg(head) is not set on tails, set it now.
> > */
> > -vo
On Tue, Mar 09, 2021 at 02:35:34PM +0800, Aili Yao wrote:
> When the page is already poisoned, another memory_failure() call in the
> same page now return 0, meaning OK. For nested memory mce handling, this
> behavior may lead to mce looping, Example:
>
> 1.When LCME is enabled, and there are two
On Mon, Mar 08, 2021 at 09:07:45PM -0400, Jason Gunthorpe wrote:
> Indeed, checkpatch has been warning about this too
And checkaptch as so often these days is completely full of shit.
There is ansolutely not objective reason against using bare unsigned
except for a weird anal preference of a check
On 09.03.21 08:35, Rolf Eike Beer wrote:
diff --git a/mm/internal.h b/mm/internal.h
index 9902648f2206..a5c4ed23b1db 100644
--- a/mm/internal.h
+++ b/mm/internal.h
@@ -340,6 +340,9 @@ void __vma_unlink_list(struct mm_struct *mm,
struct vm_area_struct *vma);
#ifdef CONFIG_MMU
extern long popul
This series contains config cleanup patches which reduces code duplication
across platforms and also improves maintainability. There is no functional
change intended with this series. This has been boot tested on arm64 but
only build tested on some other platforms.
This applies on 5.12-rc2
Cc: x.
On 2021/3/9 16:24, Roi Dayan wrote:
On 2021-03-09 10:20 AM, Roi Dayan wrote:
On 2021-03-06 3:47 PM, Jia-Ju Bai wrote:
When mlx5e_tc_get_counter() returns NULL to counter or
mlx5_devcom_get_peer_data() returns NULL to peer_esw, no error return
code of mlx5e_stats_flower() is assigned.
To
ARCH_ENABLE_MEMORY_[HOTPLUG|HOTREMOVE] configs have duplicate definitions
on platforms that subscribe them. Instead, just make them generic options
which can be selected on applicable platforms.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Michael Ellerman
Cc: Benjamin Herrenschmidt
Cc: Paul Macker
ARCH_ENABLE_[HUGEPAGE|THP]_MIGRATION configs have duplicate definitions on
platforms that subscribe them. Drop these reduntant definitions and instead
just select them appropriately.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Michael Ellerman
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Tho
This is a preparation patch for separating the vfio_pci driver to a
subsystem driver and a generic pci driver. This patch doesn't change any
logic.
Signed-off-by: Max Gurtovoy
---
drivers/vfio/pci/Makefile| 2 +-
drivers/vfio/pci/{vfio_pci.c => vfio_pci_core.c} | 0
2 fil
Hi Alex and Cornelia,
This series split the vfio_pci driver into 2 parts: pci drivers and a
subsystem driver that will also be library of code. The main pci driver,
vfio_pci.ko will be used as before and it will bind to the subsystem
driver vfio_pci_core.ko to register to the VFIO subsystem.
New v
The MHI WWWAN control driver allows MHI Qcom based modems to expose
different modem control protocols/ports to userspace, so that userspace
modem tools or daemon (e.g. ModemManager) can control WWAN config
and state (APN config, SMS, provider selection...). A Qcom based
modem can expose one or seve
When kcalloc() returns NULL to nl_table, no error return code of
netlink_proto_init() is assigned.
To fix this bug, err is assigned with -ENOMEM in this case.
Fixes: fab2caf62ed0 ("[NETLINK]: Call panic if nl_table allocation fails")
Reported-by: TOTE Robot
Signed-off-by: Jia-Ju Bai
---
net/net
This is a preparation patch for separating the vfio_pci driver to a
subsystem driver and a generic pci driver. This patch doesn't change
any logic.
Signed-off-by: Max Gurtovoy
---
drivers/vfio/pci/vfio_pci_config.c | 2 +-
drivers/vfio/pci/vfio_pci_core.c
This structure will hold the specific attributes for the generic
vfio_pci.ko driver. It will be allocated by the vfio_pci driver that
will register the vfio subsystem using vfio_pci_core_register_device
and it will unregister the using vfio_pci_core_unregister_device. In
this way every vfio_pci fut
Split the vfio_pci driver into two parts, the 'struct pci_driver'
(vfio_pci) and a library of code (vfio_pci_core) that helps creating a
VFIO device on top of a PCI device.
As before vfio_pci.ko continues to present the same interface under
sysfs and this change should have no functional impact.
This function will be used to allow vendor drivers to register regions
to be used and accessed by the core subsystem driver. This way, the core
will use the region ops that are vendor specific and managed by the
vendor vfio-pci driver.
Next step that can be made is to move the logic of igd and nvl
This is a preparation for moving vendor specific code from
vfio_pci_core to vendor specific vfio_pci drivers. The next step will be
creating a dedicated module to NVIDIA NVLINK2 devices with P9 extensions
and a dedicated module for Power9 NPU NVLink2 HBAs.
Signed-off-by: Max Gurtovoy
---
drivers
On 2021/3/9 0:34, Will Deacon wrote:
On Mon, Jan 25, 2021 at 10:10:44PM +0800, Yanan Wang wrote:
After dirty-logging is stopped for a VM configured with huge mappings,
KVM will recover the table mappings back to block mappings. As we only
replace the existing page tables with a block entry and
This is a preparation patch for separating the vfio_pci driver to a
subsystem driver and a generic pci driver. This patch doesn't change
any logic. The new vfio_pci_core_device structure will be the main
structure of the core driver and later on vfio_pci_device structure will
be the main structure
Create a new driver igd_vfio_pci.ko that will be responsible for
providing special extensions for INTEL Graphics card (GVT-d).
Also preserve backward compatibility with vfio_pci.ko vendor specific
extensions.
Signed-off-by: Max Gurtovoy
---
drivers/vfio/pci/Kconfig | 5 +-
The new drivers introduced are nvlink2gpu_vfio_pci.ko and
npu2_vfio_pci.ko.
The first will be responsible for providing special extensions for
NVIDIA GPUs with NVLINK2 support for P9 platform (and others in the
future). The last will be responsible for POWER9 NPU2 unit (NVLink2 host
bus adapter).
On 09/03/21 02:18, Sean Christopherson wrote:
Maybe this series is cursed. The first patch got mangled and broke SME.
It shows up as two commits with the same changelog, so maybe you intended to
split the patch and things went sideways?
There was a conflict. I admit kvm/queue is not always th
On Mon, Mar 08, 2021 at 02:47:28PM -0700, Alex Williamson wrote:
> By linking all the device fds we provide to userspace to an
> address space through a new pseudo fs, we can use tools like
> unmap_mapping_range() to zap all vmas associated with a device.
>
> Suggested-by: Jason Gunthorpe
> Signe
On 9.03.21 г. 10:49 ч., kernel test robot wrote:
>
>
> Greeting,
>
> FYI, we noticed the following commit (built with gcc-9):
>
> commit: 5297199a8bca12b8b96afcbf2341605efb6005de ("btrfs: remove inode number
> cache feature")
> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git
allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
i386 randconfig-a005-20210309
i386 randconfig-a003-20210309
i386
From: Jan Kiszka
Add support for two Siemens SIMATIC IOT2050 variants, Basic and
Advanced. They are based on the TI AM6528 GP and AM6548 SOCs HS, thus
differ in their number of cores and availability of security features.
Furthermore the Advanced version comes with more RAM, an eMMC and a few
int
When vzalloc() returns NULL to sha_regions, no error return code of
kexec_calculate_store_digests() is assigned.
To fix this bug, ret is assigned with -ENOMEM in this case.
Fixes: a43cac0d9dc2 ("kexec: split kexec_file syscall code to kexec_file.c")
Reported-by: TOTE Robot
Signed-off-by: Jia-Ju B
Add stub instances of enable_kernel_vsx() and disable_kernel_vsx()
when CONFIG_VSX is not set, to avoid following build failure.
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.o
In file included from
./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:29,
Hello Marco,
On 09.03.21 09:19, Marco Felsch wrote:
> Hi Heiko,
>
> On 21-03-09 06:31, Heiko Schocher wrote:
>>
>> This series enables support for the SPI NOR on the
>> imx8mp based phyboard-pollux-rdk board.
>>
>> Patches new in v2:
>> "spi: fspi: enable fspi driver for on imx8mp"
>> which adds
Am Mon, 8 Mar 2021 19:42:21 -0600
schrieb Bjorn Helgaas :
> On Mon, Mar 08, 2021 at 09:16:50PM +0200, Andy Shevchenko wrote:
> > On Mon, Mar 08, 2021 at 12:52:12PM -0600, Bjorn Helgaas wrote:
> > > On Mon, Mar 08, 2021 at 02:20:16PM +0200, Andy Shevchenko wrote:
> > > > From: Jonathan Yong
>
On Tue, 09 Mar 2021 08:34:43 +,
"wangyanan (Y)" wrote:
>
>
> On 2021/3/9 0:34, Will Deacon wrote:
> > On Mon, Jan 25, 2021 at 10:10:44PM +0800, Yanan Wang wrote:
> >> After dirty-logging is stopped for a VM configured with huge mappings,
> >> KVM will recover the table mappings back to block
On Fri, 5 Mar 2021 at 03:45, Jia-Ju Bai wrote:
>
> My static analysis tool reports that no error return code is assigned in
> error handling code of msb_resume().
> However, many other drivers assign error return code in xxx_resume(),
> such as sky2_resume() and e1000_resume().
> I wonder whether
This is a follow up to the review comments of the series which makes
softirq processing PREEMPT_RT safe:
https://lore.kernel.org/r/20201207114743.gk3...@hirez.programming.kicks-ass.net
Peter suggested to replace the spin waiting in tasklet_disable() and
tasklet_kill() with wait_event(). This als
A barrier() in a tight loop which waits for something to happen on a remote
CPU is a pointless exercise. Replace it with cpu_relax() which allows HT
siblings to make progress.
Signed-off-by: Thomas Gleixner
Tested-by: Sebastian Andrzej Siewior
---
include/linux/interrupt.h |3 ++-
1 file ch
Hi Christophe,
On Tue, Mar 9, 2021 at 9:39 AM Christophe Leroy
wrote:
> Add stub instances of enable_kernel_vsx() and disable_kernel_vsx()
> when CONFIG_VSX is not set, to avoid following build failure.
>
> CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.o
> In file included fr
Inlines exist for a reason.
Signed-off-by: Thomas Gleixner
Tested-by: Sebastian Andrzej Siewior
---
include/linux/interrupt.h |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -676,9 +676,9 @@ static inline void ta
Replacing the spin wait loops in tasklet_unlock_wait() with
wait_var_event() is not possible as a handful of tasklet_disable()
invocations are happening in atomic context. All other invocations are in
teardown paths which can sleep.
Provide tasklet_disable_in_atomic() and tasklet_unlock_spin_wait(
From: Peter Zijlstra
tasklet_unlock_wait() spin waits for TASKLET_STATE_RUN to be cleared. This
is wasting CPU cycles in a tight loop which is especially painful in a
guest when the CPU running the tasklet is scheduled out.
tasklet_unlock_wait() is invoked from tasklet_kill() which is used in
te
From: Peter Zijlstra
tasklet_kill() spin waits for TASKLET_STATE_SCHED to be cleared invoking
yield() from inside the loop. yield() is an ill defined mechanism and the
result might still be wasting CPU cycles in a tight loop which is
especially painful in a guest when the CPU running the tasklet
To ease the transition use spin waiting in tasklet_disable() until all
usage sites from atomic context have been cleaned up.
Signed-off-by: Thomas Gleixner
---
include/linux/interrupt.h |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/include/linux/interrupt.h
+++ b/include/linu
tasklet_unlock_spin_wait() spin waits for the TASKLET_STATE_SCHED bit in
the tasklet state to be cleared. This works on !RT nicely because the
corresponding execution can only happen on a different CPU.
On RT softirq processing is preemptible, therefore a task preempting the
softirq processing thr
From: Sebastian Andrzej Siewior
tasklet_disable() is used in the timer callback. This might be distangled,
but without access to the hardware that's a bit risky.
Replace it with tasklet_disable_in_atomic() so tasklet_disable() can be
changed to a sleep wait once all remaining atomic users are co
From: Sebastian Andrzej Siewior
The link change tasklet disables the tasklets for tx/rx processing while
upating hw parameters and then enables the tasklets again.
This update can also be pushed into a workqueue where it can be performed
in preemptible context. This allows tasklet_disable() to b
From: Sebastian Andrzej Siewior
All callers of ath9k_beacon_ensure_primary_slot() are preemptible /
acquire a mutex except for this callchain:
spin_lock_bh(&sc->sc_pcu_lock);
ath_complete_reset()
-> ath9k_calculate_summary_state()
-> ath9k_beacon_ensure_primary_slot()
It's unclear ho
From: Sebastian Andrzej Siewior
The hv_compose_msi_msg() callback in irq_chip::irq_compose_msi_msg is
invoked via irq_chip_compose_msi_msg(), which itself is always invoked from
atomic contexts from the guts of the interrupt core code.
There is no way to change this w/o rewriting the whole drive
On Tue, Mar 09, 2021 at 08:46:49AM +0100, Peter Zijlstra wrote:
> On Mon, Mar 08, 2021 at 12:40:44PM -0800, Sean Christopherson wrote:
> > On Mon, Mar 08, 2021, Peter Zijlstra wrote:
>
> > > Given the one user in atomic_switch_perf_msrs() that should work because
> > > it doesn't seem to care abou
From: Sebastian Andrzej Siewior
tasklet_disable() is invoked in several places. Some of them are in atomic
context which prevents a conversion of tasklet_disable() to a sleepable
function.
The atomic callchains are:
ar_context_tasklet()
ohci_cancel_packet()
tasklet_disable()
...
o
From: Sebastian Andrzej Siewior
The atmdev_ops::send callback which calls tasklet_disable() is invoked with
bottom halfs disabled from net_device_ops::ndo_start_xmit(). All other
invocations of tasklet_disable() in this driver happen in preemptible
context.
Change the send() call to use tasklet_
-- NOT FOR IMMEDIATE MERGING --
Now that all users of tasklet_disable() are invoked from sleepable context,
convert it to use tasklet_unlock_wait() which might sleep.
Signed-off-by: Thomas Gleixner
---
include/linux/interrupt.h |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
--- a/
Fix the following cppcheck warnings:
tools/objtool/check.c(1102): error: Memory leak: orig_alt_group.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
tools/objtool/check.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/objtool/check.c b/tools/objtool/check.c
index 068cdb4.
On 09.03.2021 09:33, Jia-Ju Bai wrote:
> When kcalloc() returns NULL to nl_table, no error return code of
> netlink_proto_init() is assigned.
> To fix this bug, err is assigned with -ENOMEM in this case.
>
Didn't we talk enough about your incorrect patches yesterday?
This one is incorrect again.
On Fri, 5 Mar 2021 12:21:24 -0800, Sami Tolvanen wrote:
> allmodconfig + CONFIG_LTO_CLANG_THIN=y fails to build due to following
> linker errors:
>
> ld.lld: error: irqbypass.c:(function __guest_enter: .text+0x21CC):
> relocation R_AARCH64_CONDBR19 out of range: 2031220 is not in
> [-1048576
On 08/03/2021 19:23, Krzysztof Kozlowski wrote:
> The Stratix 10 / Agilex / N5X clocks do not use anything other than OF
> or COMMON_CLK so they should be compile testable on most of the
> platforms.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> drivers/clk/Makefile| 5 +
> drivers
The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: 5fbecd2389f48e1415799c63130d0cdce1cf3f60
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/5fbecd2389f48e1415799c63130d0cdce1cf3f60
Author:Paul Cercueil
Author
Le 09/03/2021 à 09:45, Geert Uytterhoeven a écrit :
Hi Christophe,
On Tue, Mar 9, 2021 at 9:39 AM Christophe Leroy
wrote:
Add stub instances of enable_kernel_vsx() and disable_kernel_vsx()
when CONFIG_VSX is not set, to avoid following build failure.
CC [M] drivers/gpu/drm/amd/amdgpu/.
Ah, and you forgot to CC lkml ;) let me resend my email.
Hi Jim,
Please do not use the attachments, just send the patch as plain text.
See Documentation/process/submitting-patches.rst
On 03/08, Jim Newsome wrote:
>
> --- a/kernel/exit.c
> +++ b/kernel/exit.c
> @@ -1462,8 +1462,61 @@ static long
RT runs softirq processing always in thread context and it requires that
both the softirq execution and the BH disabled sections are preemptible.
This is achieved by serialization through per CPU local locks and
substituting a few parts of the existing softirq processing code with
helper functions
RT requires the softirq processing and local bottomhalf disabled regions to
be preemptible. Using the normal preempt count based serialization is
therefore not possible because this implicitely disables preemption.
RT kernels use a per CPU local lock to serialize bottomhalfs. As
local_bh_disable()
Provide a local lock based serialization for soft interrupts on RT which
allows the local_bh_disabled() sections and servicing soft interrupts to be
preemptible.
Provide the necessary inline helpers which allow to reuse the bulk of the
softirq processing code.
Signed-off-by: Thomas Gleixner
Test
To allow reuse of the bulk of softirq processing code for RT and to avoid
#ifdeffery all over the place, split protections for various code sections
out into inline helpers so the RT variant can just replace them in one go.
Signed-off-by: Thomas Gleixner
Tested-by: Sebastian Andrzej Siewior
Revi
Soft interrupt disabled sections can legitimately be preempted or schedule
out when blocking on a lock on RT enabled kernels so the RCU preempt check
warning has to be disabled for RT kernels.
Signed-off-by: Thomas Gleixner
Tested-by: Sebastian Andrzej Siewior
Reviewed-by: Paul E. McKenney
---
vtime_account_irq and irqtime_account_irq() base checks on preempt_count()
which fails on RT because preempt_count() does not contain the softirq
accounting which is seperate on RT.
These checks do not need the full preempt count as they only operate on the
hard and softirq sections.
Use irq_coun
On RT a task which has soft interrupts disabled can block on a lock and
schedule out to idle while soft interrupts are pending. This triggers the
warning in the NOHZ idle code which complains about going idle with pending
soft interrupts. But as the task is blocked soft interrupt processing is
temp
On Mon, Mar 08, 2021 at 03:54:55PM -0500, Zack Rusin wrote:
> Add an interruptible version of down_write. It's the other
> side of the already implemented down_read_interruptible.
> It allows drivers which used custom locking code to
> support interruptible rw semaphores to switch over
> to rwsem.
The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: 673433e7c288927f7244658788f203c660d7a6f6
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/673433e7c288927f7244658788f203c660d7a6f6
Author:Paul Cercueil
Author
On Tue, Mar 9, 2021 at 4:23 AM Felix Kuehling wrote:
>
> Using 'imply AMD_IOMMU_V2' does not guarantee that the driver can link
> against the exported functions. If the GPU driver is built-in but the
> IOMMU driver is a loadable module, the kfd_iommu.c file is indeed
> built but does not work:
>
>
On 09.03.21 01:18, Mike Kravetz wrote:
The concurrent use of multiple hugetlb page sizes on a single system
is becoming more common. One of the reasons is better TLB support for
gigantic page sizes on x86 hardware. In addition, hugetlb pages are
being used to back VMs in hosting environments.
On Mon 08-03-21 21:02:25, Matthew Wilcox wrote:
> On Thu, Mar 04, 2021 at 07:40:53AM +, Zhou Guanghui wrote:
> > As described in the split_page function comment, for the non-compound
> > high order page, the sub-pages must be freed individually. If the
> > memcg of the fisrt page is valid, the
On Fri, 5 Mar 2021 at 03:14, Jia-Ju Bai wrote:
>
> When mspro_block_init_card() fails, no error return code of
> mspro_block_resume() is assigned.
> To fix this bug, rc is assigned with the return value of
> mspro_block_init_card(), and then rc is checked.
>
> Reported-by: TOTE Robot
> Signed-off
When proc_create() returns NULL to entry, no error return code of
create_proc_profile() is assigned.
To fix this bug, err is assigned with -ENOMEM in this case.
Fixes: e722d8daafb9 ("profile: Convert to hotplug state machine")
Reported-by: TOTE Robot
Signed-off-by: Jia-Ju Bai
---
kernel/profile
On Tue, 9 Mar 2021 at 07:48, Yang Li wrote:
>
> Fix the following coccicheck warning:
> ./drivers/mmc/host/via-sdmmc.c:1274:5-8: Unneeded variable: "ret".
> Return "0" on line 1295
>
> Reported-by: Abaci Robot
> Signed-off-by: Yang Li
Applied for next, thanks!
Kind regards
Uffe
> ---
> driv
On 2021/3/9 16:43, Marc Zyngier wrote:
On Tue, 09 Mar 2021 08:34:43 +,
"wangyanan (Y)" wrote:
On 2021/3/9 0:34, Will Deacon wrote:
On Mon, Jan 25, 2021 at 10:10:44PM +0800, Yanan Wang wrote:
After dirty-logging is stopped for a VM configured with huge mappings,
KVM will recover the tab
On 09/03/2021 09:49, Krzysztof Kozlowski wrote:
> On 08/03/2021 19:23, Krzysztof Kozlowski wrote:
>> The Stratix 10 / Agilex / N5X clocks do not use anything other
>> than OF or COMMON_CLK so they should be compile testable on most of
>> the platforms.
>>
>> Signed-off-by: Krzysztof Kozlowski
>
On 3/9/21 2:03 PM, Anshuman Khandual wrote:
> This series contains config cleanup patches which reduces code duplication
> across platforms and also improves maintainability. There is no functional
> change intended with this series. This has been boot tested on arm64 but
> only build tested on s
Hi Andreas,
On 08.03.2021 21:30, Andreas Schwab wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> One of the changes to the macb driver between 5.10 and 5.11 has broken
> the SiFive HiFive Unleashed. These are the last messages before the
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