Re: [PATCH v2 05/10] drm/rockchip: analogix_dp: add rk3399 eDP support

On 05/24/2016 06:17 PM, Heiko Stuebner wrote: Am Dienstag, 24. Mai 2016, 14:57:23 schrieb Yakir Yang: [] diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index 29c4105..d5d4e04 100644 ---

Re: [PATCH v2 05/10] drm/rockchip: analogix_dp: add rk3399 eDP support

On 05/24/2016 06:17 PM, Heiko Stuebner wrote: Am Dienstag, 24. Mai 2016, 14:57:23 schrieb Yakir Yang: [] diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index 29c4105..d5d4e04 100644 ---

Re: [PATCH v2 05/10] drm/rockchip: analogix_dp: add rk3399 eDP support

On 05/25/2016 02:23 AM, Heiko Stuebner wrote: Am Dienstag, 24. Mai 2016, 11:12:20 schrieb Doug Anderson: Hi, On Tue, May 24, 2016 at 3:17 AM, Heiko Stuebner wrote: --- a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt +++

Re: [PATCH v2 05/10] drm/rockchip: analogix_dp: add rk3399 eDP support

On 05/25/2016 02:23 AM, Heiko Stuebner wrote: Am Dienstag, 24. Mai 2016, 11:12:20 schrieb Doug Anderson: Hi, On Tue, May 24, 2016 at 3:17 AM, Heiko Stuebner wrote: --- a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt +++

Re: [PATCH 2/5] iommu: Set PCI_BUS_FLAGS_MSI_REMAP if IOMMU have capability of IRQ remapping

On 2016/5/25 5:11, Bjorn Helgaas wrote: On Wed, Apr 27, 2016 at 08:43:27PM +0800, Yongji Xie wrote: The capability of IRQ remapping is abstracted on IOMMU side on some archs. There is a existing flag IOMMU_CAP_INTR_REMAP for this. To have a universal flag to test this capability for different

Re: [PATCH 2/5] iommu: Set PCI_BUS_FLAGS_MSI_REMAP if IOMMU have capability of IRQ remapping

On 2016/5/25 5:11, Bjorn Helgaas wrote: On Wed, Apr 27, 2016 at 08:43:27PM +0800, Yongji Xie wrote: The capability of IRQ remapping is abstracted on IOMMU side on some archs. There is a existing flag IOMMU_CAP_INTR_REMAP for this. To have a universal flag to test this capability for different

Re: [PATCH 3/5] PCI: Set PCI_BUS_FLAGS_MSI_REMAP if MSI controller supports IRQ remapping

On 2016/5/25 5:04, Bjorn Helgaas wrote: On Wed, Apr 27, 2016 at 08:43:28PM +0800, Yongji Xie wrote: On ARM HW the capability of IRQ remapping is abstracted on MSI controller side. MSI_FLAG_IRQ_REMAPPING is used to advertise this [1]. To have a universal flag to test this capability for

Re: [PATCH 3/5] PCI: Set PCI_BUS_FLAGS_MSI_REMAP if MSI controller supports IRQ remapping

On 2016/5/25 5:04, Bjorn Helgaas wrote: On Wed, Apr 27, 2016 at 08:43:28PM +0800, Yongji Xie wrote: On ARM HW the capability of IRQ remapping is abstracted on MSI controller side. MSI_FLAG_IRQ_REMAPPING is used to advertise this [1]. To have a universal flag to test this capability for

[PATCH v3 00/12] J-core J2 cpu and SoC peripherals support

The following patchset adds support for the J-core J2, an open-source VHDL reimplementation of the SH-2 ISA, and drivers for the associated SoC devices (interrupt controller, clocksource, and SPI). As arch/sh co-maintainer my intent is to include as much as possible in my pull request for the

[PATCH v3 03/12] of: add J-Core interrupt controller bindings

Signed-off-by: Rich Felker --- .../bindings/interrupt-controller/jcore,aic.txt| 29 ++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt diff --git

Re: [PATCH 1/5] PCI: Add a new PCI_BUS_FLAGS_MSI_REMAP flag

On 2016/5/25 4:55, Bjorn Helgaas wrote: On Wed, Apr 27, 2016 at 08:43:26PM +0800, Yongji Xie wrote: We introduce a new pci_bus_flags, PCI_BUS_FLAGS_MSI_REMAP which indicates all devices on the bus are protected by the hardware which supports IRQ remapping(intel naming). This changelog is

[PATCH v3 06/12] sh: add support for J-Core J2 processor

At the CPU/ISA level, the J2 is compatible with SH-2, and thus the changes to add J2 support build on existing SH-2 support. However, J2 does not duplicate the memory-mapped SH-2 features like the cache interface. Instead, the cache interfaces is described in the device tree, and new code is added

[PATCH v3 09/12] clocksource: add J-Core timer/clocksource driver

At the hardware level, the J-Core PIT is integrated with the interrupt controller, but it is represented as its own device and has an independent programming interface. It provides a 12-bit countdown timer, which is not presently used, and a periodic timer. The interval length for the latter is

[PATCH v3 04/12] of: add J-Core timer bindings

Signed-off-by: Rich Felker --- .../devicetree/bindings/timer/jcore,pit.txt| 28 ++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/jcore,pit.txt diff --git

[PATCH v3 00/12] J-core J2 cpu and SoC peripherals support

The following patchset adds support for the J-core J2, an open-source VHDL reimplementation of the SH-2 ISA, and drivers for the associated SoC devices (interrupt controller, clocksource, and SPI). As arch/sh co-maintainer my intent is to include as much as possible in my pull request for the

[PATCH v3 03/12] of: add J-Core interrupt controller bindings

Signed-off-by: Rich Felker --- .../bindings/interrupt-controller/jcore,aic.txt| 29 ++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt diff --git

Re: [PATCH 1/5] PCI: Add a new PCI_BUS_FLAGS_MSI_REMAP flag

On 2016/5/25 4:55, Bjorn Helgaas wrote: On Wed, Apr 27, 2016 at 08:43:26PM +0800, Yongji Xie wrote: We introduce a new pci_bus_flags, PCI_BUS_FLAGS_MSI_REMAP which indicates all devices on the bus are protected by the hardware which supports IRQ remapping(intel naming). This changelog is

[PATCH v3 06/12] sh: add support for J-Core J2 processor

At the CPU/ISA level, the J2 is compatible with SH-2, and thus the changes to add J2 support build on existing SH-2 support. However, J2 does not duplicate the memory-mapped SH-2 features like the cache interface. Instead, the cache interfaces is described in the device tree, and new code is added

[PATCH v3 04/12] of: add J-Core timer bindings

Signed-off-by: Rich Felker --- .../devicetree/bindings/timer/jcore,pit.txt| 28 ++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/jcore,pit.txt diff --git a/Documentation/devicetree/bindings/timer/jcore,pit.txt

[PATCH v3 09/12] clocksource: add J-Core timer/clocksource driver

At the hardware level, the J-Core PIT is integrated with the interrupt controller, but it is represented as its own device and has an independent programming interface. It provides a 12-bit countdown timer, which is not presently used, and a periodic timer. The interval length for the latter is

[PATCH v3 02/12] of: add J-Core cpu bindings

Signed-off-by: Rich Felker --- Documentation/devicetree/bindings/jcore/cpus.txt | 92 1 file changed, 92 insertions(+) create mode 100644 Documentation/devicetree/bindings/jcore/cpus.txt diff --git a/Documentation/devicetree/bindings/jcore/cpus.txt

[PATCH v3 02/12] of: add J-Core cpu bindings

Signed-off-by: Rich Felker --- Documentation/devicetree/bindings/jcore/cpus.txt | 92 1 file changed, 92 insertions(+) create mode 100644 Documentation/devicetree/bindings/jcore/cpus.txt diff --git a/Documentation/devicetree/bindings/jcore/cpus.txt

[PATCH v3 10/12] spi: add driver for J-Core SPI controller

The J-Core "spi2" device is a PIO-based SPI master controller. It differs from "bitbang" devices in that that it's clocked in hardware rather than via soft clock modulation over gpio, and performs byte-at-a-time transfers between the cpu and SPI controller. This driver will be extended to support

[PATCH v3 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board

Signed-off-by: Rich Felker --- arch/sh/boot/dts/j2_mimas_v2.dts | 87 1 file changed, 87 insertions(+) create mode 100755 arch/sh/boot/dts/j2_mimas_v2.dts diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v2.dts

[PATCH v3 11/12] sh: add defconfig for J-Core J2

This defconfig is intended not to be specific to a particular board; it enables drivers for all currently-supported hardware, and should be updated to include additional drivers as they are added. Signed-off-by: Rich Felker --- arch/sh/configs/j2_defconfig | 38

[PATCH v3 08/12] irqchip: add J-Core AIC driver

There are two versions of the J-Core interrupt controller in use, aic1 which generates interrupts with programmable priorities, but only supports 8 irq lines and maps them to cpu traps in the range 17 to 24, and aic2 which uses traps in the range 64-127 and supports up to 128 irqs, with priorities

[PATCH v3 05/12] of: add J-Core SPI master bindings

Signed-off-by: Rich Felker --- .../devicetree/bindings/spi/jcore,spi.txt | 23 ++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/jcore,spi.txt diff --git

[PATCH v3 11/12] sh: add defconfig for J-Core J2

This defconfig is intended not to be specific to a particular board; it enables drivers for all currently-supported hardware, and should be updated to include additional drivers as they are added. Signed-off-by: Rich Felker --- arch/sh/configs/j2_defconfig | 38

[PATCH v3 08/12] irqchip: add J-Core AIC driver

There are two versions of the J-Core interrupt controller in use, aic1 which generates interrupts with programmable priorities, but only supports 8 irq lines and maps them to cpu traps in the range 17 to 24, and aic2 which uses traps in the range 64-127 and supports up to 128 irqs, with priorities

[PATCH v3 05/12] of: add J-Core SPI master bindings

Signed-off-by: Rich Felker --- .../devicetree/bindings/spi/jcore,spi.txt | 23 ++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/jcore,spi.txt diff --git a/Documentation/devicetree/bindings/spi/jcore,spi.txt

[PATCH v3 10/12] spi: add driver for J-Core SPI controller

The J-Core "spi2" device is a PIO-based SPI master controller. It differs from "bitbang" devices in that that it's clocked in hardware rather than via soft clock modulation over gpio, and performs byte-at-a-time transfers between the cpu and SPI controller. This driver will be extended to support

[PATCH v3 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board

Signed-off-by: Rich Felker --- arch/sh/boot/dts/j2_mimas_v2.dts | 87 1 file changed, 87 insertions(+) create mode 100755 arch/sh/boot/dts/j2_mimas_v2.dts diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v2.dts new file mode

[PATCH v3 01/12] of: add vendor prefix for J-Core

The J-Core project (j-core.org) produces open source cpu and SoC peripheral cores synthesizable as FPGA bitstreams or ASICs. Signed-off-by: Rich Felker --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH v3 01/12] of: add vendor prefix for J-Core

The J-Core project (j-core.org) produces open source cpu and SoC peripheral cores synthesizable as FPGA bitstreams or ASICs. Signed-off-by: Rich Felker --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH v3 07/12] sh: add AT_HWCAP flag for J-Core cas.l instruction

Signed-off-by: Rich Felker --- arch/sh/include/uapi/asm/cpu-features.h | 1 + arch/sh/kernel/cpu/sh2/probe.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/sh/include/uapi/asm/cpu-features.h b/arch/sh/include/uapi/asm/cpu-features.h index 694abe4..2f1bc85

[PATCH v3 07/12] sh: add AT_HWCAP flag for J-Core cas.l instruction

Signed-off-by: Rich Felker --- arch/sh/include/uapi/asm/cpu-features.h | 1 + arch/sh/kernel/cpu/sh2/probe.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/sh/include/uapi/asm/cpu-features.h b/arch/sh/include/uapi/asm/cpu-features.h index 694abe4..2f1bc85 100644 ---

Re: [RFC][PATCH 1/3] locking: Introduce smp_acquire__after_ctrl_dep

On Tue, May 24, 2016 at 09:53:29PM -0700, Paul E. McKenney wrote: > On Tue, May 24, 2016 at 11:01:21PM -0400, Waiman Long wrote: > > On 05/24/2016 10:27 AM, Peter Zijlstra wrote: > > >Introduce smp_acquire__after_ctrl_dep(), this construct is not > > >uncommen, but the lack of this barrier is. > >

Re: [RFC][PATCH 1/3] locking: Introduce smp_acquire__after_ctrl_dep

On Tue, May 24, 2016 at 09:53:29PM -0700, Paul E. McKenney wrote: > On Tue, May 24, 2016 at 11:01:21PM -0400, Waiman Long wrote: > > On 05/24/2016 10:27 AM, Peter Zijlstra wrote: > > >Introduce smp_acquire__after_ctrl_dep(), this construct is not > > >uncommen, but the lack of this barrier is. > >

Re: [PATCH] net: alx: use custom skb allocator

Hi Jarod, On Fri, May 20, 2016 at 02:26:57PM -0400, Jarod Wilson wrote: > On Fri, May 20, 2016 at 03:56:23PM +0800, Feng Tang wrote: > > Hi, > > > > Please ignore this patch. > > > > I found the problem and made the patch with kernel 4.4 with Ubuntu 12.04 > > on Lenovo Y580. > > > > After

Re: [PATCH] net: alx: use custom skb allocator

Hi Jarod, On Fri, May 20, 2016 at 02:26:57PM -0400, Jarod Wilson wrote: > On Fri, May 20, 2016 at 03:56:23PM +0800, Feng Tang wrote: > > Hi, > > > > Please ignore this patch. > > > > I found the problem and made the patch with kernel 4.4 with Ubuntu 12.04 > > on Lenovo Y580. > > > > After

Re: [RFC PATCH] drivers/pinctrl: Add pinctrl-ast2400

Hi Linus, On Mon, 2016-05-23 at 14:38 +0200, Linus Walleij wrote: > Hi sorry for taking so long before reviewing. Too busy, what can I say. No worries, I expected as much. Thanks for taking the time! > > On Fri, May 6, 2016 at 8:20 AM, Andrew Jeffery wrote: > > > > > Add

Re: [RFC PATCH] drivers/pinctrl: Add pinctrl-ast2400

Hi Linus, On Mon, 2016-05-23 at 14:38 +0200, Linus Walleij wrote: > Hi sorry for taking so long before reviewing. Too busy, what can I say. No worries, I expected as much. Thanks for taking the time! > > On Fri, May 6, 2016 at 8:20 AM, Andrew Jeffery wrote: > > > > > Add pinctrl/pinmux

Re: [PATCH] ACPI / Thermal / video: fix max_level incorrect value

Valdis, can you please give the patch a try? Thanks. -Aaron On Sat, May 21, 2016 at 03:55:00PM +0800, Aaron Lu wrote: > I think I have found the problem, please give the patch a test, thanks. > > From: Aaron Lu > Date: Sat, 21 May 2016 15:30:46 +0800 > Subject: [PATCH] ACPI

Re: [PATCH] ACPI / Thermal / video: fix max_level incorrect value

Valdis, can you please give the patch a try? Thanks. -Aaron On Sat, May 21, 2016 at 03:55:00PM +0800, Aaron Lu wrote: > I think I have found the problem, please give the patch a test, thanks. > > From: Aaron Lu > Date: Sat, 21 May 2016 15:30:46 +0800 > Subject: [PATCH] ACPI / Thermal / video:

Re: [PATCH v6 11/12] zsmalloc: page migration support

Hello Sergey, On Tue, May 24, 2016 at 03:28:01PM +0900, Minchan Kim wrote: > > hm... zsmalloc is getting sooo complex now. > > > > `system_wq' -- can we have problems here when the system is getting > > low on memory and workers are getting increasingly busy trying to > > allocate the memory

Re: [PATCH v6 11/12] zsmalloc: page migration support

Hello Sergey, On Tue, May 24, 2016 at 03:28:01PM +0900, Minchan Kim wrote: > > hm... zsmalloc is getting sooo complex now. > > > > `system_wq' -- can we have problems here when the system is getting > > low on memory and workers are getting increasingly busy trying to > > allocate the memory

[PATCH] pinctrl: copy per-pin driver private data to struct pin_desc

Currently, struct pinctrl_pin_desc can have per-pin driver private data, but it is not copied to struct pin_desc. For a driver with sparse pin space, for-loop search like below would be necessary in order to get the driver-specific data for a desired pin number. for (i = 0; i <

[PATCH] pinctrl: copy per-pin driver private data to struct pin_desc

Currently, struct pinctrl_pin_desc can have per-pin driver private data, but it is not copied to struct pin_desc. For a driver with sparse pin space, for-loop search like below would be necessary in order to get the driver-specific data for a desired pin number. for (i = 0; i <

[PATCH v5 7/8] perf tools: Don't warn about out of order event if write_backward is used

If write_backward attribute is set, records are written into kernel ring buffer from end to beginning, but read from beginning to end. To avoid 'XX out of order events recorded' warning message (timestamps of records is in reverse order when using write_backward), suppress the warning message if

[PATCH v5 2/8] perf tools: Choose correct reading direction according to evlist->backward

Now we have evlist->backward to indicate the mmap direction. Make perf_evlist__mmap_read() choose right direction automatically. Signed-off-by: Wang Nan Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Masami Hiramatsu

[PATCH v5 7/8] perf tools: Don't warn about out of order event if write_backward is used

If write_backward attribute is set, records are written into kernel ring buffer from end to beginning, but read from beginning to end. To avoid 'XX out of order events recorded' warning message (timestamps of records is in reverse order when using write_backward), suppress the warning message if

[PATCH v5 2/8] perf tools: Choose correct reading direction according to evlist->backward

Now we have evlist->backward to indicate the mmap direction. Make perf_evlist__mmap_read() choose right direction automatically. Signed-off-by: Wang Nan Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Masami Hiramatsu Cc: Namhyung Kim Cc: Zefan Li Cc: He Kuang --- tools/perf/util/evlist.c

Re: [PATCH 4/4] MAINTAINERS: mark bcache as orphan

On Tue, 24 May 2016, Joe Perches wrote: > > The submitted patches are not being reacted upon, and Jens is only picking  > > up stable fixes on an rather ad-hoc basis. > > > > Link: lkml.kernel.org/r/574462c5.40...@kernel.dk > > Signed-off-by: Jiri Kosina > > --- > >  

Re: [PATCH 4/4] MAINTAINERS: mark bcache as orphan

On Tue, 24 May 2016, Joe Perches wrote: > > The submitted patches are not being reacted upon, and Jens is only picking  > > up stable fixes on an rather ad-hoc basis. > > > > Link: lkml.kernel.org/r/574462c5.40...@kernel.dk > > Signed-off-by: Jiri Kosina > > --- > >  MAINTAINERS | 2 +- > >  1

[PATCH v5 0/8] perf tools: Support overwritable ring buffer

This patch set enables daemonized perf recording by utilizing overwritable backward ring buffer. With this feature one can put perf background, and dump ring buffer records by a SIGUSR2 when he/she find something unusual. For example, following command record system calls, schedule events and

[PATCH v5 5/8] perf record: Toggle overwrite ring buffer for reading

overwrite_evt_state is introduced to reflect the state of overwritable ring buffers. It is a state machine with 3 states: RUNNING --(1)--> DATA_PENDING --(2)--> EMPTY ^ ^ | | |___(disallow)___/| ||

Re: [PATCH v4 08/10] powerpc/powernv: Add platform support for stop instruction

Hi Shreyas, On Tue, May 24, 2016 at 06:45:12PM +0530, Shreyas B. Prabhu wrote: > POWER ISA v3 defines a new idle processor core mechanism. In summary, > a) new instruction named stop is added. This instruction replaces > instructions like nap, sleep, rvwinkle. > b) new per thread SPR

[PATCH v5 0/8] perf tools: Support overwritable ring buffer

This patch set enables daemonized perf recording by utilizing overwritable backward ring buffer. With this feature one can put perf background, and dump ring buffer records by a SIGUSR2 when he/she find something unusual. For example, following command record system calls, schedule events and

[PATCH v5 5/8] perf record: Toggle overwrite ring buffer for reading

overwrite_evt_state is introduced to reflect the state of overwritable ring buffers. It is a state machine with 3 states: RUNNING --(1)--> DATA_PENDING --(2)--> EMPTY ^ ^ | | |___(disallow)___/| ||

Re: [PATCH v4 08/10] powerpc/powernv: Add platform support for stop instruction

Hi Shreyas, On Tue, May 24, 2016 at 06:45:12PM +0530, Shreyas B. Prabhu wrote: > POWER ISA v3 defines a new idle processor core mechanism. In summary, > a) new instruction named stop is added. This instruction replaces > instructions like nap, sleep, rvwinkle. > b) new per thread SPR

[PATCH v5 1/8] perf tools: Check 'base' pointer before checking refcnt when put a mmap

evlist->mmap[i]->refcnt could be 0 if an evlist has no evsel or all evsels don't match the evlist during mmap. For example, when all evsels are overwritable but the evlist itself is normal. To avoid crashing, perf should check 'base' pointer before checking refcnt, and raise bug only when base is

[PATCH v5 6/8] perf tools: Enable overwrite settings

This patch allows following config terms and option: Globally setting events to overwrite; # perf record --overwrite ... Set specific events to be overwrite or no-overwrite. # perf record --event cycles/overwrite/ ... # perf record --event cycles/no-overwrite/ ... Add missing config terms

[PATCH v5 1/8] perf tools: Check 'base' pointer before checking refcnt when put a mmap

evlist->mmap[i]->refcnt could be 0 if an evlist has no evsel or all evsels don't match the evlist during mmap. For example, when all evsels are overwritable but the evlist itself is normal. To avoid crashing, perf should check 'base' pointer before checking refcnt, and raise bug only when base is

[PATCH v5 6/8] perf tools: Enable overwrite settings

This patch allows following config terms and option: Globally setting events to overwrite; # perf record --overwrite ... Set specific events to be overwrite or no-overwrite. # perf record --event cycles/overwrite/ ... # perf record --event cycles/no-overwrite/ ... Add missing config terms

[PATCH v5 4/8] perf record: Introduce rec->overwrite_evlist for overwritable events

Create an auxiliary evlist for overwritable events. Before mmap, build this evlist and set 'overwrite' and 'backward' attribute. Since perf_evlist__mmap_ex() only maps events when evsel->overwrite matches evlist's corresponding attributes, with these two evlists an event goes to either

[PATCH v5 3/8] perf tests: Add testcase for auxiliary evlist

Improve test backward-ring-buffer, trace both enter and exit event of prctl() syscall, utilize auxiliary evlist to mmap enter and exit event into separated mmaps. Signed-off-by: Wang Nan Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc:

[PATCH v5 8/8] perf tools: Check write_backward during evlist config

Before this patch, when using overwritable ring buffer on an old kernel, error message is misleading: # ~/perf record -m 1 -e raw_syscalls:*/overwrite/ -a Error: The raw_syscalls:sys_enter event is not supported. This patch output clear error message to tell user his/her kernel is too old:

[PATCH v5 4/8] perf record: Introduce rec->overwrite_evlist for overwritable events

Create an auxiliary evlist for overwritable events. Before mmap, build this evlist and set 'overwrite' and 'backward' attribute. Since perf_evlist__mmap_ex() only maps events when evsel->overwrite matches evlist's corresponding attributes, with these two evlists an event goes to either

[PATCH v5 3/8] perf tests: Add testcase for auxiliary evlist

Improve test backward-ring-buffer, trace both enter and exit event of prctl() syscall, utilize auxiliary evlist to mmap enter and exit event into separated mmaps. Signed-off-by: Wang Nan Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Masami Hiramatsu Cc: Namhyung Kim Cc: Zefan Li Cc: He

[PATCH v5 8/8] perf tools: Check write_backward during evlist config

Before this patch, when using overwritable ring buffer on an old kernel, error message is misleading: # ~/perf record -m 1 -e raw_syscalls:*/overwrite/ -a Error: The raw_syscalls:sys_enter event is not supported. This patch output clear error message to tell user his/her kernel is too old:

Re: [PATCH][v7] x86, suspend: Save/restore extra MSR registers for suspend

Hi Len, On Wed, May 25, 2016 at 12:09 AM, Len Brown wrote: > +mjg59, who may be seeing this issue on a skylake laptop > > Chen-yu, > > Great debugging, but I think there is a more general fix possible than > this DMI quirk. > > I agree that in this example, a grantley server, it

Re: [PATCH][v7] x86, suspend: Save/restore extra MSR registers for suspend

Hi Len, On Wed, May 25, 2016 at 12:09 AM, Len Brown wrote: > +mjg59, who may be seeing this issue on a skylake laptop > > Chen-yu, > > Great debugging, but I think there is a more general fix possible than > this DMI quirk. > > I agree that in this example, a grantley server, it seems the BIOS

Re: [RFC][PATCH 1/3] locking: Introduce smp_acquire__after_ctrl_dep

On Tue, May 24, 2016 at 11:01:21PM -0400, Waiman Long wrote: > On 05/24/2016 10:27 AM, Peter Zijlstra wrote: > >Introduce smp_acquire__after_ctrl_dep(), this construct is not > >uncommen, but the lack of this barrier is. > > > >Signed-off-by: Peter Zijlstra (Intel) > >--- > >

Re: [RFC][PATCH 1/3] locking: Introduce smp_acquire__after_ctrl_dep

On Tue, May 24, 2016 at 11:01:21PM -0400, Waiman Long wrote: > On 05/24/2016 10:27 AM, Peter Zijlstra wrote: > >Introduce smp_acquire__after_ctrl_dep(), this construct is not > >uncommen, but the lack of this barrier is. > > > >Signed-off-by: Peter Zijlstra (Intel) > >--- > >

[RESEND][PATCH] drivers: of: of_reserved_mem: fixup the CMA alignment not to affect dma-coherent

From: Jaewon There was an alignment mismatch issue for CMA and it was fixed by commit 1cc8e3458b51 ("drivers: of: of_reserved_mem: fixup the alignment with CMA setup"). However the way of the commit considers not only dma-contiguous(CMA) but also dma-coherent which has

[RESEND][PATCH] drivers: of: of_reserved_mem: fixup the CMA alignment not to affect dma-coherent

From: Jaewon There was an alignment mismatch issue for CMA and it was fixed by commit 1cc8e3458b51 ("drivers: of: of_reserved_mem: fixup the alignment with CMA setup"). However the way of the commit considers not only dma-contiguous(CMA) but also dma-coherent which has no that requirement.

Re: [PATCH v2 08/12] irqchip: add J-Core AIC driver

On Fri, May 20, 2016 at 09:15:56AM +0100, Marc Zyngier wrote: > On 20/05/16 03:53, Rich Felker wrote: > > Signed-off-by: Rich Felker > > --- > > My previous post of the patch series accidentally omitted omitted > > Cc'ing of subsystem maintainers for the necessary clocksource, >

Re: [PATCH v2 08/12] irqchip: add J-Core AIC driver

On Fri, May 20, 2016 at 09:15:56AM +0100, Marc Zyngier wrote: > On 20/05/16 03:53, Rich Felker wrote: > > Signed-off-by: Rich Felker > > --- > > My previous post of the patch series accidentally omitted omitted > > Cc'ing of subsystem maintainers for the necessary clocksource, > > irqchip, and

[PATCH] ARM64: dts: rockchip: add thermal zone node for rk3399 SoCs

This adds thermal zone node to rk3399 dtsi, rk3399 thermal data is including the cpu and gpu sensor zone node. At the moment, remove the rk3368 thermal data from rk399 dtsi. The thermal zone node is the node containing all the required info for describing a thermal zone, including its cooling

[PATCH] ARM64: dts: rockchip: add thermal zone node for rk3399 SoCs

This adds thermal zone node to rk3399 dtsi, rk3399 thermal data is including the cpu and gpu sensor zone node. At the moment, remove the rk3368 thermal data from rk399 dtsi. The thermal zone node is the node containing all the required info for describing a thermal zone, including its cooling

RE:Custom bags

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RE:Custom bags

Hi, Ronta(Xiamen)Co.,LTD, is a well established company working with bags, lanyards and other textile products for many experiences. With many years in this industry, we can offer the right products as what you requested in a short time, no matter it is a big or small order. Please don't

[PATCH 03/24] staging: unisys: visorbus: modify format string to match argument

From: David Binder Modifies the format string of snprintf to expect an unsigned int instead of a signed one, per the supplied argument. Signed-off-by: David Binder Signed-off-by: David Kershner ---

[PATCH 02/24] staging: unisys: visorbus: remove unused struct

From: David Binder Removes unused struct definition, channel_size_info, in response to findings by SonarQube. Signed-off-by: David Binder Signed-off-by: David Kershner ---

[PATCH 03/24] staging: unisys: visorbus: modify format string to match argument

From: David Binder Modifies the format string of snprintf to expect an unsigned int instead of a signed one, per the supplied argument. Signed-off-by: David Binder Signed-off-by: David Kershner --- drivers/staging/unisys/visorbus/visorbus_main.c | 2 +- 1 file changed, 1 insertion(+), 1

[PATCH 02/24] staging: unisys: visorbus: remove unused struct

From: David Binder Removes unused struct definition, channel_size_info, in response to findings by SonarQube. Signed-off-by: David Binder Signed-off-by: David Kershner --- drivers/staging/unisys/visorbus/visorbus_main.c | 6 -- 1 file changed, 6 deletions(-) diff --git

Re: [PATCH 0/7] x86: uaccess hardening, easy part

On Tue, May 24, 2016 at 6:48 PM, Andy Lutomirski wrote: > This series hardens x86's uaccess code a bit. It adds warnings for > some screwups, adds an OOPS for a major exploitable screwup, and it > improves debuggability a bit by indicating non-default fs in oopses. > > It

Re: [PATCH 0/7] x86: uaccess hardening, easy part

On Tue, May 24, 2016 at 6:48 PM, Andy Lutomirski wrote: > This series hardens x86's uaccess code a bit. It adds warnings for > some screwups, adds an OOPS for a major exploitable screwup, and it > improves debuggability a bit by indicating non-default fs in oopses. > > It shouldn't cause any new

[PATCH 07/24] staging: unisys: visorinput: remove unnecessary locking

From: Tim Sell Locking in the _interrupt() function is NOT necessary so long as we ensure that interrupts have been stopped whenever we need to pause or resume the device, which we now do. While a device is paused, we ensure that interrupts stay disabled, i.e. that the

[PATCH 23/24] Documentation: Move visorbus documentation from staging to Documentation/

This patch simple does a git mv of the drivers/staging/unisys/Documentation directory to Documentation. Renames overview.txt to visorbus.txt and renames sysfs-platform-visorchipset to the correct name sysfs-bus-visorbus. Signed-off-by: David Kershner ---

[PATCH 07/24] staging: unisys: visorinput: remove unnecessary locking

From: Tim Sell Locking in the _interrupt() function is NOT necessary so long as we ensure that interrupts have been stopped whenever we need to pause or resume the device, which we now do. While a device is paused, we ensure that interrupts stay disabled, i.e. that the _interrupt() function

[PATCH 23/24] Documentation: Move visorbus documentation from staging to Documentation/

This patch simple does a git mv of the drivers/staging/unisys/Documentation directory to Documentation. Renames overview.txt to visorbus.txt and renames sysfs-platform-visorchipset to the correct name sysfs-bus-visorbus. Signed-off-by: David Kershner --- .../ABI/stable/sysfs-bus-visorbus

[PATCH 00/24] Fixes comments made by tglx, then move visorbus to drivers/virt

tglx: The following patchset fixes issues you raised during your code review of visorbus on 5/18. Greg: I understand that you aren't currently accepting new patces for staging-next, I just wanted to get the following patches out for review. This patchset requires additiional patches that have

[PATCH 01/24] staging: unisys: visorbus: remove unused module parameters

From: David Binder Removes unused module parameters from visorbus_main.c, in response to findings by SonarQube. Signed-off-by: David Binder Signed-off-by: David Kershner ---

[PATCH 00/24] Fixes comments made by tglx, then move visorbus to drivers/virt

tglx: The following patchset fixes issues you raised during your code review of visorbus on 5/18. Greg: I understand that you aren't currently accepting new patces for staging-next, I just wanted to get the following patches out for review. This patchset requires additiional patches that have

[PATCH 01/24] staging: unisys: visorbus: remove unused module parameters

From: David Binder Removes unused module parameters from visorbus_main.c, in response to findings by SonarQube. Signed-off-by: David Binder Signed-off-by: David Kershner --- drivers/staging/unisys/visorbus/visorbus_main.c | 9 + 1 file changed, 1 insertion(+), 8 deletions(-) diff

RE: [PATCH v8 08/14] usb: otg: add OTG/dual-role core

> -Original Message- > From: Peter Chen [mailto:hzpeterc...@gmail.com] > Sent: Wednesday, May 25, 2016 10:44 AM > To: Roger Quadros > Cc: peter.c...@freescale.com; ba...@kernel.org; t...@atomide.com; > gre...@linuxfoundation.org; dan.j.willi...@intel.com; >

[PATCH 05/24] staging: unisys: include: Remove thread-related enum members

From: David Binder Code relating to ktheads was previously removed from s-Par driver code. This patch cleans up lingering remnants of kthreads by removing thread- related enum types. Signed-off-by: David Binder Signed-off-by: David Kershner

RE: [PATCH v8 08/14] usb: otg: add OTG/dual-role core

> -Original Message- > From: Peter Chen [mailto:hzpeterc...@gmail.com] > Sent: Wednesday, May 25, 2016 10:44 AM > To: Roger Quadros > Cc: peter.c...@freescale.com; ba...@kernel.org; t...@atomide.com; > gre...@linuxfoundation.org; dan.j.willi...@intel.com; >

[PATCH 05/24] staging: unisys: include: Remove thread-related enum members

From: David Binder Code relating to ktheads was previously removed from s-Par driver code. This patch cleans up lingering remnants of kthreads by removing thread- related enum types. Signed-off-by: David Binder Signed-off-by: David Kershner ---

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