[PATCH v17 4/6] fpga: add fpga bridge framework

sable * fpga_bridges_put Signed-off-by: Alan Tull --- v2: Minor cleanup v12: Bump version to line up with simple fpga bus Remove sysfs Improve get/put functions, get the low level driver too. Clean up class implementation Add kernel doc documentation Rename (un)register_fpga_b

[PATCH v17 5/6] fpga: fpga-region: device tree control for FPGA

FPGA Regions support programming FPGA under control of the Device Tree. Signed-off-by: Alan Tull --- v9: initial version (this patch added during rest of patchset's v9) v10: request deferral if fpga mgr or bridges not available yet cleanup as fpga manager core goes into the real k

[PATCH v17 2/6] ARM: socfpga: add bindings document for fpga bridge drivers

Add bindings documentation for Altera SOCFPGA bridges: * fpga2sdram * fpga2hps * hps2fpga * lwhps2fpga Signed-off-by: Alan Tull Signed-off-by: Matthew Gerlach Signed-off-by: Dinh Nguyen --- v2: separate into 2 documents for the 2 drivers v12: bump version to line up with simple-fpga-bus

[PATCH v17 3/6] add sysfs document for fpga bridge class

Add documentation for new FPGA bridge class's sysfs interface. Signed-off-by: Alan Tull -- v15: Document added in v15 of patch set v16: No change to this patch in v16 of patch set v17: No change to this patch in v17 of patch set --- Documentation/ABI/testing/sysfs-class-fpga-bridge |

[PATCH] of/overlay: add of overlay notifications

of_overlay_notify_data { struct device_node *overlay; struct device_node *target; }; Signed-off-by: Alan Tull --- drivers/of/overlay.c | 47 ++- include/linux/of.h | 25 + 2 files changed, 71 insertions(+), 1 deletion(-) diff

[PATCH v17 6/6] ARM: socfpga: fpga bridge driver support

the bridge during probe. If the property does not exist, the driver will leave the bridge in its current state. Signed-off-by: Alan Tull Signed-off-by: Matthew Gerlach Signed-off-by: Dinh Nguyen --- v2: Use resets instead of directly writing reset registers v12: Bump version to align with simpl

[PATCH v4 0/2] socfpga: support suspend to ram

tree binding document for the Altera SOCFPGA SDRAM controller that is used to put DDR in self-refresh mode. Alan Tull (2): ARM: socfpga: support suspend to ram ARM: socfpga: dts: add sdram controller dt binding doc .../arm/altera/socfpga-sdram-controller.txt| 12 ++ arch

[PATCH v4 2/2] ARM: socfpga: dts: add sdram controller dt binding doc

Add binding doc for Altera SOCFPGA SDRAM controller. Signed-off-by: Alan Tull --- v4: Add bindings doc --- .../arm/altera/socfpga-sdram-controller.txt| 12 1 file changed, 12 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram

[PATCH v4 1/2] ARM: socfpga: support suspend to ram

/power/state Signed-off-by: Alan Tull Cc: Pavel Machek Cc: Arnd Bergmann Cc: Dinh Nguyen Cc: Steffen Trumtrar --- v2: use Generic on-chip SRAM driver to allocate ocram rm fncpy_align since generic allocator handles alignment check __arm_ioremap_exec return code check for NULL po

[PATCH 0/2] TTY Driver for Newhaven LCD module

Supports a 2 line by 16 character LCD module over I2C. Alan Tull (2): newhaven lcd: device tree bindings documentation add newhaven lcd tty driver on i2c .../devicetree/bindings/tty/newhaven_lcd.txt | 21 + drivers/tty/Kconfig|5 + drivers/tty

[PATCH 1/2] newhaven lcd: device tree bindings documentation

Add documention for the newhaven lcd device tree bindings. Signed-off-by: Alan Tull --- .../devicetree/bindings/tty/newhaven_lcd.txt | 21 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/tty/newhaven_lcd.txt diff --git a

[PATCH 2/2] add newhaven lcd tty driver on i2c

ghtness can be set from the device tree/plat data. Brightness can be set from a sysfs file, for example: * echo 6 > /sys/devices/soc.0/ffc04000.i2c/i2c-0/0-0028/brightness Signed-off-by: Alan Tull --- drivers/tty/Kconfig|5 + drivers/tty/Makefile

Re: [PATCH v9 0/3] gpio: dwapb: add gpio-signaled acpi event support for power button

aiting for v10 at least tomorrow or even next week. > > Linus, for my point of view next version should be fine and final. The > current code is in a good shape already. Reviewed, tested v9, looks good. Alan Tull > >> >> Changes v7 -> v8: >>- fixed few mino

Re: [PATCH v5 1/3] gpio: designware: convert device node to fwnode

On Fri, Mar 4, 2016 at 1:44 AM, qiujiang wrote: > This patch converts device node to fwnode in > dwapb_port_property for designware gpio driver, > so as to provide a unified data structure for DT > and ACPI bindings. > > Acked-by: Andy Shevchenko > Signed-off-by: qiujiang > --- > drivers/gpio/g

Re: [PATCH v5 0/3] "gpio: designware: add gpio-signaled acpi event support for power button"

On Tue, Mar 8, 2016 at 8:26 PM, Linus Walleij wrote: > On Fri, Mar 4, 2016 at 2:44 PM, qiujiang wrote: > >> This patchset adds gpio-signaled acpi events support for power button on >> hisilicon >> D02 board. >> >> The three patches respectively: >> - convert device node to fwnode >>

Re: [GIT PULL] of: overlay: validation checks, subsequent fixes for v20 -- correction: v4.20

On Fri, Nov 9, 2018 at 12:58 AM Frank Rowand wrote: What LTSI's are these patches likely to end up in? Just to be clear, I'm not pushing for any specific answer, I just want to know what to expect. Thanks, Alan > > On 11/8/18 10:56 PM, Frank Rowand wrote: > > Hi Rob, > > > > Please pull the ch

Re: [GIT PULL] of: overlay: validation checks, subsequent fixes for v20 -- correction: v4.20

On Mon, Feb 11, 2019 at 1:13 PM Greg Kroah-Hartman wrote: > > On Mon, Feb 11, 2019 at 12:41:40PM -0600, Alan Tull wrote: > > On Fri, Nov 9, 2018 at 12:58 AM Frank Rowand wrote: > > > > What LTSI's are these patches likely to end up in? Just to be clear, > &g

Re: [PATCH v3] fpga: altera_freeze_bridge: remove restriction to socfpga

On Sat, Jan 19, 2019 at 6:41 PM Moritz Fischer wrote: > > On Tue, Jan 15, 2019 at 6:01 PM Alan Tull wrote: > > > > The Altera Freeze Bridge should not be restricted to ARCH_SOCFPGA > > since it can be used on other platforms such as Stratix10. > > > > Sig

Re: [PATCH] ARM: socfpga: fix base address of SDR controller

On Tue, Jan 29, 2019 at 2:09 PM Simon Goldschmidt wrote: Hi Simon, Thanks for submitting. A couple of things... > diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi > index f365003f0..8f6c1a5d6 100644 > --- a/arch/arm/boot/dts/socfpga.dtsi > +++ b/arch/arm/boot/dts/s

[PATCH v3] fpga: altera_freeze_bridge: remove restriction to socfpga

The Altera Freeze Bridge should not be restricted to ARCH_SOCFPGA since it can be used on other platforms such as Stratix10. Signed-off-by: Alan Tull --- v2: add depends on HAS_IOMEM v3: put both dependencies on one line --- drivers/fpga/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1

Re: [PATCH] fpga: altera_freeze_bridge: remove restriction to socfpga

On Fri, Jan 11, 2019 at 12:42 PM Moritz Fischer wrote: Hi Moritz, > > Hi Alan, > > On Thu, Jan 10, 2019 at 3:06 PM Alan Tull wrote: > > > > The Altera Freeze Bridge should not be restricted to ARCH_SOCFPGA > > since it can be used on other platforms such as St

[PATCH v2] fpga: altera_freeze_bridge: remove restriction to socfpga

The Altera Freeze Bridge should not be restricted to ARCH_SOCFPGA since it can be used on other platforms such as Stratix10. Signed-off-by: Alan Tull --- drivers/fpga/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index

Re: [PATCH v2] fpga: altera_freeze_bridge: remove restriction to socfpga

On Tue, Jan 15, 2019 at 11:47 AM Dinh Nguyen wrote: > > minor nit > > On 1/14/19 4:33 PM, Alan Tull wrote: > > The Altera Freeze Bridge should not be restricted to ARCH_SOCFPGA > > since it can be used on other platforms such as Stratix10. > > > > Signed-off

Re: [PATCHv1] firmware: intel_stratix10_service: add hardware dependency

On Wed, Jan 23, 2019 at 10:00 AM Greg KH wrote: Hi Greg, > > On Wed, Jan 23, 2019 at 09:47:56AM -0600, richard.g...@linux.intel.com wrote: > > From: Richard Gong > > > > Add a Kconfig dependency to ensure Intel Stratix10 service layer driver > > can be built only on the platform that supports i

Re: [PATCHv1] firmware: intel_stratix10_service: add hardware dependency

On Wed, Jan 23, 2019 at 10:42 AM Dinh Nguyen wrote: > > > > On 1/23/19 10:37 AM, Alan Tull wrote: > > On Wed, Jan 23, 2019 at 10:00 AM Greg KH wrote: > > > > Hi Greg, > > > >> > >> On Wed, Jan 23, 2019 at 09:47:56AM -0600, richard.g...

Re: [PATCH] fpga: mgr: altera-ps-spi: make array dummy static, shrinks object size

ec hex filename >73712032 0940324bb drivers/fpga/altera-ps-spi.o > > After: >textdata bss dec hex filename >72812096 0937724a1 drivers/fpga/altera-ps-spi.o > > (gcc version 8.2.0 x86_64) > > Signed-off-by:

[PATCH 1/3] fpga: stratix10-soc: fix wrong of_node_put() in init function

tly decreasing the refcount on that node again. This patch removes the unwarranted call to of_node_put(). Fixes: e7eef1d7633a ("fpga: add intel stratix10 soc fpga manager driver") Signed-off-by: Nicolas Saenz Julienne Acked-by: Alan Tull Acked-by: Moritz Fischer --- drivers/fpga/s

[PATCH 2/3] fpga: altera_freeze_bridge: remove restriction to socfpga

The Altera Freeze Bridge should not be restricted to ARCH_SOCFPGA since it can be used on other platforms such as Stratix10. Signed-off-by: Alan Tull Reviewed-by: Moritz Fischer --- drivers/fpga/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/fpga/Kconfig b

[PATCH 0/3] patches for FPGA

ther two can go in whenever is appropriate. Thanks, Alan Alan Tull (1): fpga: altera_freeze_bridge: remove restriction to socfpga Colin Ian King (1): fpga: mgr: altera-ps-spi: make array dummy static, shrinks object size Nicolas Saenz Julienne (1): fpga: stratix10-soc: fix wrong of_nod

[PATCH 3/3] fpga: mgr: altera-ps-spi: make array dummy static, shrinks object size

data bss dec hex filename 72812096 0937724a1 drivers/fpga/altera-ps-spi.o (gcc version 8.2.0 x86_64) Signed-off-by: Colin Ian King Acked-by: Alan Tull Acked-by: Moritz Fischer --- drivers/fpga/altera-ps-spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

Re: [PATCH v2 02/18] fpga: dfl: fme: remove copy_to_user() in ioctl for PR

ioctl. > > > > Signed-off-by: Xu Yilun > > Signed-off-by: Wu Hao > Acked-by: Moritz Fischer Acked-by: Alan Tull Alan > > --- > > v2: clean up code split from patch 2 in v1 patchset. > > --- > > drivers/fpga/dfl-fme-pr.c | 3 --- > > 1 file

Re: [PATCH v2 12/18] fpga: dfl: afu: add error reporting support.

> > Signed-off-by: Xu Yilun > Signed-off-by: Wu Hao Acked-by: Alan Tull Thanks! Alan > --- > v2: add more error code description for error clear sysfs in doc. > return -EINVAL instead of -EBUSY when input error code doesn't > match in error clear sysfs.

Re: [PATCH v2 17/18] fpga: dfl: fme: add global error reporting support

interfaces to > report different error detected by the hardware, and allow > user to clear errors or inject error for testing purpose. > > Signed-off-by: Luwei Kang > Signed-off-by: Ananda Ravuri > Signed-off-by: Xu Yilun > Signed-off-by: Wu Hao Acked-by: Alan Tull > -

[PATCH 4/4] fpga: dfl: expand minor range when registering chrdev region

From: Chengguang Xu Actually, total amount of available minor number for a single major is MINORMASK + 1. So expand minor range when registering chrdev region. Signed-off-by: Chengguang Xu Acked-by: Wu Hao Acked-by: Alan Tull --- drivers/fpga/dfl.c | 6 +++--- 1 file changed, 3 insertions

[PATCH 0/4] patches for FPGA

Hi Greg, Please take these four fpga fixes patches. They have been reviewed on the mailing list and apply cleanly on current linux-next and char-misc-testing. Thanks, Alan Chengguang Xu (1): fpga: dfl: expand minor range when registering chrdev region Scott Wood (2): fpga: dfl: afu: Pass t

[PATCH 3/4] fpga: dfl: Add lockdep classes for pdata->lock

0a177 R09: 7ffe4cae0e40 [ 409.969984] R10: 7ffe4cae0160 R11: 0202 R12: 7ffe4cae0df0 [ 409.977115] R13: b680 R14: R15: 7ffe4cae0f60 Signed-off-by: Scott Wood Acked-by: Wu Hao Acked-by: Alan Tull --- drivers/fpga/dfl.c | 16 +++- 1

[PATCH 1/4] fpga: stratix10-soc: fix use-after-free on s10_init()

ga manager driver") Signed-off-by: Wen Yang Cc: Alan Tull Cc: Moritz Fischer Cc: Nicolas Saenz Julienne Cc: linux-f...@vger.kernel.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Moritz Fischer Reviewed-by: Nicolas Saenz Julienne Acked-by: Alan Tull --- drivers/fpga/stratix10-soc.c | 6

[PATCH 2/4] fpga: dfl: afu: Pass the correct device to dma_mapping_error()

Acked-by: Alan Tull --- drivers/fpga/dfl-afu-dma-region.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/fpga/dfl-afu-dma-region.c b/drivers/fpga/dfl-afu-dma-region.c index 0bbc7142f1dc..f7d268f45df0 100644 --- a/drivers/fpga/dfl-afu-dma-region.c +++ b/drivers/fpga/dfl

Re: [PATCH v2 05/18] Documentation: fpga: dfl: add descriptions for virtualization and new interfaces.

On Thu, May 16, 2019 at 11:27 PM Wu Hao wrote: > > On Thu, May 16, 2019 at 12:53:00PM -0500, Alan Tull wrote: > > On Thu, May 16, 2019 at 12:36 PM Alan Tull wrote: > > > > > > On Mon, Apr 29, 2019 at 4:12 AM Wu Hao wrote: > > > > Hi Hao, > > >

Re: [PATCH 07/17] fpga: dfl: afu: add AFU state related sysfs interfaces

y transient APx state, > and manage AFU's LTR (latency tolerance reporting). > > Signed-off-by: Ananda Ravuri > Signed-off-by: Xu Yilun > Signed-off-by: Wu Hao Acked-by: Alan Tull Thanks, Alan

Re: [PATCH 02/17] fpga: dfl: fme: align PR buffer size per PR datawidth

On Mon, Mar 25, 2019 at 7:44 PM Wu Hao wrote: > > On Mon, Mar 25, 2019 at 12:50:40PM -0500, Alan Tull wrote: > > On Sun, Mar 24, 2019 at 10:23 PM Wu Hao wrote: > > > > Hi Hao, > > > > Looks good, one question below. > > > > > > > > Curr

Re: [PATCH 06/17] fpga: dfl: pci: enable SRIOV support.

gt; Signed-off-by: Xu Yilun > Signed-off-by: Wu Hao Acked-by: Alan Tull

Re: [PATCH 05/17] fpga: dfl: fme: add DFL_FPGA_FME_PORT_RELEASE/ASSIGN ioctl support.

ice of given port back to PF, it configures >PF/VF access mode to PF, then adds port platform device back to >re-enable related userspace interfaces on PF. > > Signed-off-by: Zhang Yi Z > Signed-off-by: Xu Yilun > Signed-off-by: Wu Hao Acked-by: Alan Tull

Re: [PATCH v2 16/18] fpga: dfl: fme: add power management support

On Mon, Apr 29, 2019 at 4:13 AM Wu Hao wrote: + hwmon folks > > This patch adds support for power management private feature under > FPGA Management Engine (FME). This private feature driver registers > a hwmon for power (power1_input), thresholds information, e.g. > (power1_cap / crit) and also

Re: [PATCH v2 15/18] fpga: dfl: fme: add thermal management support

On Mon, Apr 29, 2019 at 4:13 AM Wu Hao wrote: + The hwmon people > > This patch adds support to thermal management private feature for DFL > FPGA Management Engine (FME). This private feature driver registers > a hwmon for thermal/temperature monitoring (hwmon temp1_input). > If hardware automat

Re: [PATCH] fpga: zynqmp-fpga: Correctly handle error pointer

On Tue, May 7, 2019 at 12:03 PM Moritz Fischer wrote: Hi Moritz, > > Fixes the following static checker error: > > drivers/fpga/zynqmp-fpga.c:50 zynqmp_fpga_ops_write() > error: 'eemi_ops' dereferencing possible ERR_PTR() > > Note: This does not handle the EPROBE_DEFER value in a > special

Re: [PATCH v2] fpga: zynqmp-fpga: Correctly handle error pointer

_ops_state() > error: 'eemi_ops' dereferencing possible ERR_PTR() > > Note: This does not handle the EPROBE_DEFER value in a > special manner. > > Fixes commit c09f7471127e ("fpga manager: Adding FPGA Manager support for > Xilinx zynqmp") > Reported-by: Da

Re: [PATCH] MAINTAINERS: fpga: hand off maintainership to Moritz

On Sun, Jun 16, 2019 at 10:35 PM Moritz Fischer wrote: Hi Moritz, > > Hi Alan, > > On Sun, Jun 16, 2019 at 10:11:13PM -0500, Alan Tull wrote: > > I'm moving on to a new position and stepping down as FPGA subsystem > > maintainer. Moritz has graciously agreed to tak

Re: [PATCH] MAINTAINERS: fpga: hand off maintainership to Moritz

On Tue, Jun 18, 2019 at 2:17 AM Greg Kroah-Hartman wrote: > > On Sun, Jun 16, 2019 at 10:11:13PM -0500, Alan Tull wrote: > > I'm moving on to a new position and stepping down as FPGA subsystem > > maintainer. Moritz has graciously agreed to take over the > > maintain

Re: [PATCH v3 3/3] fpga manager: Adding FPGA Manager support for Xilinx zynqmp

On Tue, Feb 12, 2019 at 5:06 AM Moritz Fischer wrote: Hi Nava, > > + mgr = fpga_mgr_create(dev, "Xilinx ZynqMP FPGA Manager", > > + &zynqmp_fpga_ops, priv); Please use the new devm_fpga_mgr_create() > > + if (!mgr) > > + return -ENOMEM; > >

Re: [PATCH 01/17] fpga: dfl-fme-mgr: fix FME_PR_INTFC_ID register address.

by: Wu Hao Acked-by: Alan Tull Thanks, Alan > --- > drivers/fpga/dfl-fme-mgr.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/fpga/dfl-fme-mgr.c b/drivers/fpga/dfl-fme-mgr.c > index 76f3770..b3f7eee 100644 > --- a/drivers/fpga/dfl-fme-m

Re: [PATCH 02/17] fpga: dfl: fme: align PR buffer size per PR datawidth

On Sun, Mar 24, 2019 at 10:23 PM Wu Hao wrote: Hi Hao, Looks good, one question below. > > Current driver checks if input bitstream file size is aligned or > not per PR data width (default 32bits). It requires one additional > step for end user when they generate the bitstream file, padding > e

Re: [PATCH 03/17] fpga: dfl: fme: support 512bit data width PR

r test > result. > > Please note now this optimization is only done on revision 2 > of this PR private feature which is only used in integrated > solution that AVX512 is always supported. > > Signed-off-by: Ananda Ravuri > Signed-off-by: Xu Yilun > Signed-off-by: Wu Hao Acked-by: Alan Tull

[PATCH] fpga: altera_freeze_bridge: remove restriction to socfpga

The Altera Freeze Bridge should not be restricted to ARCH_SOCFPGA since it can be used on other platforms such as Stratix10. Signed-off-by: Alan Tull --- drivers/fpga/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index

[PATCH 5/5] fpga: dfl-fme-region: Use platform_get_drvdata()

From: Moritz Fischer Use platform_get_drvdata() in remove() function of the platform driver rather than dev_get_drvdata() to match the platform_set_drvdata in the probe(). Signed-off-by: Moritz Fischer Acked-by: Alan Tull --- drivers/fpga/dfl-fme-region.c | 2 +- 1 file changed, 1 insertion

[PATCH 0/5] fpga: patches for v4.19

Hi Greg, Please take these five small patches for FPGA. They have been reviewed on the mailing lists and apply cleanly on linux-next/master and char-misc-testing. Thanks, Alan Alan Tull (3): fpga: do not access region struct after fpga_region_unregister fpga: bridge: fix obvious function

[PATCH 2/5] fpga: bridge: fix obvious function documentation error

fpga_bridge_dev_match() returns a FPGA bridge struct, not a FPGA manager struct so s/manager/bridge/. Signed-off-by: Alan Tull Acked-by: Moritz Fischer --- drivers/fpga/fpga-bridge.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/fpga/fpga-bridge.c b/drivers/fpga

[PATCH 4/5] fpga: of-fpga-region: Use platform_set_drvdata

From: Moritz Fischer Use platform_set_drvdata rather than dev_set_drvdata to match the platform_get_drvdata in the _remove() function of the platform driver. Signed-off-by: Moritz Fischer Acked-by: Alan Tull --- drivers/fpga/of-fpga-region.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion

[PATCH 3/5] docs: fpga: document fpga manager flags

Add flags #defines to kerneldoc documentation in a useful place. Signed-off-by: Alan Tull Acked-by: Moritz Fischer --- Documentation/driver-api/fpga/fpga-mgr.rst | 5 + include/linux/fpga/fpga-mgr.h | 20 ++-- 2 files changed, 19 insertions(+), 6 deletions

[PATCH 1/5] fpga: do not access region struct after fpga_region_unregister

A couple drivers were accessing the region struct after it had been freed. Save off the pointer to the mgr before the region struct gets freed. Signed-off-by: Alan Tull Acked-by: Moritz Fischer --- drivers/fpga/dfl-fme-region.c | 4 +++- drivers/fpga/of-fpga-region.c | 3 ++- 2 files changed

Re: [PATCH] fpga: region: fix spelling mistake "partion" -> "partition"

On Tue, Sep 11, 2018 at 7:37 AM Colin King wrote: Hi Colin, > > From: Colin Ian King > > Trivial fix to spelling mistake in the documentation I took a look, there's other misspellings in this doc. I'd like to get them all in one patch if possible. If I have time I'll add them to this patch o

Portable DT Connectors with regard to FPGAs

My interest here was in having some discussion on whether connectors are a good match for handling FPGAs. The relevant use model is where a user applies a DT overlay targeting an FPGA region after the kernel has booted. That overlay initiates FPGA programming and then adds nodes for the new FPGA

[PATCH] dt-bindings: fpga: fix freeze controller compatible in region doc

Documentation/devicetree/bindings/fpga/fpga-region.txt has an error regarding the freeze controller bridge, secifically: compatible = "altr,freeze-bridge"; The compatibility string should be "altr,freeze-bridge-controller" as set forth in altera-freeze-bridge.txt. Sign

Re: [PATCH] dt-bindings: fpga: fix freeze controller compatible in region doc

t, yet? It's taken two years for anybody to notice and complain about it :) so the effect has not been very terrible. But it's good to correct it since it's been noticed. > > On Thu, Sep 06, 2018 at 01:01:52PM -0500, Alan Tull wrote: > > Documentation/devicetree/binding

Re: [PATCH v5 07/28] fpga: dfl: add chardev support for feature devices

On Wed, Jun 6, 2018 at 7:24 AM, Wu Hao wrote: Hi Hao, One more... >> > +static dev_t dfl_get_devt(enum dfl_fpga_devt_type type, int id) >> > +{ >> > + WARN_ON(type >= DFL_FPGA_DEVT_MAX); >> > + >> > + return MKDEV(MAJOR(dfl_chrdevs[type].devt), id); >> > +} >> > + >> > +/** >> > + *

Re: [PATCH v5 04/28] fpga: mgr: add compat_id support

On Sun, May 20, 2018 at 10:03 PM, Wu Hao wrote: > On Mon, May 07, 2018 at 04:09:06PM -0500, Alan Tull wrote: >> On Tue, May 1, 2018 at 9:50 PM, Wu Hao wrote: >> >> Hi Hao, >> >> Looks good! >> >> > This patch introduces compat_id support to fpga m

Re: [PATCH 1/6] fpga: region: don't use drvdata in common fpga code

On Thu, Mar 29, 2018 at 12:01 PM, Greg KH wrote: Hi Greg, > On Thu, Mar 29, 2018 at 08:36:53AM -0700, Moritz Fischer wrote: >> From: Alan Tull >> >> Part of patchset that changes the following fpga_*_register >> functions to not set drvdata: >> * fpga_region

Re: [PATCH 4/6] fpga: region: change fpga_region_register to have one param

On Thu, Mar 29, 2018 at 12:06 PM, Greg KH wrote: Hi Greg, >> -int fpga_region_register(struct device *dev, struct fpga_region *region) >> +int fpga_region_register(struct fpga_region *region) >> { >> + struct device *dev = region->parent; >> int id, ret = 0; >> >> + if (!dev) { >>

Re: [PATCHv3 4/7] dt-bindings: fpga: add Stratix10 SoC FPGA manager binding

On Tue, Mar 27, 2018 at 3:20 PM, wrote: > From: Alan Tull > > Add a Device Tree binding for the Intel Stratix10 SoC FPGA manager. > > Signed-off-by: Alan Tull > --- > v2: this patch is added in patch set version 2 > v3: change to put fpga_mgr node under firmware/svc no

Re: [PATCH v4 04/24] fpga: add device feature list support

2018 at 12:21:23PM -0500, Alan Tull wrote: >> On Thu, Mar 22, 2018 at 11:33 PM, Wu Hao wrote: >> >> >> > + >> >> > +/* >> >> > + * This function resets the FPGA Port and its accelerator (AFU) by >> >> > function >> >> &

Re: [PATCH 4/6] fpga: region: change fpga_region_register to have one param

On Thu, Mar 29, 2018 at 4:39 PM, Moritz Fischer wrote: > On Thu, Mar 29, 2018 at 03:42:51PM -0500, Alan Tull wrote: >> On Thu, Mar 29, 2018 at 12:06 PM, Greg KH wrote: >> >> Hi Greg, >> >> >> -int fpga_region_register(struct device *dev,

Re: [PATCH v9 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

On Mon, Apr 2, 2018 at 10:13 AM, Paolo Pisati wrote: Hi Paolo, Thanks for making the changes I asked for. Except... is there a reason to not get state in machxo2_spi_state? It turns out the API will change again. I can do the fixup when that happens. Alan > This patch adds support to the FP

Re: [PATCH v9 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support

On Mon, Apr 2, 2018 at 12:43 PM, kbuild test robot wrote: This is complaining because Paolo's patch was rebased onto a branch that had an API change. Alan > Hi Paolo, > > Thank you for the patch! Yet something to improve: > > [auto build test ERROR on linus/master] > [also build test ERROR on v

Re: [PATCH v4 04/24] fpga: add device feature list support

On Sun, Apr 1, 2018 at 11:22 PM, Wu Hao wrote: > On Thu, Mar 29, 2018 at 04:57:22PM -0500, Alan Tull wrote: >> On Mon, Mar 26, 2018 at 9:35 PM, Wu Hao wrote: >> >> Hi Hao, >> >> Currently there is one set of functions that handles port enable, >> disable

Re: [PATCH v7 2/5] of: change overlay apply input data from unflattened to FDT

On Tue, Apr 24, 2018 at 12:29 AM, Jan Kiszka wrote: > On 2018-04-24 00:38, Frank Rowand wrote: >> Hi Jan, >> >> + Alan Tull for fpga perspective >> >> On 04/22/18 03:30, Jan Kiszka wrote: >>> On 2018-04-11 07:42, Jan Kiszka wrote: >>>> On 20

Re: [PATCH 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description

t; Acked-by: Rob Herring > Acked-by: Moritz Fischer Acked-by: Alan Tull Thanks, Alan >> --- >> .../bindings/fpga/lattice-machxo2-spi.txt | 29 >> ++ >> 1 file changed, 29 insertions(+) >> create mode 100644 >> Documenta

Re: [PATCH v5 00/28] FPGA Device Feature List (DFL) Device Drivers

to drivers/fpga folder. > - Update the intel-fpga.txt documentation for new driver organization. > - Add documentation for new sysfs interfaces. > - Switch to use common fpga-region interface for partial reconfiguration > (PR) function in FME. It creates fpga-region/fpga-mgr/fpga-brid

Re: [PATCH v5 04/28] fpga: mgr: add compat_id support

be used for compatibility checking before doing partial > reconfiguration to associated fpga regions. > > Signed-off-by: Wu Hao Acked-by: Alan Tull > --- > include/linux/fpga/fpga-mgr.h | 13 + > 1 file changed, 13 insertions(+) > > diff --git a/include/linux/fpga/

Re: [PATCH v5 05/28] fpga: region: add compat_id support

er region compat_id for compatibility > checking before other actions on this fpga-region (e.g PR). > > Signed-off-by: Wu Hao Acked-by: Alan Tull > --- > v5: use pointer for compat_id as it's optional to implement. > --- > Documentation/ABI/testing/sysfs-class-fpga-region

Re: [PATCH v5 19/28] fpga: dfl: fme-mgr: add compat_id support

On Tue, May 1, 2018 at 9:50 PM, Wu Hao wrote: Hi Hao, > This patch adds compat_id support to fme manager driver, it > reads the ID from the hardware register. And it could be used > for compatibility check before partial reconfiguration. > > Signed-off-by: Wu Hao Acke

Re: [PATCH v5 22/28] fpga: dfl: fme-region: add support for compat_id

On Tue, May 1, 2018 at 9:50 PM, Wu Hao wrote: Hi Hao, > This patch adds compat_id support, it reuses fme manager's > compat id, as the per region compat id is actually from the > fme manager's register. > > Signed-off-by: Wu Hao Acked-by: Alan Tull > --- > v5

[GIT PULL] fpga: Updates for 4.10-rc2

Hi Greg, Please pull these changes for FPGA. Thanks! Alan The following changes since commit e3d31bda06e43968cd215ae590eb7cda827f01e9: Add linux-next specific files for 20161224 (2017-01-04 10:26:49 -0600) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/g

Re: [GIT PULL] fpga: Updates for 4.10-rc2

On Wed, Jan 4, 2017 at 3:28 PM, Greg Kroah-Hartman wrote: > On Wed, Jan 04, 2017 at 02:00:23PM -0600, Alan Tull wrote: >> Hi Greg, >> >> Please pull these changes for FPGA. >> >> Thanks! >> Alan >> >> The following changes since commit e3d31bda

Re: [GIT PULL] fpga: Updates for 4.10-rc2

On Thu, Jan 5, 2017 at 1:51 AM, Greg Kroah-Hartman wrote: > On Wed, Jan 04, 2017 at 03:53:18PM -0600, Alan Tull wrote: >> On Wed, Jan 4, 2017 at 3:28 PM, Greg Kroah-Hartman >> wrote: >> > On Wed, Jan 04, 2017 at 02:00:23PM -0600, Alan Tull wrote: >> >> Hi

Re: [PATCH v3 fpga 3/4] fpga: Add scatterlist based programming

n > to put the FPGA into operating mode. > diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c > index f0a69d3e60a584..30f9778d0632d2 100644 > --- a/drivers/fpga/fpga-mgr.c > +++ b/drivers/fpga/fpga-mgr.c > @@ -1,4 +1,4 @@ > -/* > + /* Hi Jason, Need to take th

Re: [PATCH v3 fpga 3/4] fpga: Add scatterlist based programming

On Mon, Jan 9, 2017 at 10:12 AM, Jason Gunthorpe wrote: > On Mon, Jan 09, 2017 at 10:04:36AM -0600, Alan Tull wrote: > >> > diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c >> > index f0a69d3e60a584..30f9778d0632d2 100644 >> > +++ b/drivers/

Re: [PATCH v18 4/6] fpga: add fpga bridge framework

On Thu, Jul 14, 2016 at 3:54 PM, Paul Gortmaker wrote: > On Tue, Jul 12, 2016 at 3:36 PM, Alan Tull > wrote: >> This framework adds API functions for enabling/ >> disabling FPGA bridges under kernel control. >> >> This allows the Linux kernel to disable FPGA bridge

[PATCH 1/1] ARM: socfpga: checking the wrong variable

From: Dan Carpenter This is a cut and paste bug. We had intended to check "sysmgr". Fixes: e5f8efa5c8bf ("ARM: socfpga: fpga bridge driver support") Signed-off-by: Dan Carpenter Acked-by: Moritz Fischer Acked-by: Alan Tull --- drivers/fpga/altera-fpga2sdram.c | 2 +

[PATCH 0/1] One bug fix for FPGA

Hi Greg, Can you take this patch? Thanks, Alan Dan Carpenter (1): ARM: socfpga: checking the wrong variable drivers/fpga/altera-fpga2sdram.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4

[[PATCH repost v21] 05/11] fpga-mgr: add fpga image information struct

A Manager API functions are changed, replacing the 'u32 flag' parameter with a pointer to struct fpga_image_info. Subsequent patches fix the existing low level FPGA manager drivers. Signed-off-by: Alan Tull Acked-by: Moritz Fischer Signed-off-by: Greg Kroah-Hartman --- drivers/fpga/fpg

[[PATCH repost v21] 02/11] fpga: add method to get fpga manager from device

The intent is to provide a non-DT method of getting ahold of a FPGA manager to do some FPGA programming. This patch refactors of_fpga_mgr_get() to reuse most of it while adding a new method fpga_mgr_get() for getting a pointer to a fpga manager struct, given the device. Signed-off-by: Alan Tull

[[PATCH repost v21] 09/11] ARM: socfpga: fpga bridge driver support

the bridge during probe. If the property does not exist, the driver will leave the bridge in its current state. Signed-off-by: Alan Tull Signed-off-by: Matthew Gerlach Signed-off-by: Dinh Nguyen Signed-off-by: Greg Kroah-Hartman --- drivers/fpga/Kconfig | 7 ++ drivers/fpg

[[PATCH repost v21] 11/11] fpga-manager: Add Socfpga Arria10 support

Add low level driver to support reprogramming FPGAs for Altera SoCFPGA Arria10. Signed-off-by: Alan Tull Reviewed-by: Moritz Fischer Signed-off-by: Greg Kroah-Hartman --- drivers/fpga/Kconfig | 6 + drivers/fpga/Makefile | 1 + drivers/fpga/socfpga-a10.c | 556

[[PATCH repost v21] 04/11] fpga: add bindings document for fpga region

New bindings document for FPGA Region to support programming FPGA's under Device Tree control Signed-off-by: Alan Tull Signed-off-by: Moritz Fischer Reviewed-by: Rob Herring Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/fpga/fpga-region.txt

[[PATCH repost v21] 06/11] add sysfs document for fpga bridge class

Add documentation for new FPGA bridge class's sysfs interface. Signed-off-by: Alan Tull Acked-by: Moritz Fischer Signed-off-by: Greg Kroah-Hartman --- Documentation/ABI/testing/sysfs-class-fpga-bridge | 11 +++ 1 file changed, 11 insertions(+) create mode 100644 Documentatio

[[PATCH repost v21] 03/11] doc: fpga-mgr: add fpga image info to api

ake longer times to enable or disable. This patch documents the change in the FPGA Manager API functions, replacing the 'u32 flag' parameter with a pointer to struct fpga_image_info. Signed-off-by: Alan Tull Acked-by: Moritz Fischer Signed-off-by: Greg Kroah-Hartman --- Documentati

[[PATCH repost v21] 10/11] fpga: add altera freeze bridge support

Add a low level driver for Altera Freeze Bridges to the FPGA Bridge framework. A freeze bridge is a bridge that exists in the FPGA fabric to isolate one region of the FPGA from the busses while that one region is being reprogrammed. Signed-off-by: Alan Tull Signed-off-by: Matthew Gerlach

[[PATCH repost v21] 00/11] Device Tree support for FPGA Programming

for Altera SOCFPGA bridges https://patchwork.kernel.org/patch/9226093/ * DT bindings for Arria 10 FPGA Mgr https://patchwork.kernel.org/patch/9226111/ This patchset supports FPGA programming under the control of Device Tree overlays. Alan Alan Tull (11): of/overlay: add of overlay notificati

[[PATCH repost v21] 07/11] fpga: add fpga bridge framework

sable * fpga_bridges_put Signed-off-by: Alan Tull Signed-off-by: Greg Kroah-Hartman --- drivers/fpga/Kconfig | 7 + drivers/fpga/Makefile| 3 + drivers/fpga/fpga-bridge.c | 395 +++ include/linux/fpga/fpga-bridge.h | 60 ++ 4

[[PATCH repost v21] 08/11] fpga: fpga-region: device tree control for FPGA

FPGA Regions support programming FPGA under control of the Device Tree. Signed-off-by: Alan Tull Signed-off-by: Greg Kroah-Hartman --- drivers/fpga/Kconfig | 7 + drivers/fpga/Makefile | 3 + drivers/fpga/fpga-region.c| 603

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