From: Sunil Goutham sgout...@cavium.com
If a txq (SQ) remains in stopped state after this timeout its
considered as stuck and interface is reinited.
Signed-off-by: Sunil Goutham sgout...@cavium.com
Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com
---
drivers/net/ethernet/cavium
From: Sunil Goutham sgout...@cavium.com
Signed-off-by: Sunil Goutham sgout...@cavium.com
Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com
---
drivers/net/ethernet/cavium/thunder/nicvf_main.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ethernet/cavium
From: Robert Richter
There are duplicate NODE_ID macro definitions. Move all of them to
nic.h for usage in nic and bgx driver and introduce nic_get_node_id()
helper function.
This patch also fixes 64bit mask which should have been ULL by
reworking the node calculation.
Signed-off-by: Robert
They were left from development stage
Reported-by: kbuild test robot
Signed-off-by: Aleksey Makarov
---
drivers/net/ethernet/cavium/thunder/thunder_bgx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cavium/thunder/thunder_bgx.c
b/drivers/net
GFP_KERNEL should be used in the thread context
Signed-off-by: Aleksey Makarov
---
drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c
b/drivers/net/ethernet/cavium/thunder
This fixes sparse messages like this:
drivers/net/ethernet/cavium/thunder/nicvf_main.c:1141:26: sparse: symbol
'nicvf_get_stats64' was not declared. Should it be static?
Also remove unused declarations
Reported-by: kbuild test robot
Signed-off-by: Aleksey Makarov
---
drivers/net/ethernet
No need to cast void* to u8*: pointer arithmetics
works same way for both.
Signed-off-by: Aleksey Makarov
---
drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c
b/drivers
gt;tso_hdrs = dma_alloc_coherent(>pdev->dev,
368q_len *
TSO_HEADER_SIZE,
369>tso_hdrs_phys,
GFP_KERNEL);
370 if (!sq->tso_hdrs)
Reported-by: kbuild test robot
Signed-off-by: Aleksey M
This fixes sparse message:
drivers/net/ethernet/cavium/thunder/nicvf_main.c:385:40: sparse: cast to
restricted __le64
Reported-by: kbuild test robot
Signed-off-by: Aleksey Makarov
---
drivers/net/ethernet/cavium/thunder/nic.h | 4 ++--
drivers/net/ethernet/cavium/thunder/nic_main.c
This fixes sparse messages like this:
drivers/net/ethernet/cavium/thunder/thunder_bgx.c:897:24: sparse:
constant 0x3000 is so big it is long
Reported-by: kbuild test robot
Signed-off-by: Aleksey Makarov
---
drivers/net/ethernet/cavium/thunder/nicvf_main.c | 10 +-
1 file
This fixes sparse message:
drivers/net/ethernet/cavium/thunder/nicvf_main.c:153:25: sparse: cast to
restricted __le64
Reported-by: kbuild test robot
Signed-off-by: Aleksey Makarov
---
drivers/net/ethernet/cavium/thunder/nicvf_main.c | 27 +++-
1 file changed, 17 insertions
nicvf_config_rss(nic);
523 return 0;
524 }
regards,
dan carpenter
Reported-by: Dan Carpenter
Signed-off-by: Aleksey Makarov
---
drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cavium/thund
These are fixes for the problems that were reported by static check tools.
Aleksey Makarov (9):
net: thunderx: fix constants
net: thunderx: introduce a function for mailbox access
net: thunderx: rework mac address handling
net: thunderx: delete unused variables
net: thunderx: add static
These are fixes for the problems that were reported by static check tools.
Aleksey Makarov (9):
net: thunderx: fix constants
net: thunderx: introduce a function for mailbox access
net: thunderx: rework mac address handling
net: thunderx: delete unused variables
net: thunderx: add static
This fixes sparse messages like this:
drivers/net/ethernet/cavium/thunder/thunder_bgx.c:897:24: sparse:
constant 0x3000 is so big it is long
Reported-by: kbuild test robot fengguang...@intel.com
Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com
---
drivers/net/ethernet
This fixes sparse message:
drivers/net/ethernet/cavium/thunder/nicvf_main.c:153:25: sparse: cast to
restricted __le64
Reported-by: kbuild test robot fengguang...@intel.com
Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com
---
drivers/net/ethernet/cavium/thunder/nicvf_main.c | 27
This fixes sparse message:
drivers/net/ethernet/cavium/thunder/nicvf_main.c:385:40: sparse: cast to
restricted __le64
Reported-by: kbuild test robot fengguang...@intel.com
Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com
---
drivers/net/ethernet/cavium/thunder/nic.h | 4
;
524 }
regards,
dan carpenter
Reported-by: Dan Carpenter dan.carpen...@oracle.com
Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com
---
drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net
From: Robert Richter rrich...@cavium.com
There are duplicate NODE_ID macro definitions. Move all of them to
nic.h for usage in nic and bgx driver and introduce nic_get_node_id()
helper function.
This patch also fixes 64bit mask which should have been ULL by
reworking the node calculation.
No need to cast void* to u8*: pointer arithmetics
works same way for both.
Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com
---
drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cavium
This fixes sparse messages like this:
drivers/net/ethernet/cavium/thunder/nicvf_main.c:1141:26: sparse: symbol
'nicvf_get_stats64' was not declared. Should it be static?
Also remove unused declarations
Reported-by: kbuild test robot fengguang...@intel.com
Signed-off-by: Aleksey Makarov
q_len *
TSO_HEADER_SIZE,
369sq-tso_hdrs_phys,
GFP_KERNEL);
370 if (!sq-tso_hdrs)
Reported-by: kbuild test robot fengguang...@intel.com
Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com
GFP_KERNEL should be used in the thread context
Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com
---
drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c
b
They were left from development stage
Reported-by: kbuild test robot fengguang...@intel.com
Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com
---
drivers/net/ethernet/cavium/thunder/thunder_bgx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net
From: Sunil Goutham
This vendor id will be used by network (vNIC), USB (xHCI),
SATA (AHCI), GPIO, I2C, MMC and maybe other drivers
for ThunderX SoC.
Acked-by: Bjorn Helgaas
Signed-off-by: Sunil Goutham
Signed-off-by: Aleksey Makarov
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2
This patchset adds support for the Cavium ThunderX network controller.
changes in v6:
* unused preprocessor symbols were removed
* reduce no of atomic operations in SQ maintenance
* support for TCP segmentation at driver level
* reset RBDR if fifo state is FAIL
* fixed an issue with link
This patchset adds support for the Cavium ThunderX network controller.
changes in v6:
* unused preprocessor symbols were removed
* reduce no of atomic operations in SQ maintenance
* support for TCP segmentation at driver level
* reset RBDR if fifo state is FAIL
* fixed an issue with link
From: Sunil Goutham sgout...@cavium.com
This vendor id will be used by network (vNIC), USB (xHCI),
SATA (AHCI), GPIO, I2C, MMC and maybe other drivers
for ThunderX SoC.
Acked-by: Bjorn Helgaas bhelg...@google.com
Signed-off-by: Sunil Goutham sgout...@cavium.com
Signed-off-by: Aleksey Makarov
This patchset adds support for the Cavium ThunderX network controller.
changes in v5:
* __packed were removed. now we rely on C language ABI
* nic_dbg() -> netdev_dbg()
* fixes for a typo, constant spelling and using BIT_ULL
* use print_hex_dump()
* unnecessary conditions in a long if()
From: Sunil Goutham
This vendor id will be used by network (vNIC), USB (xHCI),
SATA (AHCI), GPIO, I2C, MMC and maybe other drivers
for ThunderX SoC.
Acked-by: Bjorn Helgaas
Signed-off-by: Sunil Goutham
Signed-off-by: Aleksey Makarov
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2
This patchset adds support for the Cavium ThunderX network controller.
changes in v5:
* __packed were removed. now we rely on C language ABI
* nic_dbg() - netdev_dbg()
* fixes for a typo, constant spelling and using BIT_ULL
* use print_hex_dump()
* unnecessary conditions in a long if()
From: Sunil Goutham sgout...@cavium.com
This vendor id will be used by network (vNIC), USB (xHCI),
SATA (AHCI), GPIO, I2C, MMC and maybe other drivers
for ThunderX SoC.
Acked-by: Bjorn Helgaas bhelg...@google.com
Signed-off-by: Sunil Goutham sgout...@cavium.com
Signed-off-by: Aleksey Makarov
From: Sunil Goutham
This vendor id will be used by network (vNIC), USB (xHCI),
SATA (AHCI), GPIO, I2C, MMC and maybe other drivers
for ThunderX SoC.
Acked-by: Bjorn Helgaas
Signed-off-by: Sunil Goutham
Signed-off-by: Aleksey Makarov
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2
This patchset adds support for the Cavium ThunderX network controller.
changes in v4:
* the patch "pci: Add Cavium PCI vendor id" was attributed correctly
* a note that Cavium id is used in many drivers was added
* the license comments now match MODULE_LICENSE
* a comment explaining usage of
On 05/18/2015 02:05 PM, Aaro Koskinen wrote:
Hi,
On Mon, Mar 16, 2015 at 06:06:00PM +0300, Aleksey Makarov wrote:
The OCTEON MMC controller is currently found on cn61XX and cnf71XX
devices. Device parameters are configured from device tree data.
eMMC, MMC and SD devices are supported
Author of this patch is
Author: Sunil Goutham
Sorry for this. It will be fixed in next versions.
On 05/15/2015 08:36 PM, Aleksey Makarov wrote:
Signed-off-by: Aleksey Makarov
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/pci_ids.h b
Author of this patch is
Author: Sunil Goutham sgout...@cavium.com
Sorry for this. It will be fixed in next versions.
On 05/15/2015 08:36 PM, Aleksey Makarov wrote:
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2 insertions
This patchset adds support for the Cavium ThunderX network controller.
changes in v4:
* the patch pci: Add Cavium PCI vendor id was attributed correctly
* a note that Cavium id is used in many drivers was added
* the license comments now match MODULE_LICENSE
* a comment explaining usage of
From: Sunil Goutham sgout...@cavium.com
This vendor id will be used by network (vNIC), USB (xHCI),
SATA (AHCI), GPIO, I2C, MMC and maybe other drivers
for ThunderX SoC.
Acked-by: Bjorn Helgaas bhelg...@google.com
Signed-off-by: Sunil Goutham sgout...@cavium.com
Signed-off-by: Aleksey Makarov
On 05/18/2015 02:05 PM, Aaro Koskinen wrote:
Hi,
On Mon, Mar 16, 2015 at 06:06:00PM +0300, Aleksey Makarov wrote:
The OCTEON MMC controller is currently found on cn61XX and cnf71XX
devices. Device parameters are configured from device tree data.
eMMC, MMC and SD devices are supported
Signed-off-by: Aleksey Makarov
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index e63c02a..3633cc6 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2327,6 +2327,8 @@
#define
445-10061-1-git-send-email-r...@kernel.org>
v1: https://lkml.kernel.org/g/<20141030165434.GW20170@rric.localhost>
Aleksey Makarov (1):
pci: Add Cavium PCI vendor id
Sunil Goutham (1):
net: Adding support for Cavium ThunderX network controller
-10061-1-git-send-email-r...@kernel.org
v1: https://lkml.kernel.org/g/20141030165434.GW20170@rric.localhost
Aleksey Makarov (1):
pci: Add Cavium PCI vendor id
Sunil Goutham (1):
net: Adding support for Cavium ThunderX network controller
MAINTAINERS|7
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index e63c02a..3633cc6 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2327,6
From: David Daney
Now it is supported, so let people select it.
Signed-off-by: David Daney
Signed-off-by: Leonid Rosenboim
Signed-off-by: Aleksey Makarov
---
arch/mips/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index
From: David Daney
Needed for little-endian ioport access.
This fixes NOR flash in little-endian mode
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
.../include/asm/mach-cavium-octeon/mangle-port.h | 74 ++
1 file changed, 74 insertions(+)
create mode
These patches enable compiling and booting kernel on Octeon boards
in little-endian mode.
David Daney (3):
MIPS: OCTEON: Handle bootloader structures in little-endian mode.
MIPS: OCTEON: Add mach-cavium-octeon/mangle-port.h
MIPS: OCTEON: Enable little endian kernel.
arch/mips/Kconfig
From: David Daney
Compensate for the differences in the layout of in-memory bootloader
information as seen from little-endian mode.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/octeon_boot.h| 23
arch/mips/include/asm/octeon/cvmx
The OCTEON SATA controller is currently found on cn71XX devices.
Cc: Arnd Bergmann
Acked-by: Hans de Goede
Signed-off-by: David Daney
Signed-off-by: Vinita Gupta
Signed-off-by: Aleksey Makarov
---
.../devicetree/bindings/ata/ahci-platform.txt | 1 +
.../devicetree/bindings/mips
= 1;
>> +#else
>> +shim_cfg.s.dma_endian_mode = 0;
>> +shim_cfg.s.csr_endian_mode = 0;
>> +#endif
>> +shim_cfg.s.dma_read_cmd = 1; /* No allocate L2C */
>> +cvmx_write_csr((uint64_t)base + CVMX_SATA_UCTL_SHIM_CFG, shim_cfg.u64);
>>
with an extra set of
soc-specific registers to set up.
This is not an option, because the device tree ABI is deployed and fixed,
and deriving sata driver does not fit it well.
Thanks
Aleksey Makarov
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message
The OCTEON SATA controller is currently found on cn71XX devices.
Cc: Arnd Bergmann a...@arndb.de
Acked-by: Hans de Goede hdego...@redhat.com
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Vinita Gupta vgu...@caviumnetworks.com
Signed-off-by: Aleksey Makarov aleksey.maka
From: David Daney david.da...@cavium.com
Compensate for the differences in the layout of in-memory bootloader
information as seen from little-endian mode.
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
arch/mips/cavium-octeon
These patches enable compiling and booting kernel on Octeon boards
in little-endian mode.
David Daney (3):
MIPS: OCTEON: Handle bootloader structures in little-endian mode.
MIPS: OCTEON: Add mach-cavium-octeon/mangle-port.h
MIPS: OCTEON: Enable little endian kernel.
arch/mips/Kconfig
From: David Daney david.da...@cavium.com
Now it is supported, so let people select it.
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Leonid Rosenboim lrosenb...@caviumnetworks.com
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
arch/mips/Kconfig | 3 ++-
1 file
From: David Daney david.da...@cavium.com
Needed for little-endian ioport access.
This fixes NOR flash in little-endian mode
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
.../include/asm/mach-cavium-octeon/mangle-port.h | 74
The OCTEON MMC controller is currently found on cn61XX and cnf71XX
devices. Device parameters are configured from device tree data.
eMMC, MMC and SD devices are supported.
Tested-by: Aaro Koskinen
Signed-off-by: Chandrakala Chavva
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
-by: David Daney david.da...@cavium.com
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
Signed-off-by: Leonid Rosenboim lrosenb...@caviumnetworks.com
Signed-off-by: Peter Swain psw...@cavium.com
Signed-off-by: Aaron Williams aaron.willi...@cavium.com
---
.../devicetree/bindings/mmc/octeon
The OCTEON SATA controller is currently found on cn71XX devices.
Cc: Arnd Bergmann
Acked-by: Hans de Goede
Signed-off-by: David Daney
Signed-off-by: Vinita Gupta
Signed-off-by: Aleksey Makarov
---
.../devicetree/bindings/ata/ahci-platform.txt | 1 +
.../devicetree/bindings/mips
The OCTEON SATA controller is currently found on cn71XX devices.
Cc: Arnd Bergmann a...@arndb.de
Acked-by: Hans de Goede hdego...@redhat.com
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Vinita Gupta vgu...@caviumnetworks.com
Signed-off-by: Aleksey Makarov aleksey.maka
From: Chandrakala Chavva
Also delete unused cvmx_reset_octeon()
This fixes reboot for Octeon III boards
Signed-off-by: Chandrakala Chavva
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/setup.c | 5 -
arch/mips/include/asm/octeon/cvmx.h | 8
2 files changed, 4
From: Chandrakala Chavva ccha...@caviumnetworks.com
Also delete unused cvmx_reset_octeon()
This fixes reboot for Octeon III boards
Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
arch/mips/cavium-octeon/setup.c | 5
From: Chandrakala Chavva
This fixes reboot for Octeon III boards
Signed-off-by: Chandrakala Chavva
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/setup.c | 5 -
arch/mips/include/asm/octeon/cvmx.h | 6 +-
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git
The OCTEON SATA controller is currently found on cn71XX devices.
Signed-off-by: David Daney
Signed-off-by: Vinita Gupta
Signed-off-by: Aleksey Makarov
---
Version 2:
https://lkml.kernel.org/g/<1422038495-5204-1-git-send-email-aleksey.maka...@auriga.com>
Changes in v3:
- Rebased to v4
Chavva
Signed-off-by: Peter Swain
[aleksey.maka...@auriga.com: preparation for submission]
Signed-off-by: Aleksey Makarov
---
.../devicetree/bindings/mmc/octeon-mmc.txt | 69 +
drivers/mmc/host/Kconfig | 10 +
drivers/mmc/host/Makefile
-by: Aleksey Makarov
Signed-off-by: Chandrakala Chavva
---
arch/mips/cavium-octeon/setup.c | 3 +++
arch/mips/include/asm/octeon/octeon.h | 2 ++
2 files changed, 5 insertions(+)
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index a42110e..01130e9 100644
--- a/arch
From: David Daney
Without this, we get bus errors.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/Kconfig | 1 +
arch/mips/cavium-octeon/flash_setup.c | 42 ++-
2 files changed, 42 insertions(+), 1 deletion
Changes in v2:
- Rebase to v4.0-rc2
Summary:
- Use semaphore to protect access to bootbus.
- Use device tree to probe for flash chips.
Version 1:
https://lkml.kernel.org/g/<1419337623-16101-1-git-send-email-aleksey.maka...@auriga.com>
David Daney (3):
MIPS: OCTEON: Add semaphore to
From: David Daney
Don't assume they are there, the device tree will tell us.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/flash_setup.c | 42 ++-
1 file changed, 37 insertions(+), 5 deletions(-)
diff --git a/arch/mips
From: David Daney david.da...@cavium.com
Without this, we get bus errors.
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
arch/mips/Kconfig | 1 +
arch/mips/cavium-octeon/flash_setup.c | 42
Changes in v2:
- Rebase to v4.0-rc2
Summary:
- Use semaphore to protect access to bootbus.
- Use device tree to probe for flash chips.
Version 1:
https://lkml.kernel.org/g/1419337623-16101-1-git-send-email-aleksey.maka...@auriga.com
David Daney (3):
MIPS: OCTEON: Add semaphore to
...@auriga.com: combine the patches]
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com
---
arch/mips/cavium-octeon/setup.c | 3 +++
arch/mips/include/asm/octeon/octeon.h | 2 ++
2 files changed, 5 insertions(+)
diff --git a/arch/mips
From: David Daney david.da...@cavium.com
Don't assume they are there, the device tree will tell us.
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
arch/mips/cavium-octeon/flash_setup.c | 42 ++-
1
-by: Aaron Williams aaron.willi...@cavium.com
Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com
Signed-off-by: Peter Swain psw...@cavium.com
[aleksey.maka...@auriga.com: preparation for submission]
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
.../devicetree/bindings/mmc
The OCTEON SATA controller is currently found on cn71XX devices.
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Vinita Gupta vgu...@caviumnetworks.com
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
Version 2:
https://lkml.kernel.org/g/1422038495-5204-1-git-send
From: Chandrakala Chavva ccha...@caviumnetworks.com
This fixes reboot for Octeon III boards
Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
arch/mips/cavium-octeon/setup.c | 5 -
arch/mips/include/asm/octeon
The OCTEON SATA controller is currently found on cn71XX devices.
Signed-off-by: David Daney
Signed-off-by: Vinita Gupta
Signed-off-by: Aleksey Makarov
---
Version 1:
https://lkml.kernel.org/g/<1421681040-3392-1-git-send-email-aleksey.maka...@auriga.com>
Changes in v2:
- The
The OCTEON SATA controller is currently found on cn71XX devices.
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Vinita Gupta vgu...@caviumnetworks.com
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
Version 1:
https://lkml.kernel.org/g/1421681040-3392-1-git-send
Chavva
Signed-off-by: Peter Swain
[aleksey.maka...@auriga.com: preparation for submission]
Signed-off-by: Aleksey Makarov
---
This patch should be applied on top of the patchset
"MIPS: OCTEON: flash: syncronize bootbus access"
https://lkml.kernel.org/g/<1419337623-16101-1-git-send-email
-by: Aaron Williams aaron.willi...@cavium.com
Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com
Signed-off-by: Peter Swain psw...@cavium.com
[aleksey.maka...@auriga.com: preparation for submission]
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
This patch should be applied
The OCTEON SATA controller is currently found on cn71XX devices.
Signed-off-by: David Daney
Signed-off-by: Vinita Gupta
[aleksey.maka...@auriga.com: preparing for submission,
conflict resolution, fixes for the platform code]
Signed-off-by: Aleksey Makarov
---
.../devicetree/bindings/ata/ahci
-by: Chandrakala Chavva
Signed-off-by: Peter Swain
[aleksey.maka...@auriga.com: preparation for submission]
Signed-off-by: Aleksey Makarov
---
This patch should be applied on top of the patchset
"MIPS: OCTEON: flash: syncronize bootbus access"
https://lkml.kernel.org/g/<1419337623-16101-1-g
Signed-off-by: Aaron Williams aaron.willi...@cavium.com
Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com
Signed-off-by: Peter Swain psw...@cavium.com
[aleksey.maka...@auriga.com: preparation for submission]
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
This patch should
The OCTEON SATA controller is currently found on cn71XX devices.
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Vinita Gupta vgu...@caviumnetworks.com
[aleksey.maka...@auriga.com: preparing for submission,
conflict resolution, fixes for the platform code]
Signed-off-by: Aleksey
From: David Daney
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/setup.c | 4 +---
.../asm/mach-cavium-octeon/kernel-entry-init.h| 19 ---
2 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/arch
From: David Daney
The acknowledge bits don't exist for level triggered irqs, so setting
them causes the simulator to terminate.
Signed-off-by: David Daney
Signed-off-by: Leonid Rosenboim
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/octeon-irq.c | 45
From: David Daney
It wasn't being saved on task switch.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/kernel/octeon_switch.S | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/mips/kernel/octeon_switch.S b/arch/mips/kernel
From: David Daney
Disable ICache prefetch for certian Octeon II processors.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
.../asm/mach-cavium-octeon/kernel-entry-init.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/mips/include/asm/mach
resolution,
support for old compilers]
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/setup.c | 37 ++
arch/mips/include/asm/octeon/octeon.h | 13
arch/mips/include/asm/ptrace.h| 4 +-
arch/mips/kernel/octeon_switch.S | 128
From: David Daney
- Use of_irq_init() to initialize interrupt controllers
- Get rid of some unlikely()
- Add CIB to support SATA and other interrupts
- Add support for CIU SUM2 interrupt sources
Signed-off-by: David Daney
Signed-off-by: Leonid Rosenboim
Signed-off-by: Aleksey Makarov
Signed
From: Chandrakala Chavva
Use dmfc0/dmtc0 instructions for reading CvmMemCtl COP0 register,
its a 64-bit wide.
Signed-off-by: Chandrakala Chavva
Signed-off-by: Aleksey Makarov
---
arch/mips/kernel/octeon_switch.S | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch
From: David Daney
If 'rd_name=xxx' is passed to the kernel, the named block with name
'xxx' is used for the initrd.
Signed-off-by: David Daney
Signed-off-by: Leonid Rosenboim
[aleksey.maka...@auriga.com: conflict resolution]
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/setup.c
From: Chandrakala Chavva
Read clock rate from the correct CSR. Don't clear COP0_DCACHE for OCTEONIII.
Signed-off-by: Chandrakala Chavva
Signed-off-by: Aleksey Makarov
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/csrc-octeon.c | 11 +-
arch/mips/cavium-octeon/setup.c
From: David Daney
Add coverage for OCTEON III models.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/dma-octeon.c | 4 +-
.../cavium-octeon/executive/cvmx-helper-board.c| 2 +-
arch/mips/cavium-octeon/octeon-irq.c
From: Chad Reese
CN38XX pass 1 required icache prefetching to be turned off. This chip never
reached production and is long dead. Other processor specific icache settings
are done by the bootloader. Remove these bits from the kernel.
Signed-off-by: Chad Reese
Signed-off-by: Aleksey Makarov
Commit 2c952e06e4f5 ("MIPS: Move cop2 save/restore to switch_to()")
removes assembler code to store COP2 registers. Commit
a36d8225bceb ("MIPS: OCTEON: Enable use of FPU") mistakenly
restores it
Fixes: a36d8225bceb ("MIPS: OCTEON: Enable use of FPU")
Signed-off-
From: David Daney
Allocate new save space, and then save/restore the registers if
OCTEON III.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/include/asm/processor.h | 2 ++
arch/mips/kernel/asm-offsets.c| 1 +
arch/mips/kernel/octeon_switch.S | 43
From: David Daney
Also update union octeon_cvmemctl with new OCTEON II fields.
Signed-off-by: David Daney
[aleksey.maka...@auriga.com: use __BITFIELD_FIELD]
Signed-off-by: Aleksey Makarov
---
arch/mips/include/asm/octeon/octeon.h | 135 ++
1 file changed, 105
SATA and some other interrutps.
Aleksey Makarov (1):
MIPS: OCTEON: Delete unused COP2 saving code
Chad Reese (1):
MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.
Chandrakala Chavva (2):
MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register
MIPS: OCTEON: More
...@caviumnetworks.com
[aleksey.maka...@auriga.com:
conflict resolution,
support for old compilers]
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
arch/mips/cavium-octeon/setup.c | 37 ++
arch/mips/include/asm/octeon/octeon.h | 13
arch/mips
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