Add AXP221 regulator definitions and choose the appropriate definitions
according to the variant id passed by the MFD device.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/regulator/axp20x-regulator.c | 98 +---
1 file changed, 90
On 17/06/2014 22:44, Maxime Ripard wrote:
On Tue, Jun 17, 2014 at 09:38:40AM +0200, Boris BREZILLON wrote:
The init_data and of_node fields of the axp2xx_matches tables are filled
at each device probe by the axp20x_regulator_parse_dt function (which then
calls the of_regulator_match function
On 17/06/2014 22:46, Maxime Ripard wrote:
On Tue, Jun 17, 2014 at 09:38:42AM +0200, Boris BREZILLON wrote:
Make use of the devm_regulator_set_register instead of registering each
regulator provided by the PMIC.
This also solves a self dependency issue where one regulator of the PMIC
is used
accross all architecture.
I'm just nitpicking here, but you could swap patch 1 and 2 so that
slow_xtal node appears directly under clocks node.
Apart from that,
Acked-by: Boris BREZILLON boris.brezil...@free-electrons.com
Alexandre Belloni (6):
ARM: at91/dt: define sam9261ek slow crystal
On 18/06/2014 10:36, Lee Jones wrote:
On Tue, 17 Jun 2014, Boris BREZILLON wrote:
Add support for the AXP221 PMIC device to the existing AXP20x driver.
The AXP221 defines a new set of registers, power supplies and regulators,
but most of the API is similar to the AXP20x ones.
The AXP20x
://www.spinics.net/lists/linux-i2c/msg15066.html
[2] http://comments.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/8947
Boris BREZILLON (2):
i2c: sunxi: add P2WI DT bindings documentation
i2c: sunxi: add P2WI (Push/Pull 2 Wire Interface) controller support
.../devicetree/bindings/i2c/i2c-sunxi
P2WI (Push/Pull 2 Wire Interface) is an SMBus like bus used to communicate
with some PMICs (like the AXP221).
Document P2WI DT bindings which are pretty much the same as the one defined
for the marvell's mv64xxx controller.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked
@@
+/*
+ * P2WI (Push-Pull Two Wire Interface) bus driver.
+ *
+ * Author: Boris BREZILLON boris.brezil...@free-electrons.com
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether
with the linux-i2c in Cc.
Thanks for your answer.
Best Regards,
Boris
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More
the macro definitions
- fix typos
[1] http://www.spinics.net/lists/linux-i2c/msg15066.html
[2] http://comments.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/8947
Boris BREZILLON (2):
i2c: sunxi: add P2WI DT bindings documentation
i2c: sunxi: add P2WI (Push/Pull 2 Wire Interface) controller
@@
+/*
+ * P2WI (Push-Pull Two Wire Interface) bus driver.
+ *
+ * Author: Boris BREZILLON boris.brezil...@free-electrons.com
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether
P2WI (Push/Pull 2 Wire Interface) is an SMBus like bus used to communicate
with some PMICs (like the AXP221).
Document P2WI DT bindings which are pretty much the same as the one defined
for the marvell's mv64xxx controller.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked
read_buf is called in place of write_buf in the
nand_write_page_raw_syndrome function.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/mtd/nand/nand_base.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand
the atmel_wm8904 driver working (this
driver make use of prog clks), and if possible, should be merged in the next
3.14 release (at least the first patch of this series).
Let me know if this is not possible.
Thanks.
Best Regards,
Boris
Boris BREZILLON (3):
clk: at91: fix programmable clk irq handling
The prog irq is a level irq reflecting the prog clk status. As a result the
irq line will stay high when the prog clk is ready and the system will
hang.
Disable the irq when it is handled to avoid this problem.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
drivers/clk/at91/clk
Implement the determine_rate callback to choose the best parent clk that
fulfills the requested rate.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
drivers/clk/at91/clk-programmable.c | 56 +--
1 file changed, 28 insertions(+), 28 deletions(-)
diff
System clks are just gates, and thus do not provide any rate operations.
Authorize clk rate change to be propagated to system clk parents.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
drivers/clk/at91/clk-system.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
Hello JJ,
On 03/02/2014 17:46, Jean-Jacques Hiblot wrote:
The name provided to request_irq() must be valid until the irq is
released.
This patch allocates and formats the string with kasprintf().
Thanks for reporting this bug.
Signed-off-by: Jean-Jacques Hiblot jjhib...@traphandler.com
---
On 04/02/2014 09:21, Jean-Jacques Hiblot wrote:
The name provided to request_irq() must be valid until the irq is released.
This patch stores the name in the internal data structure.
Signed-off-by: Jean-Jacques Hiblot jjhib...@traphandler.com
Acked-by: Boris BREZILLON b.brezil...@overkiz.com
is released.
This patch stores the name in the internal data structure.
Signed-off-by: Jean-Jacques Hiblot jjhib...@traphandler.com
Acked-by: Boris BREZILLON b.brezil...@overkiz.com
---
drivers/clk/at91/clk-programmable.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
Hello, Mike,
Please do not take this patch: the work of JJ to fix the prog clk
prepare bug
will remove the irq handling from the prog clk driver, as a result, we won't
have to request the irq anymore.
Sorry for the inconvenience.
Best Regards,
Boris
On 04/02/2014 09:42, Boris BREZILLON
,
Boris
On 03/02/2014 12:25, Boris BREZILLON wrote:
Hello Mike,
This series fixes a bug in the prog clk prepare function (the platform hangs
when preparing a prog clk).
It also implements the determine_rate callback for these prog clks and allow
system clk to propagate the rate change to its parent
Hi Greg,
On 04/02/2014 23:59, Gregory CLEMENT wrote:
Until now the clock providers were initialized in the order found in
the device tree. This led to have the dependencies between the clocks
not respected: children clocks could be initialized before their
parent clocks.
Instead of forcing
Hi JJ,
I guess you're commit message is wrong: you're optimizing set_rate not
determine_rate.
Best Regards,
Boris
On 05/02/2014 09:37, Jean-Jacques Hiblot wrote:
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
Signed-off-by: Jean-Jacques Hiblot jjhib...@traphandler.com
---
drivers
The parent dependency check is only available on the first parent of a given
clk.
Add support for strict dependency check: all parents of a given clk must be
initialized.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
Hello Gregory,
This patch adds support for strict check on clk
On 05/02/2014 12:15, Grant Likely wrote:
On Wed, 29 Jan 2014 14:53:32 -0300, Ezequiel Garcia
ezequiel.gar...@free-electrons.com wrote:
On Wed, Jan 29, 2014 at 03:34:13PM +0100, Boris BREZILLON wrote:
nand-ecc-level property statically defines NAND chip's ECC requirements.
Signed-off
Hello Brian,
On 23/01/2014 02:49, Brian Norris wrote:
+ Huang
Hi Boris,
On Wed, Jan 08, 2014 at 03:21:56PM +0100, Boris BREZILLON wrote:
The Hynix nand flashes store their ECC requirements in byte 4 of its id
(returned on READ ID command).
Signed-off-by: Boris BREZILLON b.brezil
On 05/02/2014 16:05, Gregory CLEMENT wrote:
On 05/02/2014 15:48, Gregory CLEMENT wrote:
Hi Boris,
On 05/02/2014 10:48, Boris BREZILLON wrote:
The parent dependency check is only available on the first parent of a given
clk.
Add support for strict dependency check: all parents of a given clk
Hello Olof,
On 06/01/2014 19:08, Olof Johansson wrote:
Boris,
On Mon, Dec 9, 2013 at 12:51 AM, Boris BREZILLON
b.brezil...@overkiz.com wrote:
Replace the request_mem_region + ioremap calls by the
devm_ioremap_resource call which does the same things but with device
managed resources.
Signed
changes that
resulted in missing opening braces.
Thanks for fixing this: I was about to propose the same patch to resolve
the issue introduced by this merge (reported by Olof yesterday).
Signed-off-by: Arnd Bergmann a...@arndb.de
Acked-by: Boris BREZILLON b.brezil...@overkiz.com
---
Please
On 08/01/2014 10:37, Linus Walleij wrote:
On Thu, Dec 19, 2013 at 3:34 PM, Boris BREZILLON
b.brezil...@overkiz.com wrote:
GPIO hogging is a way to request and configure specific GPIO without
explicitly requesting it in the device driver.
The request and configuration procedure is handled
Add the sunxi NAND Flash Controller dt bindings documentation.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
.../devicetree/bindings/mtd/sunxi-nand.txt | 71
1 file changed, 71 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd
Define the NAND pinctrl configs.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
arch/arm/boot/dts/sun7i-a20.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index c00a577..34b1948
Add a function to retrieve NAND timings from a given DT node.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
drivers/of/of_mtd.c| 47 +++
include/linux/of_mtd.h |9 +
2 files changed, 56 insertions(+)
diff --git a/drivers
Regards,
Boris
Boris BREZILLON (9):
mtd: nand: retrieve ECC requirements from Hynix READ ID byte 4
mtd: nand: define struct nand_timings
of: mtd: add NAND timings retrieval support
of: mtd: add NAND timings bindings documentation
mtd: nand: add sunxi NFC support
mtd: nand: add sunxi
Define a struct containing the standard NAND timings as described in NAND
datasheets.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
include/linux/mtd/nand.h | 44
1 file changed, 44 insertions(+)
diff --git a/include/linux/mtd/nand.h b
The Hynix nand flashes store their ECC requirements in byte 4 of its id
(returned on READ ID command).
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
drivers/mtd/nand/nand_base.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/drivers/mtd
Add a NAND timing properties to NAND dt doc.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
Documentation/devicetree/bindings/mtd/nand.txt | 34
1 file changed, 34 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/nand.txt
b/Documentation
Add the sunxi NAND Flash Controller driver.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
drivers/mtd/nand/Kconfig |6 +
drivers/mtd/nand/Makefile|1 +
drivers/mtd/nand/sunxi_nfc.c | 700 ++
3 files changed, 707 insertions
Add NAND Flash controller node definition to the A20 SoC.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index
Enable the NFC and describe the NAND flash connected to this controller.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 33
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20
On 08/01/2014 16:28, Boris BREZILLON wrote:
Enable the NFC and describe the NAND flash connected to this controller.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 33
1 file changed, 33 insertions
On 08/01/2014 17:30, Rob Herring wrote:
On Wed, Jan 8, 2014 at 8:21 AM, Boris BREZILLON b.brezil...@overkiz.com wrote:
Add a function to retrieve NAND timings from a given DT node.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
drivers/of/of_mtd.c| 47
Hello Jason,
Le 08/01/2014 19:34, Jason Gunthorpe a écrit :
On Wed, Jan 08, 2014 at 03:21:58PM +0100, Boris BREZILLON wrote:
+int of_get_nand_timings(struct device_node *np, struct nand_timings *timings)
+{
+ memset(timings, 0, sizeof(*timings));
+ of_property_read_u32(np, tCLS
Le 08/01/2014 15:22, Boris BREZILLON a écrit :
Add the sunxi NAND Flash Controller driver.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
drivers/mtd/nand/Kconfig |6 +
drivers/mtd/nand/Makefile|1 +
drivers/mtd/nand/sunxi_nfc.c | 700
On 08/01/2014 22:28, Arnd Bergmann wrote:
On Wednesday 08 January 2014, Boris BREZILLON wrote:
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt
@@ -0,0 +1,71 @@
+Allwinner NAND Flash Controller (NFC)
+
+Required properties:
+- compatible : allwinner,sun4i-nfc.
+- reg
On 08/01/2014 20:13, Jason Gunthorpe wrote:
On Wed, Jan 08, 2014 at 08:00:02PM +0100, boris brezillon wrote:
Hello Jason,
Le 08/01/2014 19:34, Jason Gunthorpe a ?crit :
On Wed, Jan 08, 2014 at 03:21:58PM +0100, Boris BREZILLON wrote:
+int of_get_nand_timings(struct device_node *np, struct
On 09/01/2014 12:49, Jean-Jacques Hiblot wrote:
There was a copy/paste error when reading the nwe_pulse value.
Signed-off-by: Jean-Jacques Hiblot jjhib...@traphandler.com
Acked-by: Boris BREZILLON b.brezil...@overkiz.com
---
arch/arm/mach-at91/sam9_smc.c | 2 +-
1 file changed, 1 insertion
Hello JJ,
On 09/01/2014 13:31, Jean-Jacques Hiblot wrote:
The EBI/SMC external interface is used to access external peripherals (NAND
and Ethernet controller in the case of sam9261ek). Different configurations and
timings are required for those peripherals. This bus driver can be used to
setup
On 09/01/2014 13:31, Jean-Jacques Hiblot wrote:
Signed-off-by: Jean-Jacques Hiblot jjhib...@traphandler.com
---
arch/arm/boot/dts/at91sam9261.dtsi | 37 -
arch/arm/boot/dts/at91sam9261ek.dts | 31 +++
Hello Jason,
On 09/01/2014 18:35, Jason Gunthorpe wrote:
On Thu, Jan 09, 2014 at 09:36:18AM +0100, boris brezillon wrote:
You might want to check if you can boil down the DT timings from the
huge list to just an ONFI mode number..
Sure, but the sunxi driver needs at least 19 of them...
So
On 15/01/2014 16:09, boris brezillon wrote:
Hello Jason,
On 09/01/2014 18:35, Jason Gunthorpe wrote:
On Thu, Jan 09, 2014 at 09:36:18AM +0100, boris brezillon wrote:
You might want to check if you can boil down the DT timings from the
huge list to just an ONFI mode number..
Sure
The hclk clock of the ohci node is referencing udphs_clk instead of
uhphs_clk.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
arch/arm/boot/dts/sama5d3.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts
during system startup (see https://lkml.org/lkml/2013/3/8/175)
- only support dt enabled boards
Best Regards,
Boris
Boris BREZILLON (10):
genirq: generic chip: export irq_map_generic_chip function
irqchip: atmel-aic: add new atmel AIC driver
ARM: at91: introduce OLD_IRQ_AT91 Kconfig
Export the generic irq map function in order to provide irq_domain ops with
generic mapping and specific of xlate function (needed by the new atmel
AIC driver).
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
include/linux/irq.h |2 ++
kernel/irq/generic-chip.c |5
Introduce a new Kconfig option OLD_IRQ_AT91 to prepare migration to the new
AIC driver.
Enable this option for all supported at91 SoCs (both dt and non-dt boards).
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
arch/arm/mach-at91/Kconfig|7 +++
arch/arm/mach-at91
Move atmel aic driver doc to the interrupt-controller directory as the new
driver now lays in drivers/irqchip/atmel-aic.c.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
.../atmel,aic.txt} |0
1 file changed, 0 insertions(+), 0 deletions(-)
rename
Add irq line muxing definition for sam9x5 SoCs.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
arch/arm/boot/dts/at91sam9x5.dtsi | 111 -
1 file changed, 109 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi
b/arch/arm
Remove all the material related to AIC support on dt enabled SoCs.
This is now implemented within the new AIC driver
(drivers/irqchip/atmel-aic.c).
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
arch/arm/mach-at91/irq.c | 270 ++
1 file
no longer exposes the at91_aic_base variable
which is used by the at91_aic_read functions.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
arch/arm/mach-at91/pm.c| 32
arch/arm/mach-at91/setup.c |3 ++-
2 files changed, 22 insertions(+), 13
spurious
interrupts on startup and shutdown:
- disable all muxed interrupts during AIC probe
- disable every muxed interrupt attached to a specific AIC interrupt line
when this interrupt is disabled
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
drivers/irqchip/Makefile|1
Add irq muxing and irq-mapping dt binding documentation.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
.../bindings/interrupt-controller/atmel,aic.txt| 45
1 file changed, 45 insertions(+)
diff --git
a/Documentation/devicetree/bindings/interrupt
code and is in charge of calling the appropriate aic init functions.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
arch/arm/mach-at91/Kconfig | 10 +++---
arch/arm/mach-at91/board-dt-rm9200.c | 13 -
arch/arm/mach-at91/board-dt-sam9.c | 14
Add irq line muxing definition for sama5 SoCs.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
arch/arm/boot/dts/sama5d3.dtsi | 40 ++-
arch/arm/boot/dts/sama5d3_tcb1.dtsi | 22 +++
2 files changed, 61 insertions(+), 1 deletion
Fix pmc_clk_ids data type attribute (__initdata - __initconst).
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
Reported-by: Fengguang Wu fengguang...@intel.com
---
drivers/clk/at91/pmc.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/at91/pmc.c b
Document the clock properties required by the atmel-mci driver.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
.../devicetree/bindings/mmc/atmel-hsmci.txt|5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/atmel-hsmci.txt
b
Document the clock properties required by the spi-atmel driver.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
.../devicetree/bindings/spi/spi_atmel.txt |5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/spi_atmel.txt
b
is optional and may be implemented if the clock is not
a perfect clock (accuracy != 0 ppb).
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
Documentation/clk.txt|4 ++
drivers/clk/clk.c| 103 +++---
include/linux/clk-private.h
This patch adds support for accuracy retrieval on fixed clocks.
It also adds a new dt property called 'clock-accuracy' to define the clock
accuracy.
This can be usefull for oscillator (RC, crystal, ...) definitions which are
always given an accuracy characteristic.
Signed-off-by: Boris BREZILLON
field addition (struct clk_fixed_rate) from the 1st
patch to the 2nd patch of this series
Boris BREZILLON (2):
clk: add clk accuracy retrieval support
clk: add accuracy support for fixed clock
Documentation/clk.txt |4 +
.../devicetree/bindings/clock/fixed
Document the clock properties required by the atmel-ssc driver.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
.../devicetree/bindings/misc/atmel-ssc.txt |5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/misc/atmel-ssc.txt
b
Document the clock properties required by the atmel_tclib driver.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
.../devicetree/bindings/arm/atmel-at91.txt |8
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt
b
Document the clock properties required by the at91 i2c bus driver.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
Documentation/devicetree/bindings/i2c/i2c-at91.txt |2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-at91.txt
b
Document the clock properties required by the at91 i2c bus driver.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
.../devicetree/bindings/serial/atmel-usart.txt |7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/atmel-usart.txt
Document the clock properties required by the at91 ADC driver.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
.../devicetree/bindings/arm/atmel-adc.txt |5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/atmel-adc.txt
b
Document the clock properties required by the at91 usart driver.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
---
Changes since v1:
- fix commit message
.../devicetree/bindings/serial/atmel-usart.txt |7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation
platforms.
Best Regards,
Boris
On 08/12/2013 15:59, Boris BREZILLON wrote:
When using dt resources retrieval (interrupts and reg properties) there is
no predefined order for these resources in the platform dev resources
table.
Retrieve resources using platform_get_resource and platform_get_irq
Hello Mike,
On 19/12/2013 07:04, Mike Turquette wrote:
Quoting Boris BREZILLON (2013-12-17 06:36:22)
+unsigned long __clk_get_accuracy(struct clk *clk)
+{
+ unsigned long ret;
+
+ if (!clk)
+ return 0;
+
+ return clk-accuracy;
+}
+EXPORT_SYMBOL_GPL
Hello Rob,
On 23/01/2014 16:22, Rob Herring wrote:
On Sat, Jan 11, 2014 at 7:38 AM, boris brezillon
b.brezil...@overkiz.com wrote:
On 08/01/2014 15:21, Boris BREZILLON wrote:
Hello,
This series add the sunxi NFC support with up to 8 NAND chip connected.
I'm still in the early stages drivers
Hello Brian,
On 23/01/2014 02:49, Brian Norris wrote:
+ Huang
Hi Boris,
On Wed, Jan 08, 2014 at 03:21:56PM +0100, Boris BREZILLON wrote:
The Hynix nand flashes store their ECC requirements in byte 4 of its id
(returned on READ ID command).
Signed-off-by: Boris BREZILLON b.brezil
/5b4eb3ac406b9c98965714d40e8dd6da943d1ab0)
Best Regards,
Boris
Changes since v1:
- add HW ECC support
- rework NAND timings retrieval (use ONFI timing mode instead of raw timings)
- add nand-ecc-level property to specify NAND ECC requirements from DT
Boris BREZILLON (14):
mtd: nand: retrieve ECC
Add the sunxi NAND Flash Controller dt bindings documentation.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
.../devicetree/bindings/mtd/sunxi-nand.txt | 46
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd
Define a struct containing the standard NAND timings as described in NAND
datasheets.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
include/linux/mtd/nand.h | 49 ++
1 file changed, 49 insertions(+)
diff --git a/include/linux/mtd
Add HW ECC support for the sunxi NAND Flash Controller.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/mtd/nand/sunxi_nand.c | 279 +++--
1 file changed, 266 insertions(+), 13 deletions(-)
diff --git a/drivers/mtd/nand/sunxi_nand.c b
Enable the NFC and describe the NAND flash connected to this controller.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 31
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 031de97..5828923 100644
Define the NAND pinctrl configs.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
arch/arm/boot/dts/sun7i-a20.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 3b47253
Add a function to retrieve NAND timing mode (ONFI timing mode) from a given
DT node.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/of/of_mtd.c| 19 +++
include/linux/of_mtd.h |8
2 files changed, 27 insertions(+)
diff --git a/drivers
Add support for the sunxi NAND Flash Controller (NFC).
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/mtd/nand/Kconfig |6 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/sunxi_nand.c | 744 +
3 files changed, 751
Add NAND Flash controller node definition to the A20 SoC.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index
Some chip do not support automatic retrieval of ECC level requirements.
Provide an helper function to retrieve these requirements from DT.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/of/of_mtd.c| 25 +
include/linux/of_mtd.h |7
The Hynix nand flashes store their ECC requirements in byte 4 of its id
(returned on READ ID command).
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/mtd/nand/nand_base.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/drivers
Add a converter to retrieve NAND timings from an ONFI NAND timing mode.
This only support SDR NAND timings for now.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/mtd/nand/Makefile |2 +-
drivers/mtd/nand/nand_timings.c | 248
nand-ecc-level property statically defines NAND chip's ECC requirements.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
Documentation/devicetree/bindings/mtd/nand.txt |3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/nand.txt
b
Add documentation for the ONFI NAND timing mode property.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
Documentation/devicetree/bindings/mtd/nand.txt |5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/nand.txt
b/Documentation
Hello Rob,
Le 29/01/2014 18:11, Rob Herring a écrit :
On Wed, Jan 29, 2014 at 8:34 AM, Boris BREZILLON
b.brezillon@gmail.com wrote:
Add the sunxi NAND Flash Controller dt bindings documentation.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
.../devicetree/bindings/mtd
Le 29/01/2014 19:02, Gupta, Pekon a écrit :
Dear Rob, and other DT maintainers,
From: Rob Herring
[...]
+- onfi,nand-timing-mode : mandatory if the chip does not support the ONFI
+ standard.
Add to generic nand binding.
+- allwinner,rb : shall contain the native Ready/Busy ids.
+ or
+-
Hello Ezequiel
Le 29/01/2014 18:53, Ezequiel Garcia a écrit :
On Wed, Jan 29, 2014 at 03:34:13PM +0100, Boris BREZILLON wrote:
nand-ecc-level property statically defines NAND chip's ECC requirements.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
Documentation/devicetree
Le 29/01/2014 18:56, Jason Gunthorpe a écrit :
On Wed, Jan 29, 2014 at 03:34:18PM +0100, Boris BREZILLON wrote:
+static int sunxi_nand_chip_init_timings(struct sunxi_nand_chip *chip,
+ struct device_node *np)
+{
+ const struct nand_sdr_timings
On 29/01/2014 20:10, Jason Gunthorpe wrote:
On Wed, Jan 29, 2014 at 03:46:20PM -0300, Ezequiel Garcia wrote:
After CE# has been pulled high and then transitioned low again, the host
should issue a Set Features to select the appropriate asynchronous timing mode.
Oh, I had forgot you should do
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