From: Claudiu Beznea
SAM9X60 uses different bit offsets in registers. Adapt the driver to work
also for SAM9X60.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/sckc.c | 142
1 file changed, 107 insertions(+), 35 deletions(-)
diff --git
From: Claudiu Beznea
Add bindings for SAM9X60's slow clock controller.
Signed-off-by: Claudiu Beznea
---
Documentation/devicetree/bindings/clock/at91-clock.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt
From: Claudiu Beznea
Hi,
This series adapt SAMA5D2's shutdown controller driver to work for
SAM9X60's shutdown controller. The difference is that SAM9X60 have
option for RTT timer wakeup.
Thank you,
Claudiu Beznea
Claudiu Beznea (3):
power: reset: at91-poweroff: add RTT wakeup capability
From: Claudiu Beznea
Add documentation for SAM9X60 shutdown controller.
Signed-off-by: Claudiu Beznea
---
Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
From: Claudiu Beznea
Add support for SAM9X60 shutdown controller.
Signed-off-by: Claudiu Beznea
---
drivers/power/reset/at91-sama5d2_shdwc.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/power/reset/at91-sama5d2_shdwc.c
b/drivers/power/reset/at91-sama5d2_shdwc.c
From: Claudiu Beznea
Add RTT wakeup capability.
Signed-off-by: Claudiu Beznea
---
drivers/power/reset/at91-sama5d2_shdwc.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/power/reset/at91-sama5d2_shdwc.c
b/drivers/power/reset/at91-sama5d2_shdwc.c
index
Hi,
Please ignore this series. I'll resend a new one better formating the patches.
Thank you,
Claudiu Beznea
On 14.02.2019 12:39, Claudiu Beznea - M18063 wrote:
> From: Claudiu Beznea
>
> Hi,
>
> This series add slow clock support for SAM9X60. Apart from previous IPs, this
> one uses
From: Claudiu Beznea
Add bindings for SAM9X60's slow clock controller.
Signed-off-by: Claudiu Beznea
---
Documentation/devicetree/bindings/clock/at91-clock.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt
From: Claudiu Beznea
Add support for SAM9X60.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/sckc.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index b7163d3a2269..b3075c51d260 100644
---
From: Claudiu Beznea
Different IPs uses different offsets in registers for the same
functionality, thus adapt the driver to support this.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/sckc.c | 112 +---
1 file changed, 77 insertions(+), 35
From: Claudiu Beznea
Hi,
This series add slow clock support for SAM9X60. Apart from previous IPs, this
one uses different offsets in control register for different functionalities.
The series adapt current driver to work for all IPs using per IP
configurations initialized at probe.
Thank you,
From: Claudiu Beznea
Hi,
This series add power management support for SAM9X60. The following
platform specific power management modes were enabled for it:
Idle, ULP0 and ULP1.
Thank you,
Claudiu Beznea
Claudiu Beznea (8):
ARM: at91: pm: introduce at91_soc_pm structure
dt-bindings: arm:
From: Claudiu Beznea
Add initial PM support for SAM9X60. This include idle, WFI and ULP0.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/at91sam9.c | 18 ++
arch/arm/mach-at91/generic.h | 2 ++
arch/arm/mach-at91/pm.c | 14 ++
3 files changed, 34
From: Claudiu Beznea
There is no need to disable/enable PLLA when switching to one of the
ULP modes. The PLLA consumers should take care of this.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 31 ---
1 file changed, 31 deletions(-)
diff --git
From: Claudiu Beznea
In at91_pm_backup_init() return if it is not about SAMA5D2 SoCs.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index e42db02eafe4..c83f78000ab3 100644
---
From: Claudiu Beznea
Add support for per SoC wakeup source configuration. In this way
we could have per SoC wakeup sources, shutdown controller and power
management controller configurations for ULP1 power management mode.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 42
From: Claudiu Beznea
Add device tree binding for SAM9X60 SoC.
Signed-off-by: Claudiu Beznea
---
Documentation/devicetree/bindings/arm/atmel-at91.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt
From: Claudiu Beznea
Disable RC oscillator in ULP0 as datasheet specifies.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 39 +--
1 file changed, 37 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S
From: Claudiu Beznea
To have per SoC PM information add a new structure which embed
a member of type struct at91_pm_data. This will allow easy addition
of new information without contaminate struct at91_pm_data that is
passed to the last phase suspend function (at91_suspend_sram_fn).
From: Claudiu Beznea
Add ULP1 support for SAM9X60. In pm_suspend.S enable RC oscillator in
PMC if it is not enabled. At resume the state before suspend is
restored.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 24
arch/arm/mach-at91/pm_suspend.S
Hi Pavel, Rafael,
Do you have some other hints I could follow in order to solve the
scenario I tried to cover with these patches, if these are not
a proper fit for the current code?
Thank you,
Claudiu Beznea
On 08.01.2019 12:56, Claudiu Beznea - M18063 wrote:
> From: Claudiu Beznea
>
> Hi,
>
On 15.01.2019 00:53, Mark Brown wrote:
> On Fri, Jan 11, 2019 at 02:08:19PM +, claudiu.bez...@microchip.com wrote:
>> On 11.01.2019 14:39, Mark Brown wrote:
>
>>> Like I say I'm working offline so I can't check the links but it sounds
>>> like you're saying that the existing suspend mode
On 06.02.2019 10:13, Ludovic Desroches wrote:
> On Thu, Jan 31, 2019 at 05:18:04PM +0100, Claudiu Beznea - M18063 wrote:
>> From: Claudiu Beznea
>>
>> SAM9X60 uses high and low drive strengths. To implement this, in
>> at91_pinctrl_mux_ops::set_drivestrength and
>>
From: Claudiu Beznea
SAM9X60 uses high and low drive strengths. To implement this, in
at91_pinctrl_mux_ops::set_drivestrength and
at91_pinctrl_mux_ops::get_drivestrength we need bit numbers of
drive strengths (1 for low, 2 for high), thus change the code to
allow the usage of drive strength bit
From: Claudiu Beznea
This series adds drive strenght and slew rate support for SAMX60's pin
controller. For drive strenght we could have 2 values: low, high.
For slew rate we could have 2 values: enable, disabled.
Besides this I took the chance and adapt the documentation for at91 pinctrl
From: Claudiu Beznea
Add documentation for at91 pin controller banks.
Signed-off-by: Claudiu Beznea
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt| 23 ++
1 file changed, 23 insertions(+)
diff --git
From: Claudiu Beznea
Add device tree binding for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea
---
Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git
From: Claudiu Beznea
Add documentation for slew rate.
Signed-off-by: Claudiu Beznea
---
Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
From: Claudiu Beznea
Add slew rate support for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea
---
drivers/pinctrl/pinctrl-at91.c | 48 ++
drivers/pinctrl/pinctrl-at91.h | 1 +
include/dt-bindings/pinctrl/at91.h | 4
3 files changed, 53
From: Claudiu Beznea
Add drive strength support for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea
---
drivers/pinctrl/pinctrl-at91.c | 52 ++
drivers/pinctrl/pinctrl-at91.h | 2 ++
2 files changed, 54 insertions(+)
diff --git
From: Claudiu Beznea
Add compatibles for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea
---
drivers/pinctrl/pinctrl-at91.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 46443b97d811..5456a2692b8c 100644
---
On 06.02.2019 12:24, Ludovic Desroches wrote:
> On Wed, Feb 06, 2019 at 09:46:28AM +, claudiu.bez...@microchip.com wrote:
>>
>>
>> On 06.02.2019 10:13, Ludovic Desroches wrote:
>>> On Thu, Jan 31, 2019 at 05:18:04PM +0100, Claudiu Beznea - M18063 wrote:
From: Claudiu Beznea
From: Claudiu Beznea
Add slew rate support for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic Desroches
---
drivers/pinctrl/pinctrl-at91.c | 48 ++
drivers/pinctrl/pinctrl-at91.h | 1 +
include/dt-bindings/pinctrl/at91.h |
From: Claudiu Beznea
Add drive strength support for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic Desroches
---
drivers/pinctrl/pinctrl-at91.c | 52 ++
drivers/pinctrl/pinctrl-at91.h | 2 ++
2 files changed, 54 insertions(+)
From: Claudiu Beznea
Add documentation for slew rate.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic Desroches
---
Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Claudiu Beznea
SAM9X60 uses high and low drive strengths. To implement this, in
at91_pinctrl_mux_ops::set_drivestrength and
at91_pinctrl_mux_ops::get_drivestrength we need bit numbers of
drive strengths (1 for low, 2 for high), thus change the code to
allow the usage of drive strength bit
From: Claudiu Beznea
Add device tree binding for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic Desroches
---
Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git
From: Claudiu Beznea
This series adds drive strenght and slew rate support for SAMX60's pin
controller. For drive strenght we could have 2 values: low, high.
For slew rate we could have 2 values: enable, disabled.
Besides this I took the chance and adapt the documentation for at91 pinctrl
From: Claudiu Beznea
Add compatibles for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic Desroches
---
drivers/pinctrl/pinctrl-at91.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index
From: Claudiu Beznea
Add documentation for at91 pin controller banks.
Signed-off-by: Claudiu Beznea
Acked-by: Ludovic Desroches
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt| 23 ++
1 file changed, 23 insertions(+)
diff --git
From: Boris Brezillon
The regulator supports a dedicated suspend mode.
Implement the appropriate ->set_suspend_xx() hooks, add support for
->set_mode(), and provide basic PM ops functionalities to setup the
regulator in a suspend state when the system is entering suspend.
Signed-off-by: Boris
From: Claudiu Beznea
Implement shutdown method to make sure the PMIC will not enter the suspend
state when the system is shutdown.
This work is based on work done by Borris Brezillon on [1].
[1] https://www.spinics.net/lists/kernel/msg2942960.html
Signed-off-by: Claudiu Beznea
---
From: Boris Brezillon
When entering suspend-to-mem, all PMIC outputs are disabled except
VDDIODDR which is put in power saving mode, and whose voltage is
increased (probably to counter the poor accuracy of power saving mode).
Signed-off-by: Boris Brezillon
[claudiu.bez...@microchip.com: use
From: Claudiu Beznea
This series implements PM functionality for act8945a PMIC and use that support
on SAMA5D2 Xplained board.
Changes in v2:
- split patch 1/1 from previous series in 3 patches: one adding regmap,
one adding pm functionality, one adding shutdown functionality
- use dev_pm_ops
From: Claudiu Beznea
Fix line over 80 chars checkpatch.pl warning.
Signed-off-by: Claudiu Beznea
---
drivers/regulator/act8945a-regulator.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/regulator/act8945a-regulator.c
b/drivers/regulator/act8945a-regulator.c
From: Claudiu Beznea
Add documentation for regulator modes and suspend states.
Signed-off-by: Claudiu Beznea
---
.../bindings/regulator/act8945a-regulator.txt | 34 ++
1 file changed, 34 insertions(+)
diff --git
From: Claudiu Beznea
On some platforms (currently detected only on SAMA5D4) TX might stuck
even the pachets are still present in DMA memories and TX start was
issued for them. This happens due to race condition between MACB driver
updating next TX buffer descriptor to be used and IP reading the
From: Claudiu Beznea
Fix 'defined but not used' compiler warning for act8945a_suspend()
function in case CONFIG_PM_SLEEP is not defined.
Fixes: b5ebba46e694 ("regulator: act8945a-regulator: add shutdown function")
Signed-off-by: Claudiu Beznea
Reported-by: Andrei Stefanescu
---
From: Claudiu Beznea
Add basic PWM modes: normal and complementary. These modes should
differentiate the single output PWM channels from two outputs PWM
channels. These modes could be set as follow:
1. PWM channels with one output per channel:
- normal mode
2. PWM channels with two outputs per
From: Claudiu Beznea
Hi,
This series extends PWM framework with PWM modes.
The current patch series add the following PWM modes:
- PWM mode normal
- PWM mode complementary
- PWM mode push-pull
In the following description PWMx_y refers to output y of PWM with ID x.
Normal mode - for PWM
From: Claudiu Beznea
Add support for PWM push-pull mode. This is only supported by SAMA5D2 SoCs.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-atmel.c | 40
1 file changed, 36 insertions(+), 4 deletions(-)
diff --git a/drivers/pwm/pwm-atmel.c
From: Claudiu Beznea
Add push-pull mode support. In push-pull mode the channels' outputs have
same polarities and the edges are complementary delayed for one period.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/core.c | 3 +++
include/linux/pwm.h | 3 +++
2 files changed, 6 insertions(+)
From: Claudiu Beznea
Add documentation for PWM push-pull mode.
Signed-off-by: Claudiu Beznea
---
Hi Rob,
In prevous version I had your
From: Claudiu Beznea
Add pwm capabilities for Atmel/Microchip PWM controllers.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-atmel.c | 86 -
1 file changed, 57 insertions(+), 29 deletions(-)
diff --git a/drivers/pwm/pwm-atmel.c
From: Claudiu Beznea
Add PWM normal and complementary modes.
Signed-off-by: Claudiu Beznea
---
Hi Rob,
In prevous version I had your Acked-by tag on this patch but I removed it
in this version since there are some changes b/w the previous one and this
one. Please see bellow and let me know
Please ignore this one, the number of patches in cover letter is wrong: 0/9
should be 0/6.
Thank you,
Claudiu Beznea
On 17.12.2018 16:03, Claudiu Beznea - M18063 wrote:
> From: Claudiu Beznea
>
> Hi,
>
> This series extends PWM framework with PWM modes.
>
> The current patch series add the
From: Claudiu Beznea
Hi,
This series extends PWM framework with PWM modes.
The current patch series add the following PWM modes:
- PWM mode normal
- PWM mode complementary
- PWM mode push-pull
In the following description PWMx_y refers to output y of PWM with ID x.
Normal mode - for PWM
From: Claudiu Beznea
Add PWM normal and complementary modes.
Signed-off-by: Claudiu Beznea
---
Hi Rob,
In prevous version I had your Acked-by tag on this patch but I removed it
in this version since there are some changes b/w the previous one and this
one. Please see bellow and let me know
From: Claudiu Beznea
Add support for PWM push-pull mode. This is only supported by SAMA5D2 SoCs.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-atmel.c | 40
1 file changed, 36 insertions(+), 4 deletions(-)
diff --git a/drivers/pwm/pwm-atmel.c
From: Claudiu Beznea
Add pwm capabilities for Atmel/Microchip PWM controllers.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-atmel.c | 86 -
1 file changed, 57 insertions(+), 29 deletions(-)
diff --git a/drivers/pwm/pwm-atmel.c
From: Claudiu Beznea
Add documentation for PWM push-pull mode.
Signed-off-by: Claudiu Beznea
---
Hi Rob,
In prevous version I had your
From: Claudiu Beznea
Add push-pull mode support. In push-pull mode the channels' outputs have
same polarities and the edges are complementary delayed for one period.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/core.c | 3 +++
include/linux/pwm.h | 3 +++
2 files changed, 6 insertions(+)
From: Claudiu Beznea
Add basic PWM modes: normal and complementary. These modes should
differentiate the single output PWM channels from two outputs PWM
channels. These modes could be set as follow:
1. PWM channels with one output per channel:
- normal mode
2. PWM channels with two outputs per
On 28.11.2018 23:09, Brandon Streiff wrote:
> On 11/23/2018 3:59 AM, Harini Katakam wrote:
>> +/* Errata mask bits */
>> +#define MACB_ERRATA_RXLOCKUP0x0001
>> +
>> /* LSO settings */
>> #define MACB_LSO_UFO_ENABLE 0x01
>> #define
On 12.12.2018 00:13, Rob Herring wrote:
> On Tue, Nov 27, 2018 at 11:57:25AM +, claudiu.bez...@microchip.com wrote:
>> From: Claudiu Beznea
>>
>> Add documentation for regulator modes and suspend states.
>>
>> Signed-off-by: Claudiu Beznea
>> ---
>>
On 12.12.2018 15:32, Rob Herring wrote:
> On Wed, Dec 12, 2018 at 3:13 AM wrote:
>>
>>
>>
>> On 12.12.2018 00:13, Rob Herring wrote:
>>> On Tue, Nov 27, 2018 at 11:57:25AM +, claudiu.bez...@microchip.com
>>> wrote:
From: Claudiu Beznea
Add documentation for regulator modes
From: Claudiu Beznea
This series implements PM functionality for act8945a PMIC and use that support
on SAMA5D2 Xplained board.
Changes in v4:
- move dt-bindings/regulator/active-semi,8945a-regulator.h in documentation
patch; driver uses macros included in this file; due to this documentation
From: Claudiu Beznea
Add documentation for regulator modes and suspend states.
Signed-off-by: Claudiu Beznea
---
.../bindings/regulator/act8945a-regulator.txt | 34 ++
.../regulator/active-semi,8945a-regulator.h| 30 +++
2 files changed, 64
From: Boris Brezillon
When entering suspend-to-mem, all PMIC outputs are disabled except
VDDIODDR which is put in power saving mode, and whose voltage is
increased (probably to counter the poor accuracy of power saving mode).
Signed-off-by: Boris Brezillon
[claudiu.bez...@microchip.com: use
From: Claudiu Beznea
Implement shutdown method to make sure the PMIC will not enter the suspend
state when the system is shutdown.
This work is based on work done by Borris Brezillon on [1].
[1] https://www.spinics.net/lists/kernel/msg2942960.html
Signed-off-by: Claudiu Beznea
---
From: Claudiu Beznea
Unlock expert registers for act8945a.
This is based on orginal work of Boris Brezillon at [1].
[1] https://www.spinics.net/lists/kernel/msg2942960.html
Signed-off-by: Claudiu Beznea
---
drivers/regulator/act8945a-regulator.c | 13 -
1 file changed, 12
From: Boris Brezillon
The regulator supports a dedicated suspend mode.
Implement the appropriate ->set_suspend_xx() hooks, add support for
->set_mode(), and provide basic PM ops functionalities to setup the
regulator in a suspend state when the system is entering suspend.
Signed-off-by: Boris
From: Claudiu Beznea
Fix line over 80 chars checkpatch.pl warning.
Signed-off-by: Claudiu Beznea
---
drivers/regulator/act8945a-regulator.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/regulator/act8945a-regulator.c
b/drivers/regulator/act8945a-regulator.c
Hi Mark,
I saw that previous version of this series was applied to your tree just
after I've send this new one. The only difference b/w them is in the
documentation patch where I moved the new header. No functionality change.
Sorry for the noise,
Claudiu Beznea
On 13.12.2018 14:49, Claudiu
From: Claudiu Beznea
On some platforms (currently detected only on SAMA5D4) TX might stuck
even the pachets are still present in DMA memories and TX start was
issued for them. This happens due to race condition between MACB driver
updating next TX buffer descriptor to be used and IP reading the
On 19.10.2018 13:30, Jonas Danielsson wrote:
> On Wed, Oct 17, 2018 at 3:10 PM wrote:
>>
>>>
>>> We take the normal path of sys_reboot => kernel_restart => machine_restart
>>> ...
>>>
>>> I added code to print the c1 register in different paths. And I-cache
>>> is enabled.
>>> So now I am
This series implements PM functionality for act8945 and use that support
on sama5d2_xplained board.
Boris Brezillon (2):
regulator: act8945: Implement PM functionalities
ARM: dts: at91: sama5d2_xplained: Add proper regulator states for
suspend-to-mem
From: Boris Brezillon
The regulator supports a dedicated suspend mode.
Implement the appropriate ->set_suspend_xx() hooks, add support for
->set_mode(), and provide basic PM ops functionalities to setup the
regulator in a suspend state when the system is entering suspend.
We also implement the
From: Boris Brezillon
When entering suspend-to-mem, all PMIC outputs are disabled except
VDDIODDR which is put in power saving mode, and whose voltage is
increased (probably to counter the poor accuracy of power saving mode).
Signed-off-by: Boris Brezillon
[claudiu.bez...@microchip.com: use
From: Claudiu Beznea
Add documentation for regulator modes and suspend states.
Signed-off-by: Claudiu Beznea
---
.../bindings/regulator/act8945a-regulator.txt | 34 ++
1 file changed, 34 insertions(+)
diff --git
From: Claudiu Beznea
Implement shutdown method to make sure the PMIC will not enter the suspend
state when the system is shutdown.
This work is based on work done by Borris Brezillon on [1].
[1] https://www.spinics.net/lists/kernel/msg2942960.html
Signed-off-by: Claudiu Beznea
---
From: Boris Brezillon
When entering suspend-to-mem, all PMIC outputs are disabled except
VDDIODDR which is put in power saving mode, and whose voltage is
increased (probably to counter the poor accuracy of power saving mode).
Signed-off-by: Boris Brezillon
[claudiu.bez...@microchip.com: use
From: Claudiu Beznea
Fix line over 80 chars checkpatch.pl warning.
Signed-off-by: Claudiu Beznea
---
drivers/regulator/act8945a-regulator.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/regulator/act8945a-regulator.c
b/drivers/regulator/act8945a-regulator.c
From: Boris Brezillon
The regulator supports a dedicated suspend mode.
Implement the appropriate ->set_suspend_xx() hooks, add support for
->set_mode(), and provide basic PM ops functionalities to setup the
regulator in a suspend state when the system is entering suspend.
Signed-off-by: Boris
From: Claudiu Beznea
This series implements PM functionality for act8945a PMIC and use that support
on SAMA5D2 Xplained board.
Changes in v3:
- add patch "unlock expert registers"; it was wrongly missed in previous version
Changes in v2:
- split patch 1/1 from previous series in 3 patches: one
From: Claudiu Beznea
Unlock expert registers for act8945a.
This is based on orginal work of Boris Brezillon at [1].
[1] https://www.spinics.net/lists/kernel/msg2942960.html
Signed-off-by: Claudiu Beznea
---
drivers/regulator/act8945a-regulator.c | 13 -
1 file changed, 12
Hi Sebastian,
On 06.12.2018 00:40, Sebastian Reichel wrote:
> Hi,
>
> On Wed, Nov 07, 2018 at 06:23:40PM +0100, Alexandre Belloni wrote:
>> On 07/11/2018 14:54:17+, claudiu.bez...@microchip.com wrote:
>>> Hi Alexandre,
>>>
>>> On 06.11.2018 23:09, Alexandre Belloni wrote:
Hi Claudiu,
From: Claudiu Beznea
Move SHDWC realted data to only one structure to have them grouped.
Inspired from commit 9be74f0d39c1 ("power: reset: at91-poweroff: make
mpddrc_base part of struct shdwc").
Signed-off-by: Claudiu Beznea
---
Changes in v2:
- avoid allocate at91_shdwc and keep it static
On 17.10.2018 15:17, Jonas Danielsson wrote:
> On Tue, Oct 16, 2018 at 4:52 PM Alexander Stein
> wrote:
>>
>> On Tuesday, October 16, 2018, 3:30:24 PM CEST claudiu.bez...@microchip.com
>> wrote:
>>> Hi Jonas,
>>>
>>> On 07.10.2018 15:57, Jonas Danielsson wrote:
From: Jonas Danielsson
Hi Jonas,
On 07.10.2018 15:57, Jonas Danielsson wrote:
> From: Jonas Danielsson
>
> This fixes a bug where our embedded system (AT91SAM9260 based) would
> hang at reboot. At the most we managed 16 boot loops without a hang.
>
> With this patch applied the problem has not been observed and the
From: Claudiu Beznea
Add bindings for SAM9X60's slow clock controller.
Signed-off-by: Claudiu Beznea
---
Hi Rob,
I didn't added your Reviewed-by tag to this version since I changed
the driver with regards to clock-cells DT binding (and I though you
may want to comment on this).
Thank you,
From: Claudiu Beznea
Hi,
This series add slow clock support for SAM9X60. Apart from previous IPs, this
one uses different offsets in control register for different functionalities.
The series adapt current driver to work for all IPs using per IP
configurations initialized at probe.
Thank you,
From: Claudiu Beznea
Different IPs uses different bit offsets in registers for the same
functionality, thus adapt the driver to support this.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/sckc.c | 100
1 file changed, 67 insertions(+), 33
From: Claudiu Beznea
Add support for SAM9X60's slow clock.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/sckc.c | 74 +
1 file changed, 74 insertions(+)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index
From: Claudiu Beznea
The slow clock of SAMA5D4 has no bypass support thus remove it.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/sckc.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index e76b1d64e905..6c55a7a86f79 100644
---
From: Claudiu Beznea
atmel_qspi objects are kept in spi_controller objects, so, first get
pointer to spi_controller object and then get atmel_qspi object from
spi_controller object.
Fixes: 2d30ac5ed633 ("mtd: spi-nor: atmel-quadspi: Use spi-mem interface for
atmel-quadspi driver")
On 11.05.2019 00:32, Alexandre Belloni wrote:
> On 10/05/2019 11:23:31+, claudiu.bez...@microchip.com wrote:
>> From: Claudiu Beznea
>>
>> Different IPs uses different bit offsets in registers for the same
>> functionality, thus adapt the driver to support this.
>>
>> Signed-off-by: Claudiu
From: Claudiu Beznea
SAM9x60 LCD Controller has no option to select clock source as previous
controllers have. To be able to use the same driver even for this LCD
controller add a config option to know if controller supports this.
Signed-off-by: Claudiu Beznea
---
From: Claudiu Beznea
Hi,
These patches adds support for SAM9X60's LCD controller.
First patches add option to specify if controller clock source is fixed.
Second patch avoid a variable initialization in
atmel_hlcdc_crtc_mode_set_nofb().
The 3rd one adds specific bindings for SAM9X60 LCD
From: Claudiu Beznea
Remove cfg initialization with zero and read state with
drm_crtc_state_to_atmel_hlcdc_crtc_state() so that cfg to be initialized
with state's output_mode.
Signed-off-by: Claudiu Beznea
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 6 ++
1 file changed, 2
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