On 09.01.2018 05:34, Ming Lei wrote:
> On Tue, Jan 09, 2018 at 12:09:27AM +0300, Dmitry Osipenko wrote:
>> On 18.12.2017 15:22, Ming Lei wrote:
>>> When merging one bvec into segment, if the bvec is too big
>>> to merge, current policy is to move the whole bvec i
On 09.01.2018 17:33, Ming Lei wrote:
> On Tue, Jan 09, 2018 at 04:18:39PM +0300, Dmitry Osipenko wrote:
>> On 09.01.2018 05:34, Ming Lei wrote:
>>> On Tue, Jan 09, 2018 at 12:09:27AM +0300, Dmitry Osipenko wrote:
>>>> On 18.12.2017 15:22, Ming Lei wrote:
>>&g
Currently VDE clock rate is determined by clock config left from
bootloader, let's not rely on it and explicitly specify the clock
rate in the CCF driver.
Signed-off-by: Dmitry Osipenko
Acked-by: Peter De Schrijver
---
Change log:
v2: No change.
v3: No change.
drivers/clk/tegra/clk
Machine dies if HCLK, SCLK or EMC is disabled. Hence mark these clocks
as critical.
Signed-off-by: Dmitry Osipenko
Acked-by: Peter De Schrijver
---
Change log:
v2: Fixed accidentally missed marking EMC as critical on Tegra30 and
Tegra124. Switched to a use of common EMC gate
PLL_C_OUT_1 can't produce 216 MHz defined in the init_table. Let's
set it to 240 MHz and explicitly specify HCLK rate for consistency.
Signed-off-by: Dmitry Osipenko
Acked-by: Peter De Schrijver
---
Change log:
v2: No change.
v3: No change.
drivers/clk/tegra/clk-tegra20.c | 6
On 10.01.2018 05:40, Ming Lei wrote:
> On Tue, Jan 09, 2018 at 08:02:53PM +0300, Dmitry Osipenko wrote:
>> On 09.01.2018 17:33, Ming Lei wrote:
>>> On Tue, Jan 09, 2018 at 04:18:39PM +0300, Dmitry Osipenko wrote:
>>>> On 09.01.2018 05:34, Ming Lei wrote:
>>&g
USB Ethernet gadget now works on Tegra30.
Signed-off-by: Dmitry Osipenko
---
drivers/usb/chipidea/ci_hdrc_tegra.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c
b/drivers/usb/chipidea/ci_hdrc_tegra.c
index 7b65a1040d2c..7f4d2b6af37a
PLL_C_OUT_1 can't produce 216 MHz defined in the init_table. Let's
set it to 240 MHz and explicitly specify HCLK rate for consistency.
Signed-off-by: Dmitry Osipenko
Acked-By: Peter De Schrijver
---
Change log:
v2: No change.
drivers/clk/tegra/clk-tegra20.c | 6 +++---
1 file changed, 3
once drivers would be corrected.
Signed-off-by: Dmitry Osipenko
Acked-By: Peter De Schrijver
---
Change log:
v2: Fixed accidentally missed marking EMC as critical on Tegra30 and
Tegra124. Switched to a use of common EMC gate definition on Tegra20
and Tegra30.
drivers/clk
On 19.12.2017 20:52, Alan Stern wrote:
> On Sun, 17 Dec 2017, Dmitry Osipenko wrote:
>
>> Previously tegra-phy driver was built only when ehci-tegra was, now
>> tegra-phy has its own Kconfig entry. Remove the USB_PHY dependencies
>> from ehci-tegra's Kconfig since th
On 19.12.2017 22:56, Michael Turquette wrote:
> Quoting Dmitry Osipenko (2017-12-18 19:59:06)
>> Machine dies if HCLK, SCLK or EMC is disabled, hence mark these clocks
>> as critical. Currently some of drivers do not manage clocks properly,
>> expecting clocks to be 'always e
us a note to
> help improve the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Dmitry-Osipenko/usb-phy-tegra-Cleanup-error-messages/20171220-142227
> base: https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git next
> config: arm-tegra_defconfig (att
the overlay plane.
- Fixed warning that was reported by kbuild bot for ARM64 build.
Dmitry Osipenko (5):
drm/tegra: dc: Link DC1 to DC0 on Tegra20
drm/tegra: Restore opaque and drop alpha formats on Tegra20/30
drm/tegra: Trade overlay plane for cursor on older Tegra's
drm/tegra
-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/dc.c | 75 +++---
drivers/gpu/drm/tegra/dc.h | 2 ++
2 files changed, 59 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 460510366bb8..eaff8757bbe0 100644
host1x_syncpt_wait() takes timeout value in jiffies, but DRM passes it in
milliseconds.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/drm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index
iommu_map_sg() doesn't return a error value, but a size of the requested
IOMMU mapping or zero in case of error.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/gem.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/tegra/gem.c b
HW reset isn't actually broken on Tegra20, but there is a dependency on
first display controller to be taken out of reset for the second to be
enabled successfully.
Signed-off-by: Dmitry Osipenko
---
Change log:
v2: Got rid of global variable and now use driver_find_device() instead
ha.
Fixes: 7772fdaef939 ("drm/tegra: Support ARGB and ABGR formats")
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/dc.c| 29 ++---
drivers/gpu/drm/tegra/dc.h| 1 +
drivers/gpu/drm/tegra/fb.c| 13 -
drivers/gpu/drm/tegra/hub.c
On 20.12.2017 21:01, Thierry Reding wrote:
> On Wed, Dec 20, 2017 at 06:46:11PM +0300, Dmitry Osipenko wrote:
>> Commit 7772fdaef939 ("drm/tegra: Support ARGB and ABGR formats") broke
>> DRM's MODE_ADDFB IOCTL on Tegra20/30, because IOCTL uses XRGB format if
>&
On 20.12.2017 23:19, Thierry Reding wrote:
> On Wed, Dec 20, 2017 at 06:46:12PM +0300, Dmitry Osipenko wrote:
>> Older Tegra's do not support RGBA format for the cursor, but instead
>> overlay plane could be used for it. Since there is no much use for the
>> overlays on a r
On 20.12.2017 23:16, Thierry Reding wrote:
> On Wed, Dec 20, 2017 at 11:01:49PM +0300, Dmitry Osipenko wrote:
>> On 20.12.2017 21:01, Thierry Reding wrote:
>>> On Wed, Dec 20, 2017 at 06:46:11PM +0300, Dmitry Osipenko wrote:
>>>> Commit 7772fdaef939 ("drm/t
On 21.12.2017 01:02, Thierry Reding wrote:
> On Thu, Dec 21, 2017 at 12:05:40AM +0300, Dmitry Osipenko wrote:
>> On 20.12.2017 23:16, Thierry Reding wrote:
>>> On Wed, Dec 20, 2017 at 11:01:49PM +0300, Dmitry Osipenko wrote:
>>>> On 20.12.2017 21:01, Thierry Redi
On 21.12.2017 01:23, Dmitry Osipenko wrote:
> On 21.12.2017 01:02, Thierry Reding wrote:
>> On Thu, Dec 21, 2017 at 12:05:40AM +0300, Dmitry Osipenko wrote:
>>> On 20.12.2017 23:16, Thierry Reding wrote:
>>>> On Wed, Dec 20, 2017 at 11:01:49PM +0300, Dmitry Osipenko
config TEGRA_VDE
> tristate "NVIDIA Tegra Video Decoder Engine driver"
> depends on ARCH_TEGRA || COMPILE_TEST
> + select DMA_SHARED_BUFFER
> select SRAM
> help
> Say Y here to enable support for the NVIDIA Tegra video decoder
>
Thanks!
Acked-by: Dmitry Osipenko
Hi Hans,
On 04.12.2017 17:04, Hans Verkuil wrote:
> Hi Dmitry,
>
> As you already mention in the TODO, this should become a v4l2 codec driver.
>
> Good existing examples are the coda, qcom/venus and mtk-vcodec drivers.
>
> One thing that is not clear from this code is if the tegra hardware is
On 05.12.2017 16:21, Mikko Perttunen wrote:
> On 07.11.2017 23:23, Dmitry Osipenko wrote:
>> On 07.11.2017 15:28, Mikko Perttunen wrote:
>>> On 05.11.2017 18:46, Dmitry Osipenko wrote:
>>>> On 05.11.2017 14:01, Mikko Perttunen wrote:
>>>>> ...
>&g
On 15.12.2017 00:41, Lucas Stach wrote:
> Am Montag, den 11.12.2017, 18:26 +0300 schrieb Dmitry Osipenko:
>> On 11.12.2017 17:27, Thierry Reding wrote:
>>> On Mon, Dec 11, 2017 at 04:53:56PM +0300, Dmitry Osipenko wrote:
>>>> On 11.12.2017 13:13, Thierry Reding wro
On 13.12.2017 06:12, Dmitry Osipenko wrote:
> In order to reset busy HW properly, memory controller needs to be
> involved, otherwise it possible to get corrupted memory if HW was reset
> during DMA. Introduce memory client 'hot reset' API that will be used
> for resetting busy HW.
On 15.12.2017 00:41, Lucas Stach wrote:
> Am Montag, den 11.12.2017, 18:26 +0300 schrieb Dmitry Osipenko:
>> On 11.12.2017 17:27, Thierry Reding wrote:
>>> On Mon, Dec 11, 2017 at 04:53:56PM +0300, Dmitry Osipenko wrote:
>>>> On 11.12.2017 13:13, Thierry Reding wro
On 11.12.2017 16:31, Dmitry Osipenko wrote:
> On 11.12.2017 13:25, Thierry Reding wrote:
>> On Mon, Dec 11, 2017 at 02:07:38AM +0300, Dmitry Osipenko wrote:
>>> UTMI pads are shared by USB controllers and reset of UTMI pads is shared
>>> with the reset of USB1 controll
On 15.12.2017 15:51, Arnd Bergmann wrote:
> The newly introduced driver has optional suspend/resume functions,
> causing a warning when CONFIG_PM is disabled:
>
> drivers/gpu/drm/tegra/hub.c:749:12: error: 'tegra_display_hub_resume' defined
> but not used [-Werror=unused-function]
>
On 15.12.2017 16:33, Thierry Reding wrote:
> On Fri, Dec 15, 2017 at 01:51:52PM +0100, Arnd Bergmann wrote:
>> The newly introduced driver has optional suspend/resume functions,
>> causing a warning when CONFIG_PM is disabled:
>>
>> drivers/gpu/drm/tegra/hub.c:749:12: error:
On 15.12.2017 23:25, Lucas Stach wrote:
> Am Freitag, den 15.12.2017, 01:45 +0300 schrieb Dmitry Osipenko:
>> On 15.12.2017 00:41, Lucas Stach wrote:
>>> Am Montag, den 11.12.2017, 18:26 +0300 schrieb Dmitry Osipenko:
>>>> On 11.12.2017 17:27, Thierry Reding wrote:
&g
On 21.12.2017 17:10, Thierry Reding wrote:
> On Thu, Dec 21, 2017 at 01:38:31AM +0300, Dmitry Osipenko wrote:
>> On 21.12.2017 01:23, Dmitry Osipenko wrote:
>>> On 21.12.2017 01:02, Thierry Reding wrote:
>>>> On Thu, Dec 21, 2017 at 12:05:40AM +0300, Dmitry Osipenko
This fixes "utmi_phy_clk_enable: timeout waiting for phy to stabilize"
error message.
Signed-off-by: Dmitry Osipenko
---
Change log:
v2: Increased delay for the poll retry from 1us to 2000ms, thanks to
Thierry Reding for the suggestion.
drivers/usb/phy/phy-tegra-
Tegra's PHY driver has a mix of pr_err() and dev_err(), let's switch to
dev_err() and use common errors message formatting across the driver for
consistency.
Signed-off-by: Dmitry Osipenko
---
Change log:
v2: Removed function names as per Thierry's suggestion.
drivers/usb/phy/phy-tegra
Currently tegra-phy driver is built only when ehci-tegra is. Add own
Kconfig entry for tegra-phy so that drivers other than ehci-tegra (like
ChipIdea) could work without ehci-tegra.
Signed-off-by: Dmitry Osipenko
---
Change log:
v2: Added missed USB_ULPI dependency to USB_TEGRA_PHY
Previously tegra-phy driver was built only when ehci-tegra was, now
tegra-phy has its own Kconfig entry. Remove the USB_PHY dependencies
from ehci-tegra's Kconfig since they aren't useful anymore.
Signed-off-by: Dmitry Osipenko
---
drivers/usb/host/Kconfig | 3 ---
1 file changed, 3 deletions
to resolve the problem.
Signed-off-by: Dmitry Osipenko
---
Change log:
v2: Corrected UTMI pads reset by moving reset assert/deassert to the
PHY's probe.
drivers/usb/host/ehci-tegra.c | 87 ++-
drivers/usb/phy/phy-tegra-usb.c | 79
host1x_syncpt_wait() takes timeout value in jiffies, but DRM passes it in
milliseconds.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/drm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index
HW reset isn't actually broken on Tegra20, but there is a dependency on
first display controller to be taken out of reset for the second to be
enabled successfully.
Signed-off-by: Dmitry Osipenko
---
Change log:
v2: Got rid of global variable and now use driver_find_device() instead
non-alpha.
Fixes: 7772fdaef939 ("drm/tegra: Support ARGB and ABGR formats")
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/dc.c| 19 ++-
drivers/gpu/drm/tegra/dc.h| 1 +
drivers/gpu/drm/tegra/fb.c| 13 -
drivers/gpu/drm/tegra/hub.c | 3
-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/dc.c | 52 +-
1 file changed, 37 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 7e58143f4145..3282aa911351 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b
iommu_map_sg() doesn't return a error value, but a size of the requested
IOMMU mapping or zero in case of error.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/gem.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers
On 12.12.2017 03:26, Dmitry Osipenko wrote:
> VDE driver provides accelerated video decoding to NVIDIA Tegra SoC's,
> it is a result of reverse-engineering efforts. Driver has been tested on
> Toshiba AC100 and Acer A500, it should work on any Tegra20 device.
>
> In usersp
On 03.11.2017 16:07, Marcel Ziswiler wrote:
> Hi Rafael, dear community
>
> One of our customers reported seeing freezes when running the LTS Linux
> kernel 4.9.x on our Toradex Colibri T20 modules [1]. I was able to
> reproduce a complete SoC lock-up after a few minutes also running the
> latest
On 04.11.2017 23:49, Marcel Ziswiler wrote:
> On Fri, 2017-11-03 at 21:52 +0300, Dmitry Osipenko wrote:
>> I haven't seen any problems with the cpuidle on next and 4.14-rc7
>> works fine.
>>
>> # cat /sys/devices/system/cpu/cpu[0-1]/cpuidle/state[0-1]/usage
>> 1
On 05.11.2017 14:01, Mikko Perttunen wrote:
> Host1x has a feature called MLOCKs which allow a certain class
> (~HW unit) to be locked (in the mutex sense) and unlocked during
> command execution, preventing other channels from accessing the
> class while it is locked. This is necessary to prevent
On 05.11.2017 14:01, Mikko Perttunen wrote:
> Add an option to host1x_channel_request to interruptibly wait for a
> free channel. This allows IOCTLs that acquire a channel to block
> the userspace.
>
Wouldn't it be more optimal to request channel and block after job's pining,
when all patching
On 05.11.2017 14:01, Mikko Perttunen wrote:
> In the traditional channel allocation model, a single hardware channel
> was allocated for each client. This is simple from an implementation
> perspective but prevents use of hardware scheduling.
>
> This patch implements a channel allocation model
On 07.11.2017 18:29, Dmitry Osipenko wrote:
> On 07.11.2017 16:11, Mikko Perttunen wrote:
>> On 05.11.2017 19:14, Dmitry Osipenko wrote:
>>> On 05.11.2017 14:01, Mikko Perttunen wrote:
>>>> Add an option to host1x_channel_request to interruptibly wait for a
>>
On 11.11.2017 00:15, Dmitry Osipenko wrote:
> On 07.11.2017 18:29, Dmitry Osipenko wrote:
>> On 07.11.2017 16:11, Mikko Perttunen wrote:
>>> On 05.11.2017 19:14, Dmitry Osipenko wrote:
>>>> On 05.11.2017 14:01, Mikko Perttunen wrote:
>>>>> Add an opti
On 11.11.2017 17:06, Vladimir Zapolskiy wrote:
> Hi Dmitry,
>
> I'll add just a couple of minor comments, in general the code looks
> very good.
>
Thank you very much for the review!
> On 10/20/2017 12:34 AM, Dmitry Osipenko wrote:
>> NVIDIA Tegra20/30/114/124/132
On 11.11.2017 17:21, Vladimir Zapolskiy wrote:
> Hi Dmitry,
>
> On 10/20/2017 12:34 AM, Dmitry Osipenko wrote:
>> Add binding documentation for the Video Decoder Engine which is found
>> on NVIDIA Tegra20/30/114/124/132 SoC's.
>>
>> Signed-off-by: Dmitry Os
On 11.11.2017 17:18, Vladimir Zapolskiy wrote:
> Hi Dmitry,
>
> On 10/20/2017 12:34 AM, Dmitry Osipenko wrote:
>> From: Vladimir Zapolskiy
>>
>> All Tegra SoCs contain 256KiB IRAM, which is used to store CPU resume code
>> and by hardware engines like
On 07.11.2017 15:29, Mikko Perttunen wrote:
> On 05.11.2017 19:43, Dmitry Osipenko wrote:
>> On 05.11.2017 14:01, Mikko Perttunen wrote:
>>> In the traditional channel allocation model, a single hardware channel
>>> was allocated for each client. This is si
On 22.09.2017 17:02, Mikko Perttunen wrote:
> On 09/05/2017 04:33 PM, Dmitry Osipenko wrote:
>> On 05.09.2017 11:10, Mikko Perttunen wrote:
>>> ... >> diff --git a/drivers/gpu/host1x/hw/channel_hw.c
> b/drivers/gpu/host1x/hw/channel_hw.c
>>> ind
parentheses.
>
> Fix these problems by using pr_cont to remove unnecessary newlines
> and by fixing other small issues.
>
> Signed-off-by: Mikko Perttunen
> ---
It's indeed a bit more readable now.
Reviewed-by: Dmitry Osipenko
Tested-by: Dmitry Osipenko
--
Dmitry
On 18.08.2017 19:15, Mikko Perttunen wrote:
> Use the u64_to_user_ptr helper macro to cast IOCTL argument u64 values
> to user pointers instead of writing out the cast manually.
>
> Signed-off-by: Mikko Perttunen
> ---
> drivers/gpu/drm/tegra/drm.c | 9 -
> 1 file changed, 4
On 18.08.2017 19:15, Mikko Perttunen wrote:
> Since Tegra186 the Host1x hardware allows syncpoints to be assigned to
> specific channels, preventing any other channels from incrementing
> them.
>
> Enable this feature where available and assign syncpoints to channels
> when submitting a job.
On 19.08.2017 11:10, Mikko Perttunen wrote:
[snip]
>>> +host1x_hw_syncpt_set_protection(host, true);
>>
>> Is it really okay to force the protection? Maybe protection should be enabled
>> with a respect to CONFIG_TEGRA_HOST1X_FIREWALL? In that case we would have to
>> avoid software jobs
On 18.08.2017 19:15, Mikko Perttunen wrote:
> The gather filter is a feature present on Tegra124 and newer where the
> hardware prevents GATHERed command buffers from executing commands
> normally reserved for the CDMA pushbuffer which is maintained by the
> kernel driver.
>
> This commit enables
On 19.08.2017 13:35, Mikko Perttunen wrote:
> On 08/19/2017 01:09 PM, Dmitry Osipenko wrote:
>> On 19.08.2017 11:10, Mikko Perttunen wrote:
>> [snip]
>>>>> +host1x_hw_syncpt_set_protection(host, true);
>>>>
>>>> Is it really
On 19.08.2017 14:32, Mikko Perttunen wrote:
>
>
> On 08/19/2017 02:11 PM, Dmitry Osipenko wrote:
>> On 19.08.2017 13:35, Mikko Perttunen wrote:
>>> On 08/19/2017 01:09 PM, Dmitry Osipenko wrote:
>>>> On 19.08.2017 11:1
On 18.08.2017 19:15, Mikko Perttunen wrote:
> Since Tegra186 the Host1x hardware allows syncpoints to be assigned to
> specific channels, preventing any other channels from incrementing
> them.
>
> Enable this feature where available and assign syncpoints to channels
> when submitting a job.
On 19.08.2017 13:46, Mikko Perttunen wrote:
> On 08/19/2017 01:42 PM, Dmitry Osipenko wrote:
>> On 18.08.2017 19:15, Mikko Perttunen wrote:
>>> The gather filter is a feature present on Tegra124 and newer where the
>>> hardware prevents GATHERed command buffers from exec
On 18.08.2017 19:15, Mikko Perttunen wrote:
> Since Tegra186 the Host1x hardware allows syncpoints to be assigned to
> specific channels, preventing any other channels from incrementing
> them.
>
> Enable this feature where available and assign syncpoints to channels
> when submitting a job.
On 18.08.2017 19:15, Mikko Perttunen wrote:
> The gather filter is a feature present on Tegra124 and newer where the
> hardware prevents GATHERed command buffers from executing commands
> normally reserved for the CDMA pushbuffer which is maintained by the
> kernel driver.
>
> This commit enables
On 20.08.2017 19:24, Dmitry Osipenko wrote:
> On 18.08.2017 19:15, Mikko Perttunen wrote:
>> The gather filter is a feature present on Tegra124 and newer where the
>> hardware prevents GATHERed command buffers from executing commands
>> normally reserved for the CDMA pushbuffe
On 18.08.2017 19:15, Mikko Perttunen wrote:
> Since Tegra186 the Host1x hardware allows syncpoints to be assigned to
> specific channels, preventing any other channels from incrementing
> them.
>
> Enable this feature where available and assign syncpoints to channels
> when submitting a job.
On 20.08.2017 19:44, Dmitry Osipenko wrote:
> On 20.08.2017 19:24, Dmitry Osipenko wrote:
>> On 18.08.2017 19:15, Mikko Perttunen wrote:
>>> The gather filter is a feature present on Tegra124 and newer where the
>>> hardware prevents GATHERed command buffers from exec
On 18.08.2017 19:15, Mikko Perttunen wrote:
> Since Tegra186 the Host1x hardware allows syncpoints to be assigned to
> specific channels, preventing any other channels from incrementing
> them.
>
> Enable this feature where available and assign syncpoints to channels
> when submitting a job.
On 05.09.2017 11:10, Mikko Perttunen wrote:
> Use the u64_to_user_ptr helper macro to cast IOCTL argument u64 values
> to user pointers instead of writing out the cast manually.
>
> Signed-off-by: Mikko Perttunen
> ---
This patch doesn't apply to linux-next, you should probably rebase this
On 05.09.2017 11:10, Mikko Perttunen wrote:
> The disassembler for debug dumps was missing some newer host1x opcodes.
> Add disassembly support for these.
>
> Signed-off-by: Mikko Perttunen
> ---
> drivers/gpu/host1x/hw/debug_hw.c | 57
> ---
>
locates a new host1x channel for @device. May return NULL if CDMA
> * initialization fails.
> */
> struct host1x_channel *host1x_channel_request(struct device *dev)
>
Reviewed-by: Dmitry Osipenko
--
Dmitry
On 05.09.2017 11:10, Mikko Perttunen wrote:
> Since Tegra186 the Host1x hardware allows syncpoints to be assigned to
> specific channels, preventing any other channels from incrementing
> them.
>
> Enable this feature where available and assign syncpoints to channels
> when submitting a job.
Define the table of memory controller hot resets for Tegra30.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra30.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/memory/tegra/tegra30.c b/drivers/memory/tegra/tegra30.c
index
Define the table of memory controller hot resets for Tegra114.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra114.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/memory/tegra/tegra114.c b/drivers/memory/tegra/tegra114.c
index
From: Thierry Reding
Define the table of memory controller hot resets for Tegra210.
Signed-off-by: Thierry Reding
---
drivers/memory/tegra/tegra210.c | 45 +
1 file changed, 45 insertions(+)
diff --git a/drivers/memory/tegra/tegra210.c
Define the table of memory controller hot resets for Tegra20 and add
specific to Tegra20 hot reset operations.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra20.c | 118 +
1 file changed, 118 insertions(+)
diff --git a/drivers/memory/tegra/tegra20
In order to reset busy HW properly, memory controller needs to be
involved, otherwise it is possible to get corrupted memory or hang machine
if HW was reset during DMA. Introduce memory client 'hot reset' that will
be used for resetting of busy HW.
Signed-off-by: Dmitry Osipenko
---
drivers
Define the table of memory controller hot resets for Tegra124.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra124.c | 42 +
1 file changed, 42 insertions(+)
diff --git a/drivers/memory/tegra/tegra124.c b/drivers/memory/tegra/tegra124.c
index
On 20.04.2018 11:52, Marc Dietrich wrote:
> Hi Marcel,
>
> Am Montag, 19. Februar 2018, 16:12:52 CEST schrieb Marcel Ziswiler:
>> From: Marcel Ziswiler
>>
>> Since commit f8f8f1d04494 ("clk: Don't touch hardware when reparenting
>> during registration") ULPI has been broken on Tegra20 leading to
If IOVA allocation or IOMMU mapping fails, dma_free_wc() is invoked with
size=0 because of a typo, that triggers "kernel BUG at mm/vmalloc.c:124!".
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/host1x/cdma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/
Basically a re-send of V1 with some minor changes.
Dmitry Osipenko (14):
dt-bindings: arm: tegra: Remove duplicated Tegra30+ MC binding
dt-bindings: memory: tegra: Document #reset-cells property of the
Tegra30 MC
dt-bindings: arm: tegra: Document #reset-cells property of the Tegra20
Tegra30+ has some minor differences in registers / bits layout compared
to Tegra20. Let's squash Tegra20 driver into the common tegra-mc driver
in a preparation for the upcoming MC hot reset controls implementation,
avoiding code duplication.
Signed-off-by: Dmitry Osipenko
---
drivers/memory
Memory Controller has a memory client "hot reset" functionality, which
resets the DMA interface of a memory client. So MC is a reset controller
in addition to IOMMU.
Signed-off-by: Dmitry Osipenko
Reviewed-by: Rob Herring
---
.../devicetree/bindings/memory-controllers/nvidia,tegr
Tegra210 contains some unused leftover headers, remove them for
consistency.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra210.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c
index 3b8d0100088c
faults which may be undesirable by newer generations.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/mc.c | 21 +++--
drivers/memory/tegra/mc.h | 9 +
drivers/memory/tegra/tegra114.c | 2 ++
drivers/memory/tegra/tegra124.c | 6 ++
drivers/memory
This avoids unwanted interrupt during MC driver probe.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/mc.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index d2005b995821..e55b9733bd83 100644
Add definitions for the Tegra20+ memory controller hot resets.
Signed-off-by: Dmitry Osipenko
Reviewed-by: Rob Herring
---
include/dt-bindings/memory/tegra114-mc.h | 19 +++
include/dt-bindings/memory/tegra124-mc.h | 25 +
include/dt-bindings/memory
Memory Controller has a memory client "hot reset" functionality, which
resets the DMA interface of a memory client, so MC is a reset controller.
Signed-off-by: Dmitry Osipenko
Reviewed-by: Rob Herring
---
.../devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt | 12 ++
-by: Dmitry Osipenko
---
drivers/memory/tegra/mc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index a4803ac192bb..d2005b995821 100644
--- a/drivers/memory/tegra/mc.c
+++ b/drivers/memory/tegra/mc.c
@@ -252,8 +252,11 @@ static
There are two bindings for the same Memory Controller. One of the bindings
became obsolete long time ago and probably was left unnoticed, remove it
for consistency.
Signed-off-by: Dmitry Osipenko
Reviewed-by: Rob Herring
---
.../bindings/arm/tegra/nvidia,tegra30-mc.txt | 18
GART has a fixed aperture size, hence the number of pages is constant.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-gart.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c
index 89ec24c6952c
-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-gart.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c
index b62f790ad1ba..4c0abdcd1ad2 100644
--- a/drivers/iommu/tegra-gart.c
+++ b/drivers/iommu/tegra-gart.c
@@ -72,6 +72,8
Currently GART writes one page entry at a time. More optimal would be to
aggregate the writes and flush BUS buffer in the end, this gives map/unmap
10-40% (depending on size of mapping) performance boost compared to a
flushing after each entry update.
Signed-off-by: Dmitry Osipenko
---
drivers
GART driver wasn't ever been utilized in upstream, but finally this should
change sometime soon with Tegra's DRM driver rework. In general GART driver
works fine, though there are couple things that could be improved.
Dmitry Osipenko (4):
iommu/tegra: gart: Add debugging facility
iommu/tegra
It must return the number of unmapped bytes on success, returning 0 means
that unmapping failed and in result only one page is unmapped.
Signed-off-by: Dmitry Osipenko
---
drivers/iommu/tegra-gart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/tegra-gart.c b
disabled in kernels config by allowing user to manually
select the PHY driver.
Signed-off-by: Dmitry Osipenko
---
drivers/usb/host/Kconfig | 4 +---
drivers/usb/phy/Kconfig | 9 +
drivers/usb/phy/Makefile | 2 +-
3 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/usb
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