[PATCH] arm/arm64: KVM: send SIGBUS error to qemu

when the pfn is KVM_PFN_ERR_HWPOISON, it indicates to send SIGBUS signal from KVM's fault-handling code to qemu, qemu can handle this signal according to the fault address. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm/kvm/mmu.c | 20 include

[PATCH] kvm: pass the virtual SEI syndrome to guest OS

In the RAS implementation, hardware pass the virtual SEI syndrome information through the VSESR_EL2, so set the virtual SEI syndrome using physical SEI syndrome el2_elr to pass to the guest OS Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming wu <wuquanm...@h

[PATCH v2-kernel 4.1] irqdomain: handle the per-CPU irq trigger type settings

into irqdata, then get this IRQ type fromirq_get_trigger_type, and enable_percpu_irq sets the type Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Haibin Zhang <zhanghaib...@huawei.com> --- kernel/irq/irqdomain.c | 12 ++-- 1 files changed, 10 insertions(+),

[PATCH] acpi: ghes: fix the OSPM acknowledges error flow

-by: Dongjiu Geng <gengdong...@huawei.com> --- drivers/acpi/apei/ghes.c | 19 ++- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index bb83044..44bb65f 100644 --- a/drivers/acpi/apei/ghes.c +++ b/drivers/acpi/apei/

[PATCH v3] acpi: apei: fix the wrongly iterate generic error status block

estatus iteration to properly increment using acpi_hest_get_next, and correct the iteration termination condition because the status block data length only includes error data length. Clear the CPER estatus printing iteration logic to use same macro. Signed-off-by: Dongjiu Geng <gengdong...@huawei.

[PATCH v2] acpi: apei: fix the wrongly iterate generic error status block

estatus iteration to properly increment using acpi_hest_get_next, and correct the iteration termination condition because the status block data length only includes error data length. Clear the CPER estatus printing iteration logic to use same macro. Signed-off-by: Dongjiu Geng <gengdong...@huawei.

[PATCH] acpi: apei: fix the wrongly parse generic error status block

The revision 0x300 generic error data entry is different with the old version. when ghes_do_proc traverses to get the data entry, it does not consider this difference. so when error status block has revision 0x300 data entry, it will have issue. Signed-off-by: Dongjiu Geng <gengdong...@huawei.

[PATCH v4] acpi: apei: fix the wrong iteration of generic error status block

estatus iteration to properly increment using iteration macro, and correct the iteration termination condition because the status block data length only includes error data length. Convert the CPER estatus checking and printing iteration logic to use same macro. Signed-off-by: Dongjiu Geng <gengd

[PATCH v2] KVM: arm64: pass vcpu esr_el2 and far_el2 sysre to user space

For the firmware-first RAS solution, SEA and SEI is injected by the user space, user space needs to know the vcpu's esr_el2 and far_el2 value, so add them to sysreg. user space uses the IOCTL KVM_GET_ONE_REG can get their value. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch

[PATCH] KVM: arm64: add esr_el2 and far_el2 to sysreg

For the firmware-first RAS solution, SEA and SEI is injected by the user space, user space needs to know the esr_el2 and far_el2's value, so add them to sysreg. user space uses the IOCTL KVM_GET_ONE_REG can get their value. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Sign

[PATCH v5 7/7] arm64: kvm: handle SEI notification and inject virtual SError

. VSESR_EL2 is a new RAS extensions register which provides the syndrome value reported to software on taking a virtual SError interrupt exception. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> --- arch/arm/include/asm/kvm_host

[PATCH v5 0/7] Add RAS virtualization support to SEA/SEI notification type

. Dongjiu Geng (5): acpi: apei: Add SEI notification type support for ARMv8 support user space to query RAS extension feature arm64: kvm: route synchronous external abort exceptions to el2 KVM: arm/arm64: Allow get exception syndrome and arm64: kvm: handle SEI notification and inject

[PATCH v5 6/7] KVM: arm64: Allow get exception information from userspace

injection logic to userspace, when userspace injects the SEA exception to guest OS, it needs to specify the far_el1 value, so this patch give the exception virtual address to user space. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@h

[PATCH v11 0/6] Add RAS virtualization support for armv8 SEA and SEI

ledges the error, check the ACK value */ (qemu) xp /1 0x785D0098 785d00f0: 0x /* After OSPM acknowledges the error, check the ACK value */ (qemu) xp /1 0x785D0098 0000785d00f0: 0x0001 Dongjiu Geng (6): ACPI: add APEI/HEST/CPER structures a

[PATCH v11 3/6] ACPI: build and enable APEI GHES in the Makefile and configuration

Add CONFIG_ACPI_APEI configuration in the Makefile and enable it in the arm-softmmu.mak Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- default-configs/arm-softmmu.mak | 1 + hw/acpi/Makefile.objs | 1 + 2 files changed, 2 insertions(+) diff --git a/default-confi

[PATCH v11 1/6] ACPI: add APEI/HEST/CPER structures and macros

(1) Add related APEI/HEST table structures and macros, these definition refer to ACPI 6.1 and UEFI 2.6 spec. (2) Add generic error status block and CPER memory section definition, user space only handle memory section errors. Signed-off-by: Dongjiu Geng <gengdong...@huawei.

[PATCH v11 4/6] target-arm: kvm64: detect guest RAS EXTENSION feature

check if kvm supports guest RAS EXTENSION. if so, set corresponding feature bit for vcpu. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- linux-headers/linux/kvm.h | 1 + target/arm/cpu.h | 3 +++ target/arm/kvm64.c| 8 3 files changed, 12 insertions(+)

[PATCH v5 2/7] KVM: arm64: Save ESR_EL2 on guest SError

From: James Morse When we exit a guest due to an SError the vcpu fault info isn't updated with the ESR. Today this is only done for traps. The v8.2 RAS Extensions define ISS values for SError. Update the vcpu's fault_info with the ESR on SError so that handle_exit() can

[PATCH v5 1/7] arm64: cpufeature: Detect CPU RAS Extentions

From: Xie XiuQi ARM's v8.2 Extentions add support for Reliability, Availability and Serviceability (RAS). On CPUs with these extensions system software can use additional barriers to isolate errors and determine if faults are pending. Add cpufeature detection and a barrier

[PATCH v5 5/7] arm64: kvm: route synchronous external abort exceptions to el2

bort is generated in the guest OS, it will trap to EL3 firmware, firmware will be according to the HCR_EL2.TEA to decide to jump to hypervisor or host OS. In the guest OS, RAS error record access will trap to EL2. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm

[PATCH v5 3/7] acpi: apei: Add SEI notification type support for ARMv8

and CONFIG_ACPI_APEI_SEI do not defined. Expose one API ghes_notify_sex() to external, external modules can call this exposed APIs to parse and handling the SEA/SEI. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/mm/fault.c | 21 +++-- drivers/acpi/apei/K

[PATCH v5 4/7] support user space to query RAS extension feature

this support Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/kvm/reset.c | 3 +++ include/uapi/linux/kvm.h | 1 + 2 files changed, 4 insertions(+) diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c index 3256b9228e75..b7313ee028e9 100644 --- a/arch/arm64/kvm/r

[PATCH v11 2/6] ACPI: Add APEI GHES Table Generation support

must acknowledges the error via Read Ack register. so user space must check the ack value to avoid read-write race condition. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- hw/acpi/aml-build.c | 2 + hw/acpi/hest_ghes.c | 345 +

[PATCH v11 5/6] target-arm: kvm64: handle SIGBUS signal for synchronous External Abort

, PSTATE, far_elx, elr_elx etc, when switch to guest OS, it will jump to the synchronous external abort vector table entry. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> --- include/sysemu/kvm.h | 2 +- linux-headers/asm

[PATCH v11 6/6] target-arm: kvm64: Handle SError interrupt for the guest OS

the host VA to guest OS PA and record this error PA to HEST table. 2. set specified virtual SError syndrome and pass the value to KVM. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> --- linux-headers/linux/kvm.h | 1 + target/arm

[PATCH v4 3/3] arm64: kvm: inject SError with user space specified syndrome

no one cares the old VSESR_EL2 value (3) Add a new KVM_ARM_SEI ioctl to set the VSESR_EL2 value and pend a virtual system error Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> --- Documentation/virtual/kvm/api.txt| 10

[PATCH v4 1/3] arm64: kvm: support user space to detect RAS extension feature

Handle userspace's detection for RAS extension, because sometimes the userspace needs to know the CPU's capacity Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/kvm/reset.c | 11 +++ include/uapi/linux/kvm.h | 1 + 2 files changed, 12 insertions(+) diff

[PATCH v4 2/3] arm64: kvm: route synchronous external abort exceptions to el2

it delegates to the guest OS kernel Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm/kvm_arm.h | 2 ++ arch/arm64/include/asm/kvm_emulate.h | 7 +++ 2 files changed, 9 insertions(+) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/inclu

[PATCH v1] arm64: kvm: route synchronous external abort exceptions to el2

it delegates to the guest OS kernel Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm/kvm_arm.h | 2 ++ arch/arm64/include/asm/kvm_emulate.h | 7 +++ 2 files changed, 9 insertions(+) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/inclu

[PATCH v2] arm64: kvm: route synchronous external abort exceptions to el2

it delegates to the guest OS kernel Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm/kvm_arm.h | 2 ++ arch/arm64/include/asm/kvm_emulate.h | 7 +++ 2 files changed, 9 insertions(+) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/inclu

[PATCH v4] arm64: kvm: inject SError with user space specified syndrome

no one cares the old VSESR_EL2 value (3) Add a new KVM_ARM_SEI ioctl to set the VSESR_EL2 value and pend a virtual system error Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> --- Documentation/virtual/kvm/api.txt| 10

[PATCH v2] acpi: apei: Add SEI notification type support for ARMv8

the address to a invalid value. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/Kconfig| 4 ++-- arch/arm64/mm/fault.c | 4 ++-- drivers/acpi/apei/Kconfig | 15 + drivers/acpi/apei/ghes.c | 56 +++ i

[PATCH v3 1/2] acpi: apei: remove the unused dead-code for SEA/NMI notification type

s.mo...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- drivers/acpi/apei/ghes.c | 33 + 1 file changed, 5 insertions(+), 28 deletions(-) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index d661d45..3eee30a 100644 --- a/driver

[PATCH v3 2/2] acpi: apei: Add SEI notification type support for ARMv8

, EL3 firmware needs to identify the address to a invalid value. Cc: Borislav Petkov <b...@suse.de> Cc: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Tested-by: Tyler Baicar <tbai...@codeaurora.org> Tested-by: Dongjiu Geng <gengdo

[PATCH v4 2/2] acpi: apei: Add SEI notification type support for ARMv8

, EL3 firmware needs to identify the address to a invalid value. Cc: Borislav Petkov <b...@suse.de> Cc: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Tested-by: Tyler Baicar <tbai...@codeaurora.org> Tested-by: Dongjiu Geng <gengdo

[PATCH v4 1/2] acpi: apei: remove the unused dead-code for SEA/NMI notification type

s.mo...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- drivers/acpi/apei/ghes.c | 33 + 1 file changed, 5 insertions(+), 28 deletions(-) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index d661d45..3eee30a 100644 --- a/driver

[PATCH v5 1/2] acpi: apei: remove the unused dead-code for SEA/NMI notification type

the unnecessary handling when CONFIG_ACPI_APEI_SEA is not defined. For the NMI notification, it has the same issue as SEA notification, so also remove the unused dead-code for it. Cc: Tyler Baicar <tbai...@codeaurora.org> Cc: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Ge

[PATCH v5 2/2] acpi: apei: Add SEI notification type support for ARMv8

, EL3 firmware needs to identify the address to a invalid value. Cc: Borislav Petkov <b...@suse.de> Cc: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Tested-by: Tyler Baicar <tbai...@codeaurora.org> Tested-by: Dongjiu Geng <gengdo

[PATCH v2] arm/arm64: KVM: set right LR register value for 32 bit guest when inject abort

of: A32 T32 Undefined Instruction +4+2 Prefetch Abort +4+4 Data Abort +8+8 IRQ or FIQ +4+4 Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Tested-by: Haibin

[PATCH v7 4/4] arm64: kvm: handle SEI notification for guest

the address recorded by APEI table is not accurate, so can not identify the address to hwpoison memory and can not notify guest to do the recovery, so at the same time, let user space specify a valid ESR and inject virtual SError. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Sign

[PATCH v7 0/4] Add RAS virtualization support

to software on taking a virtual SError interrupt exception. By default specify this syndrome value to IMPLEMENTATION DEFINED, because all-zero means 'RAS error: Uncategorized' instead of 'no valid ISS'. Dongjiu Geng (4): arm64: kvm: route synchronous external abort exceptions to EL2 arm64: kvm

[PATCH v7 3/4] arm64: kvm: Set Virtual SError Exception Syndrome for guest

switch, restore this value to VSESR_EL2 only when HCR_EL2.VSE is set. This value no need to be saved because it is stale vale when guest exit. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> [Set an impdef ESR for Virtual-SError

[PATCH v7 1/4] arm64: kvm: route synchronous external abort exceptions to EL2

_EL1 and ERRSELR_EL1 are zero. Then, the others ERX* registers are RAZ/WI. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm/kvm_arm.h | 2 ++ arch/arm64/include/asm/kvm_emulate.h | 7 +++ arch/arm64/include/asm/kvm_host.h| 2 ++ arch/arm64/i

[PATCH v7 2/4] arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl

for a generic API for all KVM architectures that will allow us to do something like this. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> --- Documentation/virtual/kvm/api.txt | 11 +++ arch/arm/include/asm/kvm_host.h | 1

[PATCH RESEND v2] arm/arm64: KVM: set right LR register value for 32 bit guest when inject abort

of: A32 T32 Undefined Instruction +4+2 Prefetch Abort +4+4 Data Abort +8+8 IRQ or FIQ +4+4 Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Tested-by: Haibin

[PATCH] arm64: KVM: set right LR register value for 32 bit guest when inject abort

Instruction +4+2 Prefetch Abort +4+4 Data Abort +8+8 IRQ or FIQ +4+4 Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Haibin Zhang <zhanghaib...@huawei.com> ---

[PATCH] arm64: KVM: Skip PSTATE.PAN reest at EL2 in non-VHE

PSTATE.PAN disables reading and/or writing to a userspace virtual address from EL1 in non-VHE or from EL2 in VHE. In non-VHE, there is no any userspace mapping at EL2, so no need to reest the PSTATE.PAN. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Haibin Zhang <

[PATCH v2] acpi: apei: remove the unused dead-code for SEA notification type

the unnecessary handling when CONFIG_ACPI_APEI_SEA is not defined. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- It is ever discussed here: https://lkml.org/lkml/2017/9/8/623 --- drivers/acpi/apei/ghes.c | 14 -- 1 file changed, 14 deletions(-) diff --git a/drivers/acp

[PATCH] arm64: KVM: VHE: reset PSTATE.UAO when switch to host

will use the incorrect PSTATE.UAO. So check and reset the PSTATE.UAO when switching to host. Move the reset PSTATE.PAN on entry to EL2 together with PSTATE.UAO reset. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Haibin Zhang <zhanghaib...@huawei.com> Tested-by:

[PATCH v3 2/2] acpi: apei: Add SEI notification type support for ARMv8

the address to a invalid value. Cc: Stephen Boyd <sb...@codeaurora.org> Cc: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Tested-by: Tyler Baicar <tbai...@codeaurora.org> --- change since v2: 1. remove the dependency to ACPI_APEI_S

[PATCH v3 1/2] acpi: apei: remove the unused dead-code for SEA notification type

t; Cc: Tyler Baicar <tbai...@codeaurora.org> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- v2->v3: 1. remove the fault_ipa address If ESR_ELx.DFSC is Synchronous External Abort on memory access(0b01), the hpfar_el2's value will be UNKNOWN, so this value is not accu

[PATCH v6 7/7] arm64: kvm: handle SEI notification and pass the virtual syndrome

to software on taking a virtual SError interrupt exception. change since v5: 1. not call the memory_failure() to handle the SEI error 2. kvm classify the SError and decide how to do. 3. add code to deliver signal compatible to Non-KVM user. 4. correct some typo errors Signed-off-by: Dongjiu Geng

[PATCH v6 0/7] Add RAS virtualization support for SEA/SEI notification type in KVM

SError. This syndrome value is set to the VSESR_EL2. VSESR_EL2 is a new ARMv8.2 RAS extensions register which provides the syndrome value reported to software on taking a virtual SError interrupt exception. Dongjiu Geng (5): acpi: apei: remove the unused code arm64: kvm: support user space

[PATCH v6 2/7] KVM: arm64: Save ESR_EL2 on guest SError

From: James Morse When we exit a guest due to an SError the vcpu fault info isn't updated with the ESR. Today this is only done for traps. The v8.2 RAS Extensions define ISS values for SError. Update the vcpu's fault_info with the ESR on SError so that handle_exit() can

[PATCH v6 5/7] arm64: kvm: route synchronous external abort exceptions to el2

bort is generated in the guest OS, it will trap to EL3 firmware, EL3 firmware will check the HCR_EL2.TEA value to decide to jump to hypervisor or host OS. Enabling HCR_EL2.TERR makes error record access from guest trap to EL2. change since v5: 1. modify some patch description Signed-off-by: Dongjiu Geng <g

[PATCH v6 6/7] KVM: arm64: allow get exception information from userspace

injection logic to userspace, when userspace injects the SEA exception to guest OS, it needs to specify the far_el1 value, so this patch gives the exception virtual address to userspace. change since v5: 1. modify some patch description Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Sign

[PATCH v6 1/7] arm64: cpufeature: Detect CPU RAS Extentions

From: Xie XiuQi ARM's v8.2 Extentions add support for Reliability, Availability and Serviceability (RAS). On CPUs with these extensions system software can use additional barriers to isolate errors and determine if faults are pending. Add cpufeature detection and a barrier

[PATCH v6 4/7] arm64: kvm: support user space to query RAS extension feature

. This patch adds support for querying the availability of this extension. change since v5: 1. modify some patch description Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/kvm/reset.c | 3 +++ include/uapi/linux/kvm.h | 1 + 2 files changed, 4 insertions(+) diff --git a/arch

[PATCH v6 3/7] acpi: apei: remove the unused code

: 1. remove the SEI notification type handling, because the SEI is asynchronous exception and the address is not accurate. so not call memory_failure() to handle it. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- drivers/acpi/apei/ghes.c | 14 -- 1 file chang

[PATCH v8 6/7] arm64: kvm: Set Virtual SError Exception Syndrome for guest

switch, restore this value to VSESR_EL2 only when HCR_EL2.VSE is set. This value no need to be saved because it is stale vale when guest exit. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> [Set an impdef ESR for Virtual-SError

[PATCH v8 1/7] arm64: cpufeature: Detect CPU RAS Extentions

b and config option, reworded commit message] Signed-off-by: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Reviewed-by: Catalin Marinas <catalin.mari...@arm.com> --- arch/arm64/Kconfig | 16 arch/arm64/incl

[PATCH v8 5/7] arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl

, If has, will set it. Otherwise, nothing to do. For this ESR specifying, Only support for AArch64, not support AArch32. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> change the name to KVM_CAP_ARM_INJECT_SERROR

[PATCH v8 7/7] arm64: kvm: handle SError Interrupt by categorization

a valid ESR and inject virtual SError, guest can just kill the current application if the non-consumed error coming from guest application. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Signed-off-by: Quanming Wu <wuquanm...@huawei.com> --- arch/arm64/include/asm/esr.h

[PATCH v8 4/7] KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA

raps attempts to access the physical error registers. ERRIDR_EL1 advertises the number of error records, we return zero meaning we can treat all the other registers as RAZ/WI too. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> [removed specific emulation, use trap_raz_wi() directly for

[PATCH v8 2/7] KVM: arm64: Save ESR_EL2 on guest SError

() can determine if this was a RAS SError and decode its severity. Signed-off-by: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/kvm/hyp/switch.c | 15 --- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/

[PATCH v8 0/7] Support RAS virtualization in KVM

', so set this ESR to IMPLEMENTATION DEFINED by default if user space does not specify it. Dongjiu Geng (5): acpi: apei: Add SEI notification type support for ARMv8 KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl a

[PATCH v8 3/7] acpi: apei: Add SEI notification type support for ARMv8

users. External modules can call this exposed API to parse APEI table and handle the SEI notification. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- drivers/acpi/apei/Kconfig | 15 ++ drivers/acpi/apei/ghes.c | 53 +++ includ

[PATCH RESEND] arm64: fault: avoid send SIGBUS two times

If APEI handling the memory error is failed, the do_mem_abort() and do_sea() will all deliver SIGBUS. In fact, sending one time can be enough, so correct it. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/mm/fault.c | 5 ++--- 1 file changed, 2 insertions(+), 3 del

[PATCH] arm64: avoid send SIGBUS two times

If APEI handling the memory error is failed, the SIGBUS will be sent twice. In fact, send one time can be enough, so correct it. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/mm/fault.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/ar

[PATCH v3] arm64: v8.4: Support for new floating point multiplication instructions

detects this feature and let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Dave Martin <dave.mar...@arm.com> Cc: Suzuki K Poulose <suzuki.poul...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Reviewed-by: Dave Martin <dave.mar...@arm.com>

[PATCH v3] arm64: fault: avoid send SIGBUS two times

arm64_notify_die() so can always return success. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Reviewed-by: James Morse <james.mo...@arm.com> Reviewed-by: Xie XiuQi <xiexi...@huawei.com> --- Change since V2: 1. Address James's comments to not change the si_code for SIGBUS Change si

[PATCH v1 0/3] manually add Error Synchronization Barrier at exception handler entry and exit

pport". In Huawei's platform, we do not support IESB, so software needs to insert that. Dongjiu Geng (3): arm64: add a macro for SError synchronization arm64: add error synchronization barrier in kernel_entry/kernel_exit KVM: arm64: add ESB in exception handler entry and exit. James

[PATCH v1 1/3] arm64: add a macro for SError synchronization

Barrier(ESB) operations. In this macros, if system supports RAS Extensdddon instead of IESB, it will insert an ESB instruction. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm/assembler.h | 9 + 1 file changed, 9 insertions(+) diff --git a/arch

[PATCH v1 2/3] arm64: add error synchronization barrier in kernel_entry/kernel_exit

, it will immediately trap to EL3 firmware. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/kernel/entry.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index e147c1d..6dde644 100644 --- a/arch/arm64/kernel/entry.S

[PATCH v1 3/3] KVM: arm64: add ESB in exception handler entry and exit.

synchronization operation. Only add the ESB in the important exception handler path to reduce the impact on performance. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/kvm/hyp/entry.S | 2 ++ arch/arm64/kvm/hyp/hyp-entry.S | 1 + 2 files changed, 3 insertions(+)

[PATCH] arm64: v8.4: Support for new floating point multiplication variant

ARM v8.4 extensions include support for new floating point multiplication variant instructions to the AArch64 SIMD instructions set. Let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Suzuki K Poulose <suzuki.poul...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@h

[RESEND PATCH] arm64: v8.4: Support for new floating point multiplication variant

ARM v8.4 extensions include support for new floating point multiplication variant instructions to the AArch64 SIMD instructions set. Let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Suzuki K Poulose <suzuki.poul...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@h

[PATCH V2] arm64: fault: avoid send SIGBUS two times

arm64_notify_die() so can always return success. The si_code BUS_MCEERR_AR can tell user-space there is a hardware error that needs to be dealt with immediately Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/mm/fault.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-)

[RESEND PATCH V2] arm64: fault: avoid send SIGBUS two times

arm64_notify_die() so can always return success. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- 1. Address James's comments to update the commit messages 2. Address James's comments to not change the si_code for SIGBUS --- arch/arm64/mm/fault.c | 7 +++ 1 file changed, 3 insertions

[PATCH v2] arm64: v8.4: Support for new floating point multiplication instructions

detects this feature and let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Dave Martin <dave.mar...@arm.com> Cc: Suzuki K Poulose <suzuki.poul...@arm.com> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- Change since v1: 1. Address Dave and Suzuki's

[PATCH v4] KVM: arm/arm64: fix the incompatible matching for external abort

value. Using kvm_vcpu_trap_get_fault() instead fixes it for good. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com> --- arch/arm/include/asm/kvm_emulate.h | 2 +- arch/arm64/include/asm/kvm_emulate.h | 2 +- 2 files changed, 2 inse

[PATCH] KVM: arm/arm64: Fix external abort type matching

FSC_SEA_TTW2 FSC_SEA_TTW3 0x18FSC_SECC 0x1cFSC_SECC_TTW0 FSC_SECC_TTW1 FSC_SECC_TTW2 FSC_SECC_TTW3 Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- As shown below code: The kvm_vcpu_trap_get_fault_type() only return {I,D}FSC bit[5]:bit[2], not the whole {I,D}FSC, but FSC_SE

[PATCH v2] KVM: arm/arm64: Fix external abort type matching

FSC_SEA_TTW2 FSC_SEA_TTW3 0x18FSC_SECC 0x1cFSC_SECC_TTW0 FSC_SECC_TTW1 FSC_SECC_TTW2 FSC_SECC_TTW3 CC: James Morse <james.mo...@arm.com> CC: Tyler Baicar <tbai...@codeaurora.org> Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- As shown below code: The kvm_vcpu_t

[PATCH v7] acpi: apei: remove the unused dead-code for SEA/NMI notification type

the unnecessary handling when CONFIG_ACPI_APEI_SEA is not defined. For the NMI notification, it has the same issue as SEA notification, so also remove the unused dead-code for it. Cc: Tyler Baicar <tbai...@codeaurora.org> Cc: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Ge

[PATCH v6] acpi: apei: remove the unused dead-code for SEA/NMI notification type

the unnecessary handling when CONFIG_ACPI_APEI_SEA is not defined. For the NMI notification, it has the same issue as SEA notification, so also remove the unused dead-code for it. Cc: Tyler Baicar <tbai...@codeaurora.org> Cc: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Ge

[RESEND PATCH v7] acpi: apei: remove the unused dead-code for SEA/NMI notification type

the unnecessary handling when CONFIG_ACPI_APEI_SEA is not defined. For the NMI notification, it has the same issue as SEA notification, so also remove the unused dead-code for it. Cc: Tyler Baicar <tbai...@codeaurora.org> Cc: James Morse <james.mo...@arm.com> Signed-off-by: Dongjiu Ge

[PATCH v12 1/4] arm64: KVM: export the capability to set guest SError syndrome

to user space, otherwise returns false. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Reviewed-by: James Morse <james.mo...@arm.com> Change from V11: 1. Change the commit message 2. Update the Documentation/virtual/kvm/api.tx --- Documentation/virtual/kvm/api.txt | 11 +++

[PATCH v12 3/4] ACPI / APEI: Add SEI notification type support for ARMv8

ACPI 6.x adds support for NOTIFY_SEI as a GHES notification mechanism, so add new GHES notification handling functions. Expose API ghes_notify_sei() to arch code, arch code will call this API when it gets this NOTIFY_SEI. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Note: Fi

[PATCH v12 4/4] arm64: handle NOTIFY_SEI notification by the APEI driver

Add a helper to handle the NOTIFY_SEI notification, when kernel gets the NOTIFY_SEI notification, call this helper and let APEI driver to handle this notification. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm64/include/asm/system_misc.h | 1 + arch/arm64/kernel/t

[PATCH v12 2/4] arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS

, user space can get/set the SError exception state to do migrate/snapshot/suspend. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> Change since V11: Address James's comments, thanks James 1. Align the struct of kvm_vcpu_events to 64 bytes 2. Avoid exposing the stale ESR

[PATCH v12 0/4] set VSESR_EL2 by user space and support NOTIFY_SEI notification

that padding transferred to user-space doesn't contain kernel stack. Dongjiu Geng (4): arm64: KVM: export the capability to set guest SError syndrome arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS ACPI / APEI: Add SEI notification type support for ARMv8 arm64: handle NOTIFY_SEI

[PATCH v1 1/2] ACPI / APEI: Add SEI notification type support for ARMv8

ACPI 6.x adds support for NOTIFY_SEI as a GHES notification mechanism, so add new GHES notification handling functions. Expose API ghes_notify_sei() to arch code, arch code will call this API when it gets this NOTIFY_SEI. Signed-off-by: Dongjiu Geng --- Note: Firmware will follow the SError mask

[PATCH v1 0/2] Add NOTIFY_SEI notification type support

This series patch is separated from https://www.spinics.net/lists/kvm/msg168917.html 1. CPI 6.1 adds support for NOTIFY_SEI as a GHES notification mechanism, so this patch supports this notification in software Dongjiu Geng (2): ACPI / APEI: Add SEI notification type support for ARMv8

[PATCH v1 2/2] arm64: handle NOTIFY_SEI notification by the APEI driver

When kernel or KVM gets the NOTIFY_SEI notification, it firstly calls the APEI driver to handle this notification. Signed-off-by: Dongjiu Geng --- arch/arm64/kernel/traps.c | 15 +++ 1 file changed, 15 insertions(+) --- change since https://www.spinics.net/lists/kvm/msg168919.html

[PATCH v1 2/2] arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS

, user space can get/set the SError exception state to do migrate/snapshot/suspend. Signed-off-by: Dongjiu Geng -- this series patch is separated from https://www.spinics.net/lists/kvm/msg168917.html change since V12: 1. change (vcpu->arch.hcr_el2 & HCR_VSE) to !!(vcpu->arch.hcr_el2

[PATCH] usb: xhci: remove the code build warning

-tegra.c:482:6: note: ‘err’ was declared here Signed-off-by: Dongjiu Geng --- How to reproduce: 1. make defconfig ARCH=arm 2. make -j100 CROSS_COMPILE=arm-linux-gnueabi- ARCH=arm Then you can see below warnings: drivers/usb/host/xhci-tegra.c: In function ‘tegra_xusb_mbox_thread’: drivers/usb/host

[PATCH v5 1/2] arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS

, user space can get/set the SError exception state to do migrate/snapshot/suspend. Signed-off-by: Dongjiu Geng --- change since v4: Address Christoffer's comments, thanks Christoffer's review. 1. Change the 'Capebility' to 'Capability' to fix the typo issue 2. Not wrap the line below 80 chars

[PATCH v3] KVM: arm/arm64: fix the incompatible matching for external abort

For this matching, switch expression uses fault type which is not {I,D}FSC value, but the case expression uses {I,D}FSC, they are incompatible. So change the switch expression to use {I,D}FSC. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- arch/arm/include/asm/kvm_emulate.h

[PATCH v9 7/7] arm64: kvm: handle guest SError Interrupt by categorization

and has not (yet) been architecturally consumed by the PE, the exception is precise. In order to make it simple, we temporarily shut down the VM to isolate the error. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- change since v8: 1. Check handle_guest_sei()'s return value 2. Tempo

[PATCH v9 5/7] arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl

, If has, will set it. Otherwise, nothing to do. For this ESR specifying, Only support for AArch64, not support AArch32. Signed-off-by: Dongjiu Geng <gengdong...@huawei.com> --- change the name to KVM_CAP_ARM_INJECT_SERROR_ESR instead of X_ARM_RAS_EXTENSION, suggested here

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