[PATCH] thermal: core: fix some format issues on critical shutdown string

The critical shutdown notice string used to have some spaces missing, which makes it not so pretty. Add the spaces to satisfy usual English space rules. Reported-by: Mingcong Bai <jeff...@aosc.io> Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/thermal/thermal_core.c |

[PATCH v3 3/5] iio: adc: sun4i-gpadc-iio: add support for H3 thermal sensor

-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v3: - Clock name changes. - Fixed some small issues pointed out by Quentin. drivers/iio/adc/sun4i-gpadc-iio.c | 228 +++--- include/linux/mfd/sun4i-gpadc.h | 27 + 2 files changed, 215 insertions(

[PATCH v3 4/5] ARM: sun8i: h3: add support for the thermal sensor in H3

As we have gained the support for the thermal sensor in H3, we can now add its device nodes to the device tree. Add them to the H3 device tree. The H5 thermal sensor has some differences, and will be added furtherly. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v3: - Cloc

[PATCH v3 2/5] iio: adc: sun4i-gpadc-iio: rename A23/A33-specified registers to contain A23

SUN8I", not "SUN8I_A23". Add "_A23" after "SUN8I" on the register names. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/iio/adc/sun4i-gpadc-iio.c | 2 +- include/linux/mfd/sun4i-gpadc.h | 6 +++--- 2 files changed, 4 insertions(+), 4 deletion

[PATCH v3 0/5] IIO-based thermal sensor driver for Allwinner H3 SoC

ady merged. Icenowy Zheng (5): dt-bindings: update the Allwinner GPADC device tree binding for H3 iio: adc: sun4i-gpadc-iio: rename A23/A33-specified registers to contain A23 iio: adc: sun4i-gpadc-iio: add support for H3 thermal sensor ARM: sun8i: h3: add support for the thermal sensor i

[PATCH v3 1/5] dt-bindings: update the Allwinner GPADC device tree binding for H3

Allwinner H3 features a thermal sensor like the one in A33, but has its register re-arranged, the clock divider moved to CCU (originally the clock divider is in ADC) and added a pair of bus clock and reset. Update the binding document to cover H3. Signed-off-by: Icenowy Zheng <icen...@aosc

[PATCH v3 5/5] ARM: sun8i: h3: add partial CPU thermal zone

are also not added yet. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm/boot/dts/sun8i-h3.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index efe3a8e4f2af..551efecaab5d 100644 --- a/arch/arm/boot/dts

Re: [PATCH 2/3] ARM: sunxi: h3/h5: Add sun8i-h3-ephy compatible

于 2017年7月28日 GMT+08:00 下午5:44:51, Chen-Yu Tsai 写到: >On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe > wrote: >> This patch adds the sun8i-h3-ephy compatible to the internal PHY. >> >> Signed-off-by: Corentin Labbe >> --- >>

Re: [linux-sunxi] [PATCH 10/10] ARM: dts: sun8i: Add SY8106A regulator to Orange Pi PC

于 2017年7月26日 GMT+08:00 下午3:08:06, Chen-Yu Tsai <w...@csie.org> 写到: >On Sun, Jul 23, 2017 at 6:27 PM, Icenowy Zheng <icen...@aosc.io> wrote: >> From: Ondrej Jirman <meg...@megous.com> >> >> Add SY8106A regulator to r_i2c bus and enable the r_i2c bus on >

[PATCH 0/2] Last step to working Allwinner R40 pinctrl

This patchset contains only two patches. The first one is a minor fix for the A10 pinctrl driver, add a function of a pin, which used to be missing in A10/A20 pinctrl driver. The second one is the real R40 pinctrl part, with fixes suggested by Chen-Yu. Icenowy Zheng (2): pinctrl: sunxi: add

[PATCH 1/2] pinctrl: sunxi: add a missing function of A10/A20 pinctrl driver

to the A10 one, we need to only fix the A10 driver now. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c in

[PATCH 2/2] pinctrl: sunxi: add support of R40 to A10 pinctrl driver

R40 is said to be an upgrade of A20, and its pin configuration is also similar to A20 (and thus similar to A10). Add support for R40 to the A10 pinctrl driver. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/pinctrl/sunxi/Kconfig | 2 +- drivers/pinctrl/sunxi/p

Re: [PATCH 2/2] pinctrl: sunxi: add support of R40 to A10 pinctrl driver

于 2017年7月7日 GMT+08:00 上午4:50:30, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Thu, Jul 06, 2017 at 10:28:22PM +0800, Icenowy Zheng wrote: >> SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), >>SUNXI_FUNCTION(0x0, "gpio_in"), >>

[PATCH v5 06/10] regulator: axp20x-regulator: add support for AXP803

AXP803 PMIC also have a series of regulators (DCDCs and LDOs) controllable via I2C/RSB bus. Add support for them. Signed-off-by: Icenowy Zheng <icen...@aosc.io> Acked-by: Chen-Yu Tsai <w...@csie.org> --- Changes in v4: - Fixed somewhere which mention AXP806 before 803. Changes in

[PATCH v5 10/10] arm64: allwinner: a64: enable Wi-Fi for Pine64

as GPIO (so it's with 2.0mm pitch, not 2.54mm as other GPIO headers). Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts

[PATCH v5 00/10] AXP803 PMIC support for Pine64

in Pine64 device tree. PATCH 10 enables Wi-Fi for Pine64. Icenowy Zheng (10): arm64: allwinner: a64: enable RSB on A64 irqchip/sunxi-nmi: add A64 R_INTC to the binding doc irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC arm64: allwinner: a64: add NMI (R_INTC) controller on A64 arm64

[PATCH v5 05/10] arm64: allwinner: a64: add AXP803 node to Pine64 device tree

The Pine64 (including Pine64+) boards have an AXP803 as its main PMIC. Add its device node. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/all

[PATCH v5 01/10] arm64: allwinner: a64: enable RSB on A64

Allwinner A64 have a RSB controller like the one on A23/A33 SoCs. Add it and its pinmux. Signed-off-by: Icenowy Zheng <icen...@aosc.io> Acked-by: Chen-Yu Tsai <w...@csie.org> --- Changes in v2: - Removed bonus properties in pio node. - Added Chen-Yu's ACK. arch/arm64/boot/dts/allw

[PATCH v5 03/10] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC

Add support for the newly imported compatible for the A64 R_INTC in irq-sunxi-nmi driver. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v5: - Fix A64 R_INTC compatible. drivers/irqchip/irq-sunxi-nmi.c | 13 + 1 file changed, 13 insertions(+) diff --git a/d

[PATCH v5 04/10] arm64: allwinner: a64: add NMI (R_INTC) controller on A64

Allwinner A64 SoC features a R_INTC controller, which controls the NMI line, and this interrupt line is usually connected to the AXP PMIC. Add support for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v4: - Changes it to use R_INTC binding and change node label to

[PATCH v5 07/10] mfd: axp20x: add axp20x-regulator cell for AXP803

As axp20x-regulator now supports AXP803, add a cell for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> Acked-by: Chen-Yu Tsai <w...@csie.org> --- Changes in v5: - Removed wrong snippet. Changes in v4: - Added a trailing comma for new cell, for easier further cell addition. C

[PATCH v5 02/10] irqchip/sunxi-nmi: add A64 R_INTC to the binding doc

The A31 NMI driver seems to be using wrong base address. As we're going to convert to use a correct NMI base address (and correctly name it to R_INTC as the datasheet suggests), add a new compatible string for the "correct" R_INTC, which we will use for A64 SoC. Signed-off-by: Ice

[PATCH v5 08/10] arm64: allwinner: a64: add DTSI file for AXP803 PMIC

As nearly all A64 boards are using AXP803 PMIC, add a DTSI file for it, like the old DTSI files for AXP20x/22x, for the common parts of the PMIC. Signed-off-by: Icenowy Zheng <icen...@aosc.io> Acked-by: Mark Brown <broo...@kernel.org> --- Changes in v5: - Added Mark Brown's ACK. C

[PATCH v5 09/10] arm64: allwinner: a64: enable AXP803 regulators for Pine64

Add support of AXP803 regulators in the Pine64 device tree, in order to enable many future functionalities, e.g. Wi-Fi. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 109 + 1 file changed, 109 insertions(+) diff

Re: [linux-sunxi] Re: [PATCH v4 07/10] mfd: axp20x: add axp20x-regulator cell for AXP803

于 2017年4月25日 GMT+08:00 下午3:57:17, Lee Jones <lee.jo...@linaro.org> 写到: >On Tue, 25 Apr 2017, Icenowy Zheng wrote: > >> As axp20x-regulator now supports AXP803, add a cell for it. >> >> Signed-off-by: Icenowy Zheng <icen...@aosc.io> >> Acked-by: Chen

Re: [linux-sunxi] [PATCH v4 09/10] arm64: allwinner: a64: enable AXP803 regulators for Pine64

于 2017年4月25日 GMT+08:00 下午5:24:13, Andre Przywara <andre.przyw...@arm.com> 写到: >Hi, > >On 24/04/17 17:01, Icenowy Zheng wrote: >> Add support of AXP803 regulators in the Pine64 device tree, in order >to >> enable many future functionalities, e.g. Wi-Fi. > &

[PATCH 1/2] mmc: sunxi: fix support for new timings mode only SoCs

: b0600daebf31 ("mmc: sunxi: Support controllers that can use both old and new timings") Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/mmc/host/sunxi-mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/s

[PATCH 2/2] mmc: sunxi: fix new timings mode on A64 EMMC (MMC2) controller

it to true in the configuration struct. Fixes: 4fb3ce07eafa ("mmc: sunxi: Add EMMC (MMC2) controller compatible") Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/mmc/host/sunxi-mmc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mmc/host/sunxi-mmc.c b/

Re: [linux-sunxi] [PATCH 2/2] mmc: sunxi: fix new timings mode on A64 EMMC (MMC2) controller

于 2017年8月6日 GMT+08:00 上午10:39:54, Chen-Yu Tsai <w...@csie.org> 写到: >On Sat, Aug 05, 2017 at 05:35:55AM +0800, Icenowy Zheng wrote: >> The configuration struct of A64 EMMC(MMC2) compatible used to >> have the needs_new_timings variable missing, which lead to NULL >> p

[PATCH v2] mmc: sunxi: fix support for new timings mode only SoCs

: b0600daebf31 ("mmc: sunxi: Support controllers that can use both old and new timings") Signed-off-by: Icenowy Zheng <icen...@aosc.io> Reviewed-by: Chen-Yu Tsai <w...@csie.org> --- Changes in v2: - Slightly adjusted the format of the Fixes: line/ - Added r

[PATCH 2/4] drivers: soc: sunxi: fix error processing on base address when claiming

-EPROBE_DEFER in the former situation, and ignored the latter situation (which will lead to the kernel to panic). Fix the behavior on abnormal base address processing when claiming. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/soc/sunxi/sunxi_sram.c | 3 +++ 1 file changed, 3 inse

[PATCH 3/4] drivers: soc: sunxi: add support for remapping func value to reg value

E, and for Allwinner A64's SRAM C the needed register value to claim it to DE2 is 0, and the value that enables CPU's access to the SRAM is 1. Add a value remapping in sunxi_sram_func structure, and let the sunxi_sram_of_parse function set the remapped register value. Signed-off-by: Icenowy Zh

[PATCH 0/4] Allwinner A64 SRAM C (DE2 SRAM) support

; this patch fixed probe defering when claiming SRAM region. Patch 3 adds the remapping code. Patch 4 adds necessary codes for A64 SRAM C. Icenowy Zheng (4): dt-bindings: add binding for Allwinner A64 SRAM controller and SRAM C drivers: soc: sunxi: fix error processing on base address when claiming

[PATCH 1/4] dt-bindings: add binding for Allwinner A64 SRAM controller and SRAM C

The display engine on Allwinner A64 wants to claim the SRAM C section. Add a SRAM controller compatible for A64, and a SRAM section compatible for its SRAM C. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Documentation/devicetree/bindings/sram/sunxi-sram.txt | 9 +++-- 1 file c

[PATCH 4/4] drivers: soc: sunxi: add support for A64 and its SRAM C

Allwinner A64's display engine claims the SRAM C section to work. Add support for the A64 SRAM controller and the SRAM C section of it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/soc/sunxi/sunxi_sram.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drive

[PATCH] pinctrl: sunxi: fix V3s pinctrl driver IRQ bank base

kernel.org Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c index c86d3c42a905..496ba34e1f5f 100644 --- a

[PATCH 01/13] dt-bindings: update the binding for Allwinner H3 DE2 support

Allwinner H3 features a "Display Engine 2.0". Add device tree bindings for the following parts: - H3 TCONs - H3 Mixers - H3 Display engine Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- .../bindings/display/sunxi/sun4i-drm.txt | 25 ++ 1

[PATCH 08/13] [NOT FOR REVIEW NOW] drm: bridge: Enable polling hpd event in dw_hdmi

From: Jernej Skrabec Some custom phys don't support hpd interrupts. Add support for polling such events. Signed-off-by: Jernej Skrabec --- drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-)

[PATCH 09/13] [NOT FOR REVIEW NOW] drm: bridge: Add a pre_init function for the dw_hdmi driver

From: Jernej Skrabec Some platform glues of DesignWare HDMI controller require some initialization to be performed before probing the main HDMI controller. Add a pre_init function for this kind of work. Signed-off-by: Jernej Skrabec ---

[PATCH 07/13] ARM: sun8i: h3: add display engine pipeline barebone

As we have already the support for the DE2 on Allwinner H3, add the display engine pipeline device tree nodes to its DTSI file. The H5 pipeline has some differences and will be enabled later. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm/boot/dts/sun8i-h3.dtsi

[PATCH 10/13] [NOT FOR REVIEW NOW] clk: sunxi: Add CLK_SET_RATE_PARENT flag for H3 HDMI clock

From: Jernej Skrabec <jernej.skra...@siol.net> When setting the HDMI clock of H3, the PLL_VIDEO clock needs to be set. Add CLK_SET_RATE_PARENT flag for H3 HDMI clock. Signed-off-by: Jernej Skrabec <jernej.skra...@siol.net> Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- dr

[PATCH 02/13] drm: sun4i: add support for H3 mixers

From: Icenowy Zheng <icen...@aosc.xyz> Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI channels, and the other has 1 VI and 1 UI. There's also some graphics post-process function that is missing on mixer1, however, as we currently support none of these functions, th

[PATCH 04/13] drm: sun4i: add compatible for H3 display engine

Add a compatible string for H3 display engine in sun4i_drv code. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/gpu/drm/sun4i/sun4i_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index fd99fe

[PATCH 06/13] clk: sunxi-ng: export CLK_PLL_DE for H3

The CLK_PLL_DE is needed to be referenced in device tree for H3, for both forcing the parent of PLL_DE. So export it to the device tree binding header. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 3 +-- include/dt-bindings/clock/sun8i-h3

[PATCH 05/13] clk: sunxi-ng: allow CLK_DE to set CLK_PLL_DE for H3

_DE to set CLK_PLL_DE (add CLK_SET_RATE_PARENT to it). Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c in

[PATCH 11/13] [NOT FOR REVIEW NOW] drm: sun4i: Add a glue for the DesignWare HDMI controller in H3

From: Jernej Skrabec Allwinner H3 features DesignWare HDMI Transmitter paired with custom PHY. For now, only video is supported by the driver. However, audio and CEC are also supported by the hardware. Signed-off-by: Jernej Skrabec ---

[PATCH 13/13] [NOT FOR REVIEW NOW] ARM: sun8i: h3: enable HDMI output on Orange Pi PC

Orange Pi PC board has a HDMI-A port connected to the HDMI controller of Allwinner H3 SoC. Enable the HDMI output in Orange Pi PC device tree. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 16 1 file changed, 16 inse

[PATCH 12/13] [NOT FOR REVIEW NOW] ARM: sun8i: h3: enable DesignWare HDMI controller

The H3 SoC has a DesignWare HDMI controller with some Allwinner-specific glues. Add the related device nodes. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm/boot/dts/sun8i-h3.dtsi | 35 +++ 1 file changed, 35 insertions(+) diff --git a/arch/ar

[PATCH 00/13] Allwinner H3 DE2 basical support

ty now due to no TVE) The last 6 patches are only used for testing this patchset, and they're going to be sent by Jernej Skrabec after this patchset is applied. Icenowy Zheng (9): dt-bindings: update the binding for Allwinner H3 DE2 support drm: sun4i: add support for H3 mixers drm: sun4i: a

[PATCH 03/13] drm: sun4i: add support for H3's TCON

From: Icenowy Zheng <icen...@aosc.xyz> Allwinner H3 has two special TCONs without channel 0. Add support for this kind of TCON. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/gpu/drm/sun4i/sun4i_drv.c | 1 + drivers/gpu/drm/sun4i/sun4i

Re: [linux-sunxi] [PATCH 2/4] drivers: soc: sunxi: fix error processing on base address when claiming

于 2017年8月18日 GMT+08:00 下午2:21:07, Chen-Yu Tsai <w...@csie.org> 写到: >Hi, > >On Wed, Aug 9, 2017 at 4:56 PM, Icenowy Zheng <icen...@aosc.io> wrote: >> When claiming SRAM, if the base is set to an error, it means that the >> SRAM controller has been probed, b

[PATCH 2/2] ARM: sunxi: add support for R40 SoC

Allwinner R40 is a new SoC, with Quad Core Cortex-A7 and peripherals like A20. Add support for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Documentation/arm/sunxi/README | 6 ++ Documentation/devicetree/bindings/arm/sunxi.txt | 1 + arch/arm/mach-sunxi/s

[PATCH 1/2] dt-bindings: add compatible string for Allwinner V3s SoC

The compatible string for Allwinner V3s SoC used to be missing. Add it to the binding document. Fixes: b074fede01c0 ("arm: sunxi: add support for V3s SoC") Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Documentation/devicetree/bindings/arm/sunxi.txt | 1 + 1 file chan

Re: [PATCH 2/3] ARM: dts: sun8i: Add board dts file for Banana Pi M2 Ultra

于 2017年8月23日 GMT+08:00 上午4:10:43, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >Hi, > >On Tue, Aug 22, 2017 at 02:17:41PM +0800, Icenowy Zheng wrote: >> From: Chen-Yu Tsai <w...@csie.org> >> >> The Banana Pi M2 Ultra is an SBC based on th

Re: [PATCH 1/3] ARM: dts: sun8i: Add basic dtsi file for Allwinner R40

于 2017年8月23日 GMT+08:00 上午4:05:21, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >Hi, > >On Tue, Aug 22, 2017 at 02:17:40PM +0800, Icenowy Zheng wrote: >> From: Chen-Yu Tsai <w...@csie.org> >> >> The Allwinner R40 SoC is marketed as the successor

Re: [PATCH 3/3] ARM: dts: sun8i: Add board dts file for Banana Pi M2 Berry

于 2017年8月23日 GMT+08:00 上午4:12:15, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Tue, Aug 22, 2017 at 02:17:42PM +0800, Icenowy Zheng wrote: >> +_vcc5v0 { >> +gpio = < 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */ >> +enable-active-high; >> +

[PATCH v7 06/13] drm/sun4i: add a dedicated module for sun4i-backend and sun4i-layer

Currently the direct call from CRTC code to layer code has disappeared, instead the layer's init function is called via the backend's ops. Add a dedicated module for sun4i-backend and sun4i-layer, and drop the EXPORT_SYMBOL from backend code to layer code. Signed-off-by: Icenowy Zheng <i

[PATCH v7 10/13] drm/sun4i: tcon: add support for V3s TCON

Allwinner V3s SoC features a TCON without channel 1. Add support for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> Reviewed-by: Chen-Yu Tsai <w...@csie.org> --- Changes in v7: - Added Chen-Yu's Reviewed-by. drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++- drivers/gpu/drm/sun4i/sun4

[PATCH v7 03/13] dt-bindings: add bindings for DE2 on V3s SoC

Allwinner V3s SoC have a display engine which have a different pipeline with older SoCs. Add document for it (new compatibles and the new "mixer" part). Signed-off-by: Icenowy Zheng <icen...@aosc.io> Acked-by: Rob Herring <r...@kernel.org> --- Changes in v7: - Reduced so

[PATCH v7 02/13] clk: sunxi-ng: add support for DE2 CCU

The "Display Engine 2.0" in Allwinner newer SoCs contains a clock management unit for its subunits, like the DE CCU in A80. Add a sunxi-ng style driver for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v7: - Fixed some parent clocks that are left open if

[PATCH v7 13/13] [DO NOT MERGE] ARM: sun8i: v3s: enable LCD panel of Lichee Pi Zero

A 480x272 QiaoDian QD43003C0-40-7LED panel is available from Lichee Pi. This commit connects this panel to Lichee Pi Zero. Lichee Pi also provides a 800x480 panel without accurate model number, so do not merge this patch. It will finally come as device tree overlay. Signed-off-by: Icenowy Zheng

[PATCH v7 12/13] ARM: sun8i: v3s: add pinmux for LCD pins of V3s SoC

Allwinner V3s SoC features a set of pins that have functionality of RGB LCD, the pins are at different pin ban than other SoCs. Add pinctrl node for them. Signed-off-by: Icenowy Zheng <icen...@aosc.io> Acked-by: Chen-Yu Tsai <w...@csie.org> --- Changes in v7: - Dropped the

[PATCH v7 11/13] ARM: sun8i: v3s: add device nodes for DE2 display pipeline

Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer and only one TCON connected to this mixer, which have RGB LCD output. Add device nodes for this display pipeline. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v7: - Change DE2 clock compa

[PATCH v7 09/13] drm/sun4i: Add compatible string for V3s display engine

Allwinner V3s features the new "Display Engine 2.0", which can now also be driven with our subdrivers in sun4i-drm. Add the compatible string for in sun4i_drv.c, in order to make the display engine and its components probed. Signed-off-by: Icenowy Zheng <icen...@aosc.io> ---

[PATCH v7 08/13] drm/sun4i: add support for Allwinner DE2 mixers

ng -- more investigations are needed to gain enough information for them. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v7: - Small fixed advised by Maxime Ripard. - Added fixup on CRTC destination coordinate. Changes in v6: - Rebased on wens's multi-pipeline patchset. Changes

[PATCH v7 07/13] drm/sun4i: add a Kconfig option for sun4i-backend

As sun4i-backend is now a dedicated module, add an Kconfig option for it to make it optional, since some build may only use other engines. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v7: - Adjusted the position of BACKEND makefile item. (It's now after common codes

[PATCH v7 04/13] drm/sun4i: return only planes for layers created

in sun4i_crtc struct. Doing this uncouples the CRTC code from the type of layer (the sun4i_layers_init function name is still hardcoded and will be changed in the next patch), so that we can finally gain support for the mixer in DE2, which has different layers. Signed-off-by: Icenowy Zheng <icen...@aosc

[PATCH v7 05/13] drm/sun4i: abstract a engine type

nner, so I choose to call them both "engine" here. Abstract the engine type to a new struct with an ops struct, which contains functions that should be called outside the engine-specified code (in TCON, CRTC or TV Encoder code). Signed-off-by: Icenowy Zheng <icen...@aosc.io> Re

[PATCH v7 01/13] dt-bindings: add binding for the Allwinner DE2 CCU

Allwinner "Display Engine 2.0" contains some clock controls in it. In order to add them as clock drivers, we need a device tree binding. Add the binding here. Also add the device tree binding headers. Signed-off-by: Icenowy Zheng <icen...@aosc.io> Acked-by: Rob Herring

[PATCH v7 00/13] Initial Allwinner Display Engine 2.0 Support

://lists.freedesktop.org/archives/dri-devel/2016-December/126264.html Icenowy Zheng (13): dt-bindings: add binding for the Allwinner DE2 CCU clk: sunxi-ng: add support for DE2 CCU dt-bindings: add bindings for DE2 on V3s SoC drm/sun4i: return only planes for layers created drm/sun4i: abstract a engine

Re: [linux-sunxi] Re: [PATCH v7 05/13] drm/sun4i: abstract a engine type

于 2017年5月15日 GMT+08:00 下午5:20:01, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Mon, May 15, 2017 at 12:30:37AM +0800, Icenowy Zheng wrote: >> As we are going to add support for the Allwinner DE2 engine in >sun4i-drm >> driver, we will finally have two

Re: [linux-sunxi] Re: [PATCH] pinctrl: use non-devm kmalloc versions for free functions

于 2017年5月11日 GMT+08:00 下午10:01:54, Linus Walleij 写到: >On Thu, May 4, 2017 at 1:57 AM, Andre Przywara >wrote: > >> When a pinctrl driver gets interrupted during its probe process >> (returning -EPROBE_DEFER), the devres system cleans up all

[RFC PATCH 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2

for the swapped connection. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/gpu/drm/sun4i/sun4i_drv.c | 27 ++ drivers/gpu/drm/sun4i/sun4i_tcon.c | 39 +- drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++ 3 files changed, 59 inse

[RFC PATCH 05/11] drm: sun4i: add compatible for H3 display engine

Add a compatible string for H3 display engine in sun4i_drv code. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/gpu/drm/sun4i/sun4i_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index 29bf13

[RFC PATCH 04/11] drm: sun4i: add support for H3's TCON0/1

From: Icenowy Zheng <icen...@aosc.xyz> Allwinner H3 has two special TCONs, both come without channel0. And the TCON1 of H3 has no special clocks even for the channel1. Add support for these kinds of TCON. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/gpu/drm/sun4i/

[RFC PATCH 02/11] drm: sun4i: add support for H3 mixers

From: Icenowy Zheng <icen...@aosc.xyz> Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI channels, and the other has 1 VI and 1 UI. Add support for these two variants. Signed-off-by: Icenowy Zheng <icen...@aosc.xyz> --- drivers/gpu/drm/sun4i/sun8i_

[PATCH v8 0/9] Initial Allwinner Display Engine 2.0 Support

bridges' support is included in this patchset, which makes it currently not usable on H3. Thanks to Jean-Francois Moine and Jernej Skrabec for their efforts to discover the internal of DE2! [1] https://lists.freedesktop.org/archives/dri-devel/2016-December/126264.html Icenowy Zheng (9): drm/sun4i

[RFC PATCH 00/11] Support for H3 Composite Output support

shouldn't be defaultly enabled now. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/506806.html Icenowy Zheng (11): dt-bindings: update the binding for Allwinner H3 TVE support drm: sun4i: add support for H3 mixers drm: sun4i: ignore swapped mixer<->tcon connection for DE2

[RFC PATCH 01/11] dt-bindings: update the binding for Allwinner H3 TVE support

Allwinner H3 features a "DE2.0" and a TV Encoder. Add device tree bindings for the following parts: - H3 TCONs - H3 Mixers - The connection between H3 TCONs and H3 Mixers - H3 TV Encoder - H3 Display engine Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- .../bindings/dis

[RFC PATCH 11/11] [DO NOT MERGE] ARM: sun8i: h3: enable TV output on Orange Pi PC

Orange Pi PC features a 3.5mm jack with TV output in it. Enable the TV output. As it currently do not have jack detection feature, do not merge this patch. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 12 1 file chang

[RFC PATCH 06/11] drm: sun4i: add color space correction support for DE2 mixer

The DE2 mixer can do color space correction needed by TV Encoder with its DCSC sub-engine. Add support for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 35 +++ drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 +++

[RFC PATCH 07/11] drm: sun4i: add support for the TV encoder in H3 SoC

Allwinner H3 features a TV encoder similar to the one in earlier SoCs, but with some different points about clocks: - It has a mod clock and a bus clock. - The mod clock must be at a fixed rate to generate signal. Add support for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- d

[RFC PATCH 09/11] clk: sunxi-ng: export CLK_PLL_DE for H3

The CLK_PLL_DE is needed to be referenced in device tree for H3, for both forcing the parent of PLL_DE. So export it to the device tree binding header. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 3 +-- include/dt-bindings/clock/sun8i-h3

[RFC PATCH 10/11] ARM: sun8i: h3: add display engine pipeline for TVE

. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm/boot/dts/sun8i-h3.dtsi | 189 1 file changed, 189 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index b36f9f423c39..20172ef92415 100644 --- a/ar

[RFC PATCH 08/11] clk: sunxi-ng: allow CLK_DE to set CLK_PLL_DE for H3

_DE to set CLK_PLL_DE (add CLK_SET_RATE_PARENT to it). Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c in

Re: [PATCH v8 0/9] Initial Allwinner Display Engine 2.0 Support

于 2017年5月18日 GMT+08:00 上午1:37:39, Maxime Ripard <maxime.rip...@free-electrons.com> 写到: >On Wed, May 17, 2017 at 10:47:16PM +0800, Icenowy Zheng wrote: >> This patchset is the initial patchset for Allwinner DE2 support. >> >> As the DE2 CCU support is already applied,

[PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC

Add support for the newly imported compatible for the A64 R_INTC in irq-sunxi-nmi driver. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v5: - Fix A64 R_INTC compatible. drivers/irqchip/irq-sunxi-nmi.c | 13 + 1 file changed, 13 insertions(+) diff --git a/d

[PATCH v6 3/9] arm64: allwinner: a64: add NMI (R_INTC) controller on A64

Allwinner A64 SoC features a R_INTC controller, which controls the NMI line, and this interrupt line is usually connected to the AXP PMIC. Add support for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v4: - Changes it to use R_INTC binding and change node label to

[PATCH v6 4/9] arm64: allwinner: a64: add AXP803 node to Pine64 device tree

The Pine64 (including Pine64+) boards have an AXP803 as its main PMIC. Add its device node. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v6: - Rebase on next-20170517. arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 11 +++ 1 file changed, 11 insertions(+)

[PATCH v6 8/9] arm64: allwinner: a64: enable AXP803 regulators for Pine64

Add support of AXP803 regulators in the Pine64 device tree, in order to enable many future functionalities, e.g. Wi-Fi. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v6: - Rebased on next-20170517. .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 109 ++

[PATCH v6 9/9] arm64: allwinner: a64: enable Wi-Fi for Pine64

as GPIO (so it's with 2.0mm pitch, not 2.54mm as other GPIO headers). Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts

[PATCH v6 7/9] arm64: allwinner: a64: add DTSI file for AXP803 PMIC

As nearly all A64 boards are using AXP803 PMIC, add a DTSI file for it, like the old DTSI files for AXP20x/22x, for the common parts of the PMIC. Signed-off-by: Icenowy Zheng <icen...@aosc.io> Acked-by: Mark Brown <broo...@kernel.org> --- Changes in v5: - Added Mark Brown's ACK. C

[PATCH v6 5/9] regulator: axp20x-regulator: add support for AXP803

AXP803 PMIC also have a series of regulators (DCDCs and LDOs) controllable via I2C/RSB bus. Add support for them. Signed-off-by: Icenowy Zheng <icen...@aosc.io> Acked-by: Chen-Yu Tsai <w...@csie.org> --- Changes in v4: - Fixed somewhere which mention AXP806 before 803. Changes in

[PATCH v6 6/9] mfd: axp20x: add axp20x-regulator cell for AXP803

As axp20x-regulator now supports AXP803, add a cell for it. Signed-off-by: Icenowy Zheng <icen...@aosc.io> Acked-by: Chen-Yu Tsai <w...@csie.org> --- Changes in v5: - Removed wrong snippet. Changes in v4: - Added a trailing comma for new cell, for easier further cell addition. C

[PATCH v6 1/9] irqchip/sunxi-nmi: add A64 R_INTC to the binding doc

The A31 NMI driver seems to be using wrong base address. As we're going to convert to use a correct NMI base address (and correctly name it to R_INTC as the datasheet suggests), add a new compatible string for the "correct" R_INTC, which we will use for A64 SoC. Signed-off-by: Ice

[PATCH v6 0/9] AXP803 PMIC support for Pine64

in AXP20x regulatoe driver. (The binding is already applied) PATCH 6 enables the AXP803 regulator cell in MFD driver. PATCH 7 adds a DTSI file for AXP803, like other older AXP PMICs. PATCH 8 enables AXP803 regulators in Pine64 device tree. PATCH 9 enables Wi-Fi for Pine64. Icenowy Zheng (9

[PATCH] ARM: sun8i: v3s: fix build of Lichee Pi Zero Dock dtb

The Lichee Pi Zero Dock dtb file is not added to the Makefile, so that it won't be built; and the file contains a problem that prevents it from being correctly built. Fix these issues. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm/boot/dts/Makefile

[PATCH] ARM: sun8i: v3s: enable SPI

-by: Icenowy Zheng <icen...@aosc.io> --- arch/arm/boot/dts/sun8i-v3s.dtsi | 19 +++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 6ff50665e5e6..a49ebef53c91 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/ar

[PATCH v8 1/9] drm/sun4i: abstract a engine type

nner, so I choose to call them both "engine" here. Abstract the engine type to a new struct with an ops struct, which contains functions that should be called outside the engine-specified code (in TCON, CRTC or TV Encoder code). Signed-off-by: Icenowy Zheng <icen...@aosc.io> Re

[PATCH v8 4/9] drm/sun4i: add support for Allwinner DE2 mixers

ng -- more investigations are needed to gain enough information for them. Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- Changes in v8: - Set id manually to -1. Changes in v7: - Small fixed advised by Maxime Ripard. - Added fixup on CRTC destination coordinate. Changes in v6: - Rebased

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