ver qcom_cpufreq_kryo_driver = {
> static const struct of_device_id qcom_cpufreq_kryo_match_list[] __initconst
> = {
> { .compatible = "qcom,apq8096", },
> { .compatible = "qcom,msm8996", },
> + {}
> };
>
> /*
> --
> 2.7.0
>
>
Acked-by: Ilia Lin
Hi Niklas,
The frequency list in the DT is correct, but the initial frequency for
the CPUs 0,1 is configured by the XBL, while the CPUs 2,3 stay at XO
rate. Both rates are unlisted in the DT and that's OK.
BR,
Ilia Lin
On Tue, Jul 10, 2018 at 12:29 PM Niklas Cassel wrote:
>
> On
.
Signed-off-by: Ilia Lin
---
drivers/cpufreq/Kconfig.arm | 10 ++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 3 +
drivers/cpufreq/qcom-cpufreq-kryo.c | 206 +++
4 files changed, 220 insertions(+)
create mode
the OPP supported-hw parameter.
The series depends on the series from Viresh:
https://patchwork.kernel.org/patch/10418139/
The previous spin was here:
https://patchwork.kernel.org/patch/10423137/
Ilia Lin (2):
cpufreq: Add Kryo CPU scaling driver
dt-bindings: cpufreq: Document operating
M8996 SG, speedbin 1
6: MSM8996 SG, speedbin 2
7-31: unused
Signed-off-by: Ilia Lin
Reviewed-by: Rob Herring
Acked-by: Viresh Kumar
---
.../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +
1 file changed, 680 insertions(+)
versions.
The driver reads eFuse information and chooses the required OPP subset
by passing the OPP supported-hw parameter.
The series depends on the series from Viresh:
https://patchwork.kernel.org/patch/10418139/
The previous spin was here:
https://patchwork.kernel.org/patch/10424949/
Ilia Lin (2
.
Signed-off-by: Ilia Lin
---
MAINTAINERS | 7 ++
drivers/cpufreq/Kconfig.arm | 10 ++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 3 +
drivers/cpufreq/qcom-cpufreq-kryo.c | 206 +++
5
M8996 SG, speedbin 1
6: MSM8996 SG, speedbin 2
7-31: unused
Signed-off-by: Ilia Lin
Reviewed-by: Rob Herring
Acked-by: Viresh Kumar
---
.../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +
1 file changed, 680 insertions(+)
versions.
The driver reads eFuse information and chooses the required OPP subset
by passing the OPP supported-hw parameter.
The series depends on the series from Viresh:
https://patchwork.kernel.org/patch/10418139/
The previous spin was here:
https://patchwork.kernel.org/patch/10424949/
Ilia Lin (2
M8996 SG, speedbin 1
6: MSM8996 SG, speedbin 2
7-31: unused
Signed-off-by: Ilia Lin
Reviewed-by: Rob Herring
Acked-by: Viresh Kumar
---
.../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +
1 file changed, 680 insertions(+)
.
Signed-off-by: Ilia Lin
---
MAINTAINERS | 7 ++
drivers/cpufreq/Kconfig.arm | 10 ++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 3 +
drivers/cpufreq/qcom-cpufreq-kryo.c | 212 +++
5
different SOC versions.
The driver reads eFuse information and chooses the required OPP subset
by passing the OPP supported-hw parameter.
A previous post of RFC can be found here:
https://patchwork.kernel.org/patch/10377887/
Ilia Lin (11):
soc: qcom: Separate kryo l2 accessors from PMU driver
clk
: Ilia Lin
---
drivers/perf/Kconfig | 1 +
drivers/perf/qcom_l2_pmu.c | 90 ++--
drivers/soc/qcom/Kconfig | 3 ++
drivers/soc/qcom/Makefile| 1 +
drivers/soc/qcom/kryo-l2-accessors.c | 65
--> CPU clk
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
Conflicts:
drivers/clk/qcom/clk-cpu-8996.c
---
drivers/clk/qcom/clk-cpu-8996.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk
support this.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-cpu-8996.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index beb97eb..390b369 100644
--- a
D stands for Adaptive Clock Distribution and is used to
detect voltage droops. We do not add support for ACD as yet.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/clk-fixed-factor.c | 2 +-
drivers/clk/qcom/Kconfig | 9 +
drivers/clk/qcom/Makefile
Switching.
Signed-off-by: Ilia Lin
---
drivers/regulator/qcom_spmi-regulator.c | 133 +++-
1 file changed, 130 insertions(+), 3 deletions(-)
diff --git a/drivers/regulator/qcom_spmi-regulator.c
b/drivers/regulator/qcom_spmi-regulator.c
index 63c7a0c..9817f1a 100644
until a pre-programmed delay has expired.
This change configures ACD during the probe and switches
the PMUXes to the ACD clock source.
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-cpu-8996.c | 75 +++--
1 file changed, 65 insertions(+), 10 deletions
1. Add syscon node for the SAW CPU registers
2. Add SAW regulators gang definition for s8-s11
3. Add voltages to the OPP tables
4. Add the s11 SAW regulator as CPU regulator
Signed-off-by: Ilia Lin
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 75 +++
1 file
table when it is parsed by the OPP framework.
This change adds documentation.
Signed-off-by: Ilia Lin
---
.../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +
1 file changed, 680 insertions(+)
create mode 100644 Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
Signed-off-by: Ilia Lin
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 2 +-
arch/arm64/boot/dts/qcom/msm8996.dtsi | 310 +++-
2 files changed, 309 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts
b/arch/arm64/boot/dts
.
Signed-off-by: Ilia Lin
---
drivers/cpufreq/Kconfig.arm | 11 +++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 3 +
drivers/cpufreq/qcom-cpufreq-kryo.c | 148 +++
4 files changed, 163 insertions(+)
create mode
Switching.
Document it.
Signed-off-by: Ilia Lin
Reviewed-by: Rob Herring
---
.../bindings/regulator/qcom,spmi-regulator.txt | 45 ++
1 file changed, 45 insertions(+)
diff --git
a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt
b/Documentation
Signed-off-by: Ilia Lin
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 269 --
1 file changed, 260 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 37b7152c..e6cf290 100644
--- a/arch
ates on a single VCO range, between 600MHz
and 3GHz. However the CPUs do support OPPs with frequencies
between 300MHz and 600MHz. In order to support running the CPUs
at those frequencies we end up having to lock the PLL at twice
the rate and drive the CPU clk via the PLL/2 output and SMUX.
Signed-off
From: Rajendra Nayak
Allow clk_alpha_pll_configure to be called from loadable
kernel modules.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-alpha-pll.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk
From: Ilia Lin
In event of error returned by the nvmem_cell_read() non-pointer value
may be dereferenced. Fix this with error handling.
Additionally free the allocated speedbin buffer, as per the API.
Fixes: 9ce36edd1a52 (cpufreq: Add Kryo CPU scaling driver)
Signed-off-by: Ilia Lin
From: Ilia Lin
Add device remove and module exit code to make the driver
functioning as a loadable module.
Fixes: ac28927659be (cpufreq: kryo: allow building as a loadable module)
Signed-off-by: Ilia Lin
---
drivers/cpufreq/qcom-cpufreq-kryo.c | 22 +++---
1 file changed, 19
From: Ilia Lin
Change to the @kernel.org address
Signed-off-by: Ilia Lin
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 035973b23b8b..15a836eebe9a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11799,7 +11799,7 @@ F
Just like Viresh said, this is fixed in the v15.
On May 30, 2018 12:15:35 PM GMT+03:00, Viresh Kumar
wrote:
>On 30-05-18, 10:08, Rafael J. Wysocki wrote:
>> On Fri, May 25, 2018 at 2:07 PM, Ilia Lin
>wrote:
>> > [v14]
>> > * Addressed comment from Sudeep abo
From: Ilia Lin
In event of error returned by the nvmem_cell_read() non-pointer value
may be dereferenced. Fix this with error handling.
Signed-off-by: Ilia Lin
---
drivers/cpufreq/qcom-cpufreq-kryo.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/cpufreq/qcom-cpufreq-kryo.c
b
From: Ilia Lin
Add device remove and module exit code to make the driver
functioning as a loadable module.
Fixes: ac28927659be (cpufreq: kryo: allow building as a loadable module)
Signed-off-by: Ilia Lin
---
drivers/cpufreq/qcom-cpufreq-kryo.c | 23 ---
1 file changed, 20
From: Ilia Lin
Use devm_clk_hw_register instead of clk_hw_register
to simplify the usage of this API. This way drivers that call
the clk_hw_register_fixed_factor won't need to maintain
a data structure for further cleanup.
Signed-off-by: Ilia Lin
Tested-by: Amit Kucheria
---
drivers/cl
support this.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
Tested-by: Amit Kucheria
---
drivers/clk/qcom/clk-cpu-8996.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index
From: Ilia Lin
[v13]
* Rebased
[v12]
* Addressed the kbuild fail on arm architecture
[v11]
* Split the series into domains
[v9]
* Addressed comments from Viresh and Russel about the error handling
[v8]
* Reordered the patch series into 4 groups
* Addressed comments from Amit about the
From: Rajendra Nayak
Allow clk_alpha_pll_configure to be called from loadable
kernel modules.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
Tested-by: Amit Kucheria
---
drivers/clk/qcom/clk-alpha-pll.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/qcom/clk-alpha
From: Ilia Lin
The PMUX for each duplex allows for selection of ACD clock source.
The DVM (Dynamic Variation Monitor) will flag an error
when a voltage droop event is detected. This flagged error
enables ACD to provide a div-by-2 clock, sourced from the primary PLL.
The duplex will be provided
--> CPU clk
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
Tested-by: Amit Kucheria
---
drivers/clk/qcom/clk-cpu-8996.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu
From: Ilia Lin
Each of the CPU clusters (Power and Perf) on msm8996 are
clocked via 2 PLLs, a primary and alternate. There are also
2 Mux'es, a primary and secondary all connected together
as shown below
+---+
From: Ilia Lin
Each of the CPU clusters (Power and Perf) on msm8996 are
clocked via 2 PLLs, a primary and alternate. There are also
2 Mux'es, a primary and secondary all connected together
as shown below
+---+
From: Ilia Lin
The driver provides kernel level API for other drivers
to access the MSM8996 L2 cache registers.
Separating the L2 access code from the PMU driver and
making it public to allow other drivers use it.
The accesses must be separated with a single spinlock,
maintained in this driver
SAW regulator support to the SPMI regulator driver. The SAW regulators
will be controlled through special CPU registers instead of direct
SPMI accesses.
Ilia Lin (13):
soc: qcom: Separate kryo l2 accessors from PMU driver
clk: Use devm_ in the register fixed factor clock
clk: qcom: Add CPU
: Ilia Lin
---
drivers/perf/Kconfig | 1 +
drivers/perf/qcom_l2_pmu.c | 90 ++--
drivers/soc/qcom/Kconfig | 3 ++
drivers/soc/qcom/Makefile| 1 +
drivers/soc/qcom/kryo-l2-accessors.c | 56
From: Rajendra Nayak
Allow clk_alpha_pll_configure to be called from loadable
kernel modules.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-alpha-pll.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk
Use devm_clk_hw_register instead of clk_hw_register
to simplify the usage of this API. This way drivers that call
the clk_hw_register_fixed_factor won't need to maintain
a data structure for further cleanup.
Signed-off-by: Ilia Lin
---
drivers/clk/clk-fixed-factor.c | 2 +-
1 file chang
ates on a single VCO range, between 600MHz
and 3GHz. However the CPUs do support OPPs with frequencies
between 300MHz and 600MHz. In order to support running the CPUs
at those frequencies we end up having to lock the PLL at twice
the rate and drive the CPU clk via the PLL/2 output and SMUX.
Signed-off
support this.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-cpu-8996.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index d92cad93..620fdc2 100644
--- a
ned-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-cpu-8996.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index 620fdc2..ff5c0a5 100644
--- a/drivers/clk
until a pre-programmed delay has expired.
This change configures ACD during the probe and switches
the PMUXes to the ACD clock source.
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-cpu-8996.c | 75 +++--
1 file changed, 65 insertions(+), 10 deletions
Switching.
Signed-off-by: Ilia Lin
---
drivers/regulator/qcom_spmi-regulator.c | 133 +++-
1 file changed, 130 insertions(+), 3 deletions(-)
diff --git a/drivers/regulator/qcom_spmi-regulator.c
b/drivers/regulator/qcom_spmi-regulator.c
index 63c7a0c..9817f1a 100644
Document the DT bindings for the SAW regulators.
The saw-leader is the only property that is configurable in DT.
The saw-slave property allows ganging (grouping) of
several regulators so that their outputs can be combined.
Signed-off-by: Ilia Lin
Reviewed-by: Rob Herring
---
.../bindings
1. Add syscon node for the SAW CPU registers
2. Add SAW regulators gang definition for s8-s11
3. Add voltages to the OPP tables
4. Add the s11 SAW regulator as CPU regulator
Signed-off-by: Ilia Lin
Acked-by: Viresh Kumar
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 119
1. Add NVMEM node for the speedbin
2. Add definitions for all possible MSM8996 CPU OPPs.
The qcom-cpufreq-kryo driver will select the appropriate subset.
Signed-off-by: Ilia Lin
Acked-by: Viresh Kumar
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 2 +-
arch/arm64/boot/dts/qcom/msm8996
M8996 SG, speedbin 1
6: MSM8996 SG, speedbin 2
7-31: unused
Signed-off-by: Ilia Lin
Acked-by: Viresh Kumar
---
.../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +
1 file changed, 680 insertions(+)
create mode 100644 Documentation
.
Signed-off-by: Ilia Lin
Acked-by: Viresh Kumar
---
drivers/cpufreq/Kconfig.arm | 10 +++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 3 +
drivers/cpufreq/qcom-cpufreq-kryo.c | 166 +++
4 files changed, 180
Signed-off-by: Ilia Lin
Acked-by: Viresh Kumar
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 269 --
1 file changed, 260 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 37b7152c
D stands for Adaptive Clock Distribution and is used to
detect voltage droops.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/Kconfig | 9 +
drivers/clk/qcom/Makefile| 1 +
drivers/clk/qcom/clk-alpha-pll.h | 6 +
drivers/clk/qcom/clk-cpu-8996.c |
.
Signed-off-by: Ilia Lin
Acked-by: Viresh Kumar
---
drivers/cpufreq/Kconfig.arm | 10 +++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 3 +
drivers/cpufreq/qcom-cpufreq-kryo.c | 163 +++
4 files changed, 177
.
Signed-off-by: Ilia Lin
---
drivers/cpufreq/Kconfig.arm | 10 +++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 3 +
drivers/cpufreq/qcom-cpufreq-kryo.c | 163 +++
4 files changed, 177 insertions(+)
create mode
M8996 SG, speedbin 1
6: MSM8996 SG, speedbin 2
7-31: unused
Signed-off-by: Ilia Lin
Reviewed-by: Rob Herring
Acked-by: Viresh Kumar
---
.../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +
1 file changed, 680 insertions(+)
parameter.
The series depends on the series from Viresh:
https://patchwork.kernel.org/patch/10418139/
The previous spin was here:
https://patchwork.kernel.org/patch/10420751/
https://patchwork.kernel.org/patch/10414761/
Ilia Lin (2):
cpufreq: Add Kryo CPU scaling driver
dt-bindings: cpufreq: Document
.
Signed-off-by: Ilia Lin
---
drivers/cpufreq/Kconfig.arm | 10 +++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 3 +
drivers/cpufreq/qcom-cpufreq-kryo.c | 163 +++
4 files changed, 177 insertions(+)
create mode
.
Signed-off-by: Ilia Lin
---
drivers/cpufreq/Kconfig.arm | 10 ++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 3 +
drivers/cpufreq/qcom-cpufreq-kryo.c | 181 +++
4 files changed, 195 insertions(+)
create mode
M8996 SG, speedbin 1
6: MSM8996 SG, speedbin 2
7-31: unused
Signed-off-by: Ilia Lin
Reviewed-by: Rob Herring
Acked-by: Viresh Kumar
---
.../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +
1 file changed, 680 insertions(+)
here:
https://patchwork.kernel.org/patch/10420809/
Ilia Lin (2):
cpufreq: Add Kryo CPU scaling driver
dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu
.../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +
drivers/cpufreq/Kconfig.arm
):
Extracts the kryo l2 accessors driver from the QCOM PMU driver
Clocks (2/15-9/15):
This series adds support for the CPU clocks on msm8996 devices.
The driver uses the existing PLL drivers and is required to control
the CPU frequency scaling on the MSM8996.
Ilia Lin (6):
soc: qcom: Separate kryo l2
: Ilia Lin
---
drivers/perf/Kconfig | 1 +
drivers/perf/qcom_l2_pmu.c | 90 ++--
drivers/soc/qcom/Kconfig | 3 ++
drivers/soc/qcom/Makefile| 1 +
drivers/soc/qcom/kryo-l2-accessors.c | 56
From: Rajendra Nayak
Allow clk_alpha_pll_configure to be called from loadable
kernel modules.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-alpha-pll.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk
ates on a single VCO range, between 600MHz
and 3GHz. However the CPUs do support OPPs with frequencies
between 300MHz and 600MHz. In order to support running the CPUs
at those frequencies we end up having to lock the PLL at twice
the rate and drive the CPU clk via the PLL/2 output and SMUX.
Signed-off
D stands for Adaptive Clock Distribution and is used to
detect voltage droops.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/Kconfig | 9 +
drivers/clk/qcom/Makefile| 1 +
drivers/clk/qcom/clk-alpha-pll.h | 6 +
drivers/clk/qcom/clk-cpu-8996.c |
ned-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-cpu-8996.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index 620fdc2..ff5c0a5 100644
--- a/drivers/clk
until a pre-programmed delay has expired.
This change configures ACD during the probe and switches
the PMUXes to the ACD clock source.
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-cpu-8996.c | 75 +++--
1 file changed, 65 insertions(+), 10 deletions
support this.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-cpu-8996.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index d92cad93..620fdc2 100644
--- a
Use devm_clk_hw_register instead of clk_hw_register
to simplify the usage of this API. This way drivers that call
the clk_hw_register_fixed_factor won't need to maintain
a data structure for further cleanup.
Signed-off-by: Ilia Lin
---
drivers/clk/clk-fixed-factor.c | 2 +-
1 file chang
Signed-off-by: Ilia Lin
Acked-by: Viresh Kumar
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 269 --
1 file changed, 260 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 37b7152c
[v11]
* Split the series into domains
The series adds OPP tables, thermal and CPU definitions in order to support
the CPU frequency scaling on msm8996 CPUs.
Ilia Lin (2):
dt: qcom: Add opp and thermal to the msm8996
dt: qcom: Add qcom-cpufreq-kryo driver configuration
arch/arm64/boot/dts
1. Add NVMEM node for the speedbin
2. Add definitions for all possible MSM8996 CPU OPPs.
The qcom-cpufreq-kryo driver will select the appropriate subset.
Signed-off-by: Ilia Lin
Acked-by: Viresh Kumar
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 2 +-
arch/arm64/boot/dts/qcom/msm8996
: Ilia Lin
---
drivers/perf/Kconfig | 1 +
drivers/perf/qcom_l2_pmu.c | 90 ++--
drivers/soc/qcom/Kconfig | 3 ++
drivers/soc/qcom/Makefile| 1 +
drivers/soc/qcom/kryo-l2-accessors.c | 56
From: Rajendra Nayak
Allow clk_alpha_pll_configure to be called from loadable
kernel modules.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-alpha-pll.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk
until a pre-programmed delay has expired.
This change configures ACD during the probe and switches
the PMUXes to the ACD clock source.
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-cpu-8996.c | 75 +++--
1 file changed, 65 insertions(+), 10 deletions
support this.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-cpu-8996.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index d92cad93..620fdc2 100644
--- a
ned-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-cpu-8996.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index 620fdc2..ff5c0a5 100644
--- a/drivers/clk
Use devm_clk_hw_register instead of clk_hw_register
to simplify the usage of this API. This way drivers that call
the clk_hw_register_fixed_factor won't need to maintain
a data structure for further cleanup.
Signed-off-by: Ilia Lin
---
drivers/clk/clk-fixed-factor.c | 2 +-
1 file chang
the MSM8996.
Ilia Lin (6):
soc: qcom: Separate kryo l2 accessors from PMU driver
clk: Use devm_ in the register fixed factor clock
clk: qcom: Add CPU clock driver for msm8996
dt-bindings: clk: qcom: Add bindings for CPU clock for msm8996
clk: qcom: cpu-8996: Add support to switch below
ates on a single VCO range, between 600MHz
and 3GHz. However the CPUs do support OPPs with frequencies
between 300MHz and 600MHz. In order to support running the CPUs
at those frequencies we end up having to lock the PLL at twice
the rate and drive the CPU clk via the PLL/2 output and SMUX.
Signed-off
D stands for Adaptive Clock Distribution and is used to
detect voltage droops.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/Kconfig | 10 +
drivers/clk/qcom/Makefile| 1 +
drivers/clk/qcom/clk-alpha-pll.h | 6 +
drivers/clk/qcom/clk-cpu-8996.c |
Viresh:
https://patchwork.kernel.org/patch/10418139/
The previous spin was here:
https://patchwork.kernel.org/patch/10421143/
Ilia Lin (2):
cpufreq: Add Kryo CPU scaling driver
dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu
.../devicetree/bindings/opp/kryo-cpufreq.txt | 680
M8996 SG, speedbin 1
6: MSM8996 SG, speedbin 2
7-31: unused
Signed-off-by: Ilia Lin
Reviewed-by: Rob Herring
Acked-by: Viresh Kumar
---
.../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +
1 file changed, 680 insertions(+)
.
Signed-off-by: Ilia Lin
---
drivers/cpufreq/Kconfig.arm | 10 ++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 3 +
drivers/cpufreq/qcom-cpufreq-kryo.c | 194 +++
4 files changed, 208 insertions(+)
create mode
M8996 SG, speedbin 1
6: MSM8996 SG, speedbin 2
7-31: unused
Signed-off-by: Ilia Lin
Reviewed-by: Rob Herring
Reviewed-by: Amit Kucheria
Tested-by: Amit Kucheria
Acked-by: Viresh Kumar
---
.../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +
://patchwork.kernel.org/patch/10427315/
Ilia Lin (2):
cpufreq: Add Kryo CPU scaling driver
dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu
.../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +
MAINTAINERS| 7 +
drivers/cpufreq
.
Signed-off-by: Ilia Lin
Acked-by: Viresh Kumar
Reviewed-by: Amit Kucheria
Tested-by: Amit Kucheria
---
MAINTAINERS | 7 ++
drivers/cpufreq/Kconfig.arm | 11 ++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 3 +
drivers
Viresh got ahead of my answer a bit. :)
Sure I'll post the module exit later.
On June 6, 2018 7:09:29 AM GMT+03:00, Viresh Kumar
wrote:
>On 05-06-18, 13:44, Arnd Bergmann wrote:
>> Building the kryo cpufreq driver while QCOM_SMEM is a loadable module
>> results in a link error:
>>
>> drivers/cp
From: Rajendra Nayak
Allow clk_alpha_pll_configure to be called from loadable
kernel modules.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-alpha-pll.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk
/10398455/
Ilia Lin (11):
soc: qcom: Separate kryo l2 accessors from PMU driver
clk: qcom: Add CPU clock driver for msm8996
clk: qcom: Add DT bindings for CPU clock driver for msm8996
clk: qcom: Add ACD path to CPU clock driver for msm8996
dt: qcom: Add opp and thermal to the msm8996
--> CPU clk
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
Conflicts:
drivers/clk/qcom/clk-cpu-8996.c
---
drivers/clk/qcom/clk-cpu-8996.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk
support this.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-cpu-8996.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
index beb97eb..390b369 100644
--- a
D stands for Adaptive Clock Distribution and is used to
detect voltage droops. We do not add support for ACD as yet.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/clk-fixed-factor.c | 2 +-
drivers/clk/qcom/Kconfig | 9 +
drivers/clk/qcom/Makefile
Switching.
Signed-off-by: Ilia Lin
---
drivers/regulator/qcom_spmi-regulator.c | 133 +++-
1 file changed, 130 insertions(+), 3 deletions(-)
diff --git a/drivers/regulator/qcom_spmi-regulator.c
b/drivers/regulator/qcom_spmi-regulator.c
index 63c7a0c..9817f1a 100644
.
Signed-off-by: Ilia Lin
---
drivers/cpufreq/Kconfig.arm | 11 +++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/cpufreq-dt-platdev.c | 3 +
drivers/cpufreq/qcom-cpufreq-kryo.c | 150 +++
4 files changed, 165 insertions(+)
create mode
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