Hi Mike,
On Fri, 23 Aug 2013 14:29:50 -0700
Mike Turquette mturque...@linaro.org wrote:
Quoting Jisheng Zhang (2013-08-22 19:34:01)
Add missing iounmap to setup error path.
Change-Id: I4371569d14d7026aa9f90d7cd53f669d365fe26a
Please remove Change-Id's from the commit message
, 2013 at 08:46:51PM +0800, Jisheng Zhang wrote:
Add missing iounmap to prove error path and remove path
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
How
- use gates_out instead of bail_out as suggested by Mike Turquette
Jisheng Zhang (3):
arm: mvebu: add missing of_node_put() to fix reference leak
bus: mvebu: add missing of_node_put() to fix reference leak
pinctrl: mvebu: Convert to use devm_ioremap_resource
arch/arm/mach-mvebu/armada-370
Add of_node_put to properly decrement the refcount when we are
done using a given node.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Reviewed-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
arch/arm/mach-mvebu/armada-370-xp.c | 1 +
arch/arm/mach-mvebu/coherency.c | 8
The resource mapped by of_iomap() isn't unmapped in error path. This
patch fixes the resource leakage by using devm_ioremap_resource() instead
of of_iomap().
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Reviewed-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
drivers/pinctrl/mvebu
Add of_node_put to properly decrement the refcount when we are
done using a given node.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Reviewed-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
drivers/bus/mvebu-mbus.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff
Hi Ezequiel,
On Sat, 24 Aug 2013 08:06:25 -0700
Ezequiel Garcia ezequiel.gar...@free-electrons.com wrote:
Hi Jisheng,
On Fri, Aug 23, 2013 at 10:34:02AM +0800, Jisheng Zhang wrote:
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 11
Dear Thomas,
On Mon, 26 Aug 2013 03:02:00 -0700
Thomas Petazzoni thomas.petazz...@free-electrons.com wrote:
Dear Jisheng Zhang,
On Mon, 26 Aug 2013 17:56:19 +0800, Jisheng Zhang wrote:
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c
b/arch/arm/mach-mvebu/armada-370-xp.c index 97cbb80
Add of_node_put to properly decrement the refcount when we are
done using a given node.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Reviewed-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
arch/arm/mach-mvebu/coherency.c | 8 +++-
arch/arm/mach-mvebu/platsmp.c
Add of_node_put to properly decrement the refcount when we are
done using a given node.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Reviewed-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
drivers/bus/mvebu-mbus.c | 27 ---
1 file changed, 20 insertions
log as suggested by Ezequiel Garcia
v2:
- use devm_ioremap_resource() as suggested by Ezequiel Garcia
- use gates_out instead of bail_out as suggested by Mike Turquette
Jisheng Zhang (3):
arm: mvebu: add missing of_node_put() to fix reference leak
bus: mvebu: add missing of_node_put() to fix
The resource mapped by of_iomap() isn't unmapped in error path. This
patch fix the resource leakage by using devm_ioremap_resource() instead
of of_iomap().
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Reviewed-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
drivers/pinctrl/mvebu
Use devm_ioremap_resource instead of of_iomap() and devm_kzalloc()
instead of kmalloc() to make cleanup paths simpler. This patch also
fixes the resource leak caused by missing corresponding iounamp()
of the of_iomap().
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/net/phy/mdio
Dear Jason,
On Mon, 26 Aug 2013 13:45:23 -0700
Jason Cooper ja...@lakedaemon.net wrote:
On Mon, Aug 26, 2013 at 07:36:55PM +0800, Jisheng Zhang wrote:
These patches try to fix resource leak by adding missing of_node_put(),
iounmap or using devm_ioremap_resource() if available.
v4
Dear Jason,
On Mon, 26 Aug 2013 20:22:37 -0700
Jason Cooper ja...@lakedaemon.net wrote:
On Tue, Aug 27, 2013 at 11:01:20AM +0800, Jisheng Zhang wrote:
Dear Jason,
On Mon, 26 Aug 2013 13:45:23 -0700
Jason Cooper ja...@lakedaemon.net wrote:
On Mon, Aug 26, 2013 at 07:36:55PM +0800
Add of_node_put to properly decrement the refcount when we are
done using a given node.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Reviewed-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
drivers/bus/mvebu-mbus.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff
it's already taken by Mike
- Add more commit log as suggested by Ezequiel Garcia
v2:
- use devm_ioremap_resource() as suggested by Ezequiel Garcia
- use gates_out instead of bail_out as suggested by Mike Turquette
Jisheng Zhang (3):
arm: mvebu: add missing of_node_put() to fix reference
The resource mapped by of_iomap() isn't unmapped in error path. This
patch fix the resource leakage by using devm_ioremap_resource() instead
of of_iomap().
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Reviewed-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
Acked-by: Jason Cooper ja
Add of_node_put to properly decrement the refcount when we are
done using a given node.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Reviewed-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
arch/arm/mach-mvebu/armada-370-xp.c | 1 +
arch/arm/mach-mvebu/coherency.c | 8
These patches add missing of_node_put() to fix reference leak or
iounmap in setup/probe error path.
Jisheng Zhang (4):
arm: mvebu: add missing of_node_put() to fix reference leak
bus: mvebu: add missing of_node_put() to fix reference leak
clk: mvebu: add missing iounmap
pinctrl: mvebu
Add of_node_put to properly decrement the refcount when we are
done using a given node.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
arch/arm/mach-mvebu/armada-370-xp.c | 1 +
arch/arm/mach-mvebu/coherency.c | 8 +++-
arch/arm/mach-mvebu/platsmp.c | 1 +
arch
Add missing iounmap to prove error path and remove path
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c
b/drivers
Add missing iounmap to setup error path.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/clk/mvebu/clk-cpu.c | 4 +++-
drivers/clk/mvebu/common.c | 18 --
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/mvebu/clk-cpu.c b/drivers/clk
Add of_node_put to properly decrement the refcount when we are
done using a given node.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/bus/mvebu-mbus.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c
index
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c
b/drivers/pinctrl/mvebu/pinctrl-mvebu.c
index bb7ddb1..1caa45f 100644
--- a/drivers
These patches try to fix resource leak by adding missing of_node_put(),
iounmap or using devm_ioremap_resource() if available.
v2:
- use devm_ioremap_resource() as suggested by Ezequiel Garcia
- use gates_out instead of bail_out as suggested by Mike Turquette
Jisheng Zhang (4):
arm: mvebu
Add of_node_put to properly decrement the refcount when we are
done using a given node.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
arch/arm/mach-mvebu/armada-370-xp.c | 1 +
arch/arm/mach-mvebu/coherency.c | 8 +++-
arch/arm/mach-mvebu/platsmp.c | 1 +
arch
Add of_node_put to properly decrement the refcount when we are
done using a given node.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/bus/mvebu-mbus.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c
index
Add missing iounmap to setup error path.
Change-Id: I4371569d14d7026aa9f90d7cd53f669d365fe26a
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/clk/mvebu/clk-cpu.c | 4 +++-
drivers/clk/mvebu/common.c | 18 --
2 files changed, 15 insertions(+), 7 deletions(-)
diff
We need to set mxs_phy rather as the platform drvdata so that we can get
the correct mxs_phy in mxs_phy_remove().
Change-Id: I6e1753cc978e2ed3fbb3d1865be0c54031d337d2
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/usb/phy/phy-mxs-usb.c | 2 +-
1 file changed, 1 insertion(+), 1
On Wed, 6 Nov 2013 18:34:47 -0800
Shawn Guo shawn@linaro.org wrote:
On Thu, Nov 07, 2013 at 10:26:20AM +0800, Jisheng Zhang wrote:
We need to set mxs_phy rather as the platform drvdata so that we can get
the correct mxs_phy in mxs_phy_remove().
Change-Id
We need to set mxs_phy rather as the platform drvdata so that we can get
the correct mxs_phy in mxs_phy_remove().
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/usb/phy/phy-mxs-usb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/phy/phy-mxs-usb.c b
Make use of common scu_a9_get_base() and delete the comment since the
interface is self commented.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
arch/arm/mach-imx/platsmp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach
Add of_node_put to properly decrement the refcount when we are
done using a given node.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Reviewed-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
arch/arm/mach-mvebu/armada-370-xp.c | 1 +
arch/arm/mach-mvebu/coherency.c | 8
Commit e9d6b3358ac35901ccc6a4a5a317670fa469db25 adds common APIs to
get scu base address from CP15. This patch series connverts some platforms
to use that interface.
Jisheng Zhang (4):
arm: highbank: make use of common scu_a9_get_base() interface
arm: imx: make use of common scu_a9_get_base
Make use of common scu_a9_get_base() and delete the comment since the
interface is self commented.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
arch/arm/mach-highbank/highbank.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-highbank/highbank.c
b
Make use of common scu_a9_get_base() and delete the comment since the
interface is self commented.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
arch/arm/mach-socfpga/socfpga.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch
Make use of common scu_a9_get_base() and delete the comment since the
interface is self commented.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
arch/arm/mach-prima2/platsmp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm
The resource mapped by of_iomap() isn't unmapped in error path. This
patch fix the resource leakage by using devm_ioremap_resource() instead
of of_iomap().
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Reviewed-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
Acked-by: Jason Cooper ja
Add of_node_put to properly decrement the refcount when we are
done using a given node.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Reviewed-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
drivers/bus/mvebu-mbus.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff
On Wed, 6 Nov 2013 19:08:33 -0800
Jisheng Zhang jszh...@marvell.com wrote:
Commit e9d6b3358ac35901ccc6a4a5a317670fa469db25 adds common APIs to
get scu base address from CP15. This patch series connverts some platforms
to use that interface.
OOPS, sorry, I made an mistake when generating
Make use of common scu_a9_get_base() and delete the comment since the
interface is self commented.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
arch/arm/mach-imx/platsmp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach
Commit e9d6b3358ac35901ccc6a4a5a317670fa469db25 adds common APIs to
get scu base address from CP15. This patch series connverts some platforms
to use that interface.
Jisheng Zhang (4):
arm: highbank: make use of common scu_a9_get_base() interface
arm: imx: make use of common scu_a9_get_base
Make use of common scu_a9_get_base() and delete the comment since the
interface is self commented.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
arch/arm/mach-socfpga/socfpga.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch
Make use of common scu_a9_get_base() and delete the comment since the
interface is self commented.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
arch/arm/mach-highbank/highbank.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-highbank/highbank.c
b
Make use of common scu_a9_get_base() and delete the comment since the
interface is self commented.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
arch/arm/mach-prima2/platsmp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm
PL310 supports Prefetch offset/control register from r2p0 and Power
control register from r3p0. This patch adds the support to configure
these two registers if there are. The dt binding document is also updated.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
Documentation/devicetree
(Requested by Jisheng Zhang)
- remove LOCAL_TIMERS dependency (Suggested by Dinh Nguyen)
RFCv2-v1:
- remove custom .init_time, adds dependency for arch-wide of_clk_init call
RFCv1-RFCv2:
- nuke .map_io (Reported by Arnd Bergmann)
- add copyright reference
- switch to mach-berlin instead
On Tue, 5 Nov 2013 06:28:42 -0800
Sebastian Hesselbarth sebastian.hesselba...@gmail.com wrote:
This adds very basic device tree files for the Marvell Armada
1500-mini SoC (Berlin BG2CD) and the Google Chromecast. Currently,
SoC only has nodes for cpu, some clocks, l2 cache controller, local
Dear Sebastian,
I have some permission to comment this patch now ;)
On Tue, 5 Nov 2013 06:28:38 -0800
Sebastian Hesselbarth sebastian.hesselba...@gmail.com wrote:
This adds known facts and rumors about the Marvell Berlin (88DE3xxx) SoC
family to the Marvell SoC documentation.
On Wed, 6 Nov 2013 21:40:33 -0800
Jisheng Zhang jszh...@marvell.com wrote:
...
+ select ARM_GIC
ARM_GIC is common on berlin SoCs. we can put it below ARCH_BERLIN?
+ select CACHE_L2X0
ditto
Sorry. After some consideration, CACHE_L2X0 is not common (BG3). So please
ignore
this line
This symbol is used only in this file. The patch fix the following
sparse warning:
warning: symbol 'of_cpu_clk_setup' was not declared. Should it be static?
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/clk/mvebu/clk-cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
:13: warning:
symbol 'armada_xp_smp_prepare_cpus' was not declared. Should it be static?
arch/arm/mach-mvebu/hotplug.c:24:12: warning:
symbol 'armada_xp_cpu_die' was not declared. Should it be static?
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
arch/arm/mach-mvebu/coherency.c | 1
This patch fixes the following sparse warning:
drivers/pci/host/pci-mvebu.c:676:17: warning: symbol
'mvebu_pcie_align_resource' was not declared. Should it be static?
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/pci/host/pci-mvebu.c | 10 +-
1 file changed, 5 insertions
Dear Sebastian,
On Thu, 7 Nov 2013 13:22:35 -0800
Sebastian Hesselbarth sebastian.hesselba...@gmail.com wrote:
On 11/07/2013 05:20 PM, Arnd Bergmann wrote:
On Thursday 07 November 2013, Sebastian Hesselbarth wrote:
Actually, IIRC smp_twd does not compile without SMP set, so the above
Hi Mark,
On Wed, 27 Nov 2013 09:42:04 -0800
Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Nov 07, 2013 at 05:07:52AM +, Jisheng Zhang wrote:
PL310 supports Prefetch offset/control register from r2p0 and Power
control register from r3p0. This patch adds the support to configure
Hi Sebastian,
On Mon, 14 Oct 2013 16:13:21 -0700
Sebastian Hesselbarth sebastian.hesselba...@gmail.com wrote:
On 10/08/2013 02:24 PM, Sebastian Hesselbarth wrote:
This adds very basic device tree files for the Marvell Armada 1500 SoC
(88DE3100) and the Sony NSZ-GS7 GoogleTV board.
Hi Sebastian,
On Mon, 14 Oct 2013 16:09:07 -0700
Sebastian Hesselbarth sebastian.hesselba...@gmail.com wrote:
On 10/08/2013 02:24 PM, Sebastian Hesselbarth wrote:
This adds known facts and rumors about the Marvell Berlin (88DE3xxx) SoC
family to the Marvell SoC documentation.
Hi,
On Thu, 13 Mar 2014 03:43:03 -0700
Alexandre Belloni alexandre.bell...@free-electrons.com wrote:
On 13/03/2014 at 10:05:31 +, Sebastian Hesselbarth wrote :
On 03/12/2014 11:06 AM, Antoine Ténart wrote:
+ compatible = arm,cortex-a9-twd-timer;
+ reg
Hi Antoine,
On Mon, 17 Mar 2014 08:06:26 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin
family). The SoC has nodes for cpu, l2 cache controller, interrupt
controllers, local timer, apb timers and uarts for
Hi Antoine,
On Wed, 12 Mar 2014 04:06:04 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm/boot/dts/berlin2q-dmp.dts | 32
Hi Andrew,
On Wed, 12 Mar 2014 05:37:59 -0700
Andrew Lunn and...@lunn.ch wrote:
+/dts-v1/;
+#include berlin2q.dtsi
+
+/ {
+ model = Marvell BG2-Q DMP;
+ compatible = marvell,berlin2q-dmp, marvell,berlin2q,
marvell,berlin; +
+ memory {
+ device_type = memory;
Hi all,
The writel/readl is too expensive especially on Cortex A9 w/ outer L2 cache.
This
introduce i2c read/write error on Marvell Berlin SoCs when there are L2 cache
maintenance operations at the same time.
In our internal berlin bsp, we just replaced readl/writel with the relaxed
version.
Dear Arnd,
On Fri, 14 Feb 2014 01:09:44 -0800
Arnd Bergmann a...@arndb.de wrote:
On Friday 14 February 2014 15:54:38 Jisheng Zhang wrote:
Hi all,
The writel/readl is too expensive especially on Cortex A9 w/ outer L2
cache. This introduce i2c read/write error on Marvell Berlin SoCs when
for both of these two patches,
Acked-by: Jisheng Zhang jszh...@marvell.com
Thanks,
Jisheng
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Please read
Dear Sebastian,
On Tue, 8 Oct 2013 05:24:33 -0700
Sebastian Hesselbarth sebastian.hesselba...@gmail.com wrote:
This adds initial support for the Marvell Berlin (88DE3xxx) SoC family
and basic machine setup for Armada 1500 (88DE3100) SoCs.
First of all, thanks for these patches. I worked and
On Tue, 8 Oct 2013 05:24:26 -0700
Sebastian Hesselbarth sebastian.hesselba...@gmail.com wrote:
This adds an irqchip driver and corresponding devicetree binding for the
secondary interrupt controllers based on Synopsys DesignWare IP dw_apb_ictl.
Signed-off-by: Sebastian Hesselbarth
Dear Sebastian and Antoine,
On Fri, 6 Jun 2014 03:54:06 -0700
Sebastian Hesselbarth sebastian.hesselba...@gmail.com wrote:
+
+#define to_berlin_phy_priv(p) container_of((p), struct
berlin_phy_priv, phy) +
+struct berlin_phy_priv {
+ void __iomem*base;
+ struct
For all BG2Q SoCs, 2 cycles is the best/correct value
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
arch/arm/boot/dts/berlin2q.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 635a16a..3f95dc5 100644
Hi Russell,
On Thu, 12 Jun 2014 02:44:23 -0700
Russell King - ARM Linux li...@arm.linux.org.uk wrote:
On Thu, Jun 12, 2014 at 05:38:40PM +0800, Jisheng Zhang wrote:
For all BG2Q SoCs, 2 cycles is the best/correct value
It would be a good idea to set all these parameters if you need to set
Hi Russell,
On Thu, 12 Jun 2014 03:15:03 -0700
Jisheng Zhang jszh...@marvell.com wrote:
Hi Russell,
On Thu, 12 Jun 2014 02:44:23 -0700
Russell King - ARM Linux li...@arm.linux.org.uk wrote:
On Thu, Jun 12, 2014 at 05:38:40PM +0800, Jisheng Zhang wrote:
For all BG2Q SoCs, 2 cycles
Hi Andrew, Antoine,
On Mon, 2 Jun 2014 03:27:50 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
On Mon, Jun 02, 2014 at 12:03:32PM +0200, Andrew Lunn wrote:
On Mon, Jun 02, 2014 at 12:00:48PM +0200, Antoine Ténart wrote:
Hi Andrew,
On Mon, Jun 02, 2014 at 11:47:15AM
Hi Antoine,
On Mon, 2 Jun 2014 02:21:02 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Adds SMP support for Berlin SoCs. Secondary CPUs are reseted, then
execute the instruction we put in the reset exception register, setting
the pc at the address contained in the software
On Tue, 3 Jun 2014 00:10:17 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Hi Jisheng,
On Tue, Jun 03, 2014 at 02:31:13PM +0800, Jisheng Zhang wrote:
On Mon, 2 Jun 2014 02:21:02 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
+
+extern void
Hi Andrew,
On Tue, 3 Jun 2014 00:50:11 -0700
Andrew Lunn and...@lunn.ch wrote:
We don't support independently power off cpu on BG2 and BG2Q in linux
kernel. So we can assume that bootloader has powered on the CPUs
Can i assume from your answer that the hardware does actually support
Hi Antoine,
On Tue, 22 Apr 2014 08:38:20 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
+ /* CT timing fix */
+ ahci_berlin_reg_set(ctrl_reg + PORT_VSR_ADDR, BIT(6) |
BIT(1));
+ ahci_berlin_reg_set(ctrl_reg + PORT_VSR_ADDR,
+
Hi Antoine,
On Tue, 22 Apr 2014 08:38:25 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
The BG2CD has an AHCI SATA controller. Add the corresponding node
in its device tree.
BG2CD doesn't has AHCI controller.
Thanks
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Hi Antoine
On Tue, 22 Apr 2014 08:38:24 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
The BG2 has an AHCI SATA controller. Add the corresponding node
in its device tree.
The AHCI IP of BG2 is different with BG2Q, so the driver in the series of patch
doesn't work on BG2.
Hi Antoine,
On Tue, 15 Apr 2014 01:07:24 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
The BG2Q has GPIOs driven by the dwapb GPIO driver. Add the LIBGPIO as a
dependency to be able to support them.
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
Hi Sebastian,
On Tue, 15 Apr 2014 02:23:03 -0700
Sebastian Hesselbarth sebastian.hesselba...@gmail.com wrote:
On 04/15/2014 10:07 AM, Antoine Ténart wrote:
The Marvell Berlin BG2Q has 6 GPIO ports compatible with the
snps,dw-apb-gpio driver. This patch add the corresponding device tree
On Wed, 16 Apr 2014 00:46:33 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
This series add the support for the GPIOs of the Berlin BG2Q. We use the
newly integrated dwapb GPIO driver here.
This applies on top of Alexandre's BG2Q symbol introduction[1] and the dwapb
gpio
Hi Antoine,
On Wed, 16 Apr 2014 05:40:10 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Add the SDHCI nodes for the Marvell Berlin BG2Q, using the berlin-sdhci
driver.
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
arch/arm/boot/dts/berlin2q.dtsi | 40
Hi,
On Thu, 17 Apr 2014 06:33:59 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Sebastian,
On Wed, Apr 16, 2014 at 04:26:06PM +0200, Sebastian Hesselbarth wrote:
On 04/16/2014 02:40 PM, Antoine Ténart wrote:
Add a Driver to support the SDHCI controller of the Marvell
On Thu, 10 Apr 2014 06:07:53 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
.../bindings/pinctrl/marvell,berlin-pinctrl.txt| 43
++ 1 file changed, 43 insertions(+)
create mode 100644
Hi Antoine,
On Thu, 10 Apr 2014 06:07:51 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
...
+static int berlin_pinmux_enable(struct pinctrl_dev *pctrl_dev,
+ unsigned function,
+ unsigned group)
+{
+ struct
Hi Antoine,
On Fri, 11 Apr 2014 01:12:59 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Hi Jisheng,
On Fri, Apr 11, 2014 at 02:33:18PM +0800, Jisheng Zhang wrote:
On Thu, 10 Apr 2014 06:07:53 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
+Required
Hi Antoine,
On Fri, 11 Apr 2014 01:18:39 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Hi Jisheng,
On Fri, Apr 11, 2014 at 02:44:31PM +0800, Jisheng Zhang wrote:
On Thu, 10 Apr 2014 06:07:51 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
...
+static
Hi,
On Thu, 3 Apr 2014 01:08:15 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
Documentation/devicetree/bindings/arm/cpus.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git
Hi Antoine,
On Thu, 3 Apr 2014 01:54:07 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Jisheng,
On 03/04/2014 10:22, Jisheng Zhang wrote:
Hi,
On Thu, 3 Apr 2014 01:08:15 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Signed-off-by: Antoine Ténart
We should call tegra_msi_free() to free the msi bit if
irq_create_mapping() fails. And we need to dispose the irq mapping
during irq teardown.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/pci/host/pci-tegra.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff
We should call tegra_msi_free() to free the MSI bit if
irq_create_mapping() fails. And we need to dispose the IRQ mapping
during IRQ teardown.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/pci/host/pci-tegra.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff
Hi Thierry,
On Mon, 28 Jul 2014 08:35:50 -0700
Thierry Reding thierry.red...@gmail.com wrote:
On Mon, Jul 28, 2014 at 11:45:42AM +0800, Jisheng Zhang wrote:
We should call tegra_msi_free() to free the msi bit if
irq_create_mapping() fails. And we need to dispose the irq mapping
during irq
Hi Catalin and Will,
I noticed that the following commit implement reboot via. PSCI SYSTEM_RESET
function. So my question is how to handle the reboot arguments?
static void psci_sys_reset(enum reboot_mode reboot_mode, const char *cmd)
{
invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0,
Hi Sudeep,
On Fri, 1 Aug 2014 03:21:12 -0700
Sudeep Holla sudeep.ho...@arm.com wrote:
On 01/08/14 11:06, Jisheng Zhang wrote:
Hi Catalin and Will,
I noticed that the following commit implement reboot via. PSCI
SYSTEM_RESET function. So my question is how to handle the reboot
-by: Jisheng Zhang jszh...@marvell.com
---
drivers/i2c/muxes/i2c-mux-pca954x.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c
b/drivers/i2c/muxes/i2c-mux-pca954x.c
index 9bd4212..c8c3d58 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers
-by: Jisheng Zhang jszh...@marvell.com
---
drivers/i2c/muxes/i2c-mux-pca954x.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c
b/drivers/i2c/muxes/i2c-mux-pca954x.c
index 9bd4212..ec11b40 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b
Hi Jean,
On Fri, 25 Jul 2014 00:15:19 -0700
Jean Delvare jdelv...@suse.de wrote:
Hi Jisheng Zhang,
On Fri, 25 Jul 2014 10:15:59 +0800, Jisheng Zhang wrote:
pca954x may be power lost during suspend, so after resume we also suffer
the issue fixed by commit
We should call tegra_msi_free() to free the msi bit if
irq_create_mapping() fails. And we need to dispose the irq mapping
during irq teardown.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/pci/host/pci-tegra.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
Hi list,
I observed one weird NET_RX softirq behavior:
1. CONFIG_RPS=y in kernel config file.
2. only one netdev in the system: eth0. eth0 only has one interrupt which is
all handled by CPU0. eth0 doesn't support RFS_ACCEL
cat /proc/interrupts shows
~ # cat /proc/interrupts
CPU0
Hi Dmitry,
On Thu, 7 Aug 2014 07:18:13 -0700
Dmitry Popov ixaph...@qrator.net wrote:
On Thu, 7 Aug 2014 17:10:50 +0800
Jisheng Zhang jszh...@marvell.com wrote:
2. only one netdev in the system: eth0.
There should also be lo (loopback) at least.
Yep, I forget that ;)
4. But NET_RX
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