From: Ludovic Barre
This patch adds support of external interrupt (exti)
for stm32h743.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32h743.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index
From: Ludovic Barre
Move irq_set_wake on interrupt mask, needed to wake up from
low power mode as the event mask is not able to do so.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers
From: Ludovic Barre
This series adds:
-Management of multi-bank of external interrupts
stm32h7 has up to 96 inputs (3 banks of 32 inputs).
-Fix initial value after cold/hot boot (wakeup issue).
Changes v2:
-Remove irq_mask and adds const on struct stm32_exti_bank
-Add wrapper functions pending
From: Ludovic Barre
-Prepare to manage multi-bank of external interrupts
(N banks of 32 inputs).
-Prepare to manage registers offsets by compatible
(registers offsets could be different follow per stm32 platform).
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 151
From: Ludovic Barre
-After cold boot, imr default value depends on hardware configuration.
-After hot reboot the registers must be cleared to avoid residue.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers
From: Ludovic Barre
This patch adds support of external interrupt (exti) on
all gpio ports of stm32h743.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743
From: Ludovic Barre
This patch adds system config support for stm32h743.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32h743.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index 6b2fb4c..b17aa5c 100644
From: Ludovic Barre
This patch updates stm32-exti documentation with stm32h7-exti
compatible string.
Signed-off-by: Ludovic Barre
---
.../devicetree/bindings/interrupt-controller/st,stm32-exti.txt| 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
a/Documentation
From: Ludovic Barre
stm32h7 has up to 96 inputs
(3 banks of 32 inputs max).
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 42
1 file changed, 42 insertions(+)
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq
From: Ludovic Barre
This patch adds GENERIC_IRQ_CHIP to stm32 exti
config.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 9d8a1dd..c067aae 100644
--- a/drivers/irqchip/Kconfig
From: Ludovic Barre
This series adds:
-Fix: to avoid compilation warning with older compiler
versions such as gcc-4.6.
This topic has been discussed on 2 threads with Geert and Arnd
https://lkml.org/lkml/2017/9/15/70
https://www.spinics.net/lists/arm-kernel/msg606269.html
-Fix: abort prefetching
From: Ludovic Barre
-Change the license text with long template.
-Change Copyright to STMicroelectronics.
Signed-off-by: Ludovic Barre
---
drivers/mtd/spi-nor/stm32-quadspi.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/stm32
.
Fixes: 0d43d7ab277a048c ("mtd: spi-nor: add driver for STM32 quad spi flash
controller")
Signed-off-by: Geert Uytterhoeven
Acked-by: Ludovic Barre
Signed-off-by: Ludovic Barre
---
drivers/mtd/spi-nor/stm32-quadspi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/d
From: Ludovic Barre
When memory-mapped mode is used, a prefetching mechanism fully
managed by the hardware allows to optimize the read from external
the QSPI memory. A 32-bytes FIFO is used for prefetching.
When the limit of flash size - fifo size is reached the prefetching
mechanism tries to
From: Ludovic Barre
When memory-mapped mode is used, a prefetching mechanism fully
managed by the hardware allows to optimize the read from external
the QSPI memory. A 32-bytes FIFO is used for prefetching.
When the limit of flash size - fifo size is reached the prefetching
mechanism tries to
From: Ludovic Barre
This series adds:
-Fix: to avoid compilation warning with older compiler
versions such as gcc-4.6.
This topic has been discussed on 2 threads with Geert and Arnd
https://lkml.org/lkml/2017/9/15/70
https://www.spinics.net/lists/arm-kernel/msg606269.html
-Fix: abort prefetching
From: Ludovic Barre
-Change the license text with long template.
-Change Copyright to STMicroelectronics.
Signed-off-by: Ludovic Barre
---
drivers/mtd/spi-nor/stm32-quadspi.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/stm32
.
Fixes: 0d43d7ab277a048c ("mtd: spi-nor: add driver for STM32 quad spi flash
controller")
Signed-off-by: Geert Uytterhoeven
Acked-by: Ludovic Barre
Signed-off-by: Ludovic Barre
---
drivers/mtd/spi-nor/stm32-quadspi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/d
From: Ludovic Barre
This patch updates stm32-exti documentation with stm32h7-exti
compatible string.
Signed-off-by: Ludovic Barre
Acked-by: Rob Herring
---
.../devicetree/bindings/interrupt-controller/st,stm32-exti.txt| 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
From: Ludovic Barre
-Prepare to manage multi-bank of external interrupts
(N banks of 32 inputs).
-Prepare to manage registers offsets by compatible
(registers offsets could be different follow per stm32 platform).
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 149
From: Ludovic Barre
This patch adds system config support for stm32h743.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32h743.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index 6b2fb4c..b17aa5c 100644
From: Ludovic Barre
This patch adds support of external interrupt (exti) on
all gpio ports of stm32h743.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743
From: Ludovic Barre
This patch adds GENERIC_IRQ_CHIP to stm32 exti
config.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 9d8a1dd..c067aae 100644
--- a/drivers/irqchip/Kconfig
From: Ludovic Barre
stm32h7 has up to 96 inputs
(3 banks of 32 inputs max).
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 42
1 file changed, 42 insertions(+)
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq
From: Ludovic Barre
-After cold boot, imr default value depends on hardware configuration.
-After hot reboot the registers must be cleared to avoid residue.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers
From: Ludovic Barre
This patch adds support of external interrupt (exti)
for stm32h743.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32h743.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index
From: Ludovic Barre
Move irq_set_wake on interrupt mask, needed to wake up from
low power mode as the event mask is not able to do so.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers
From: Ludovic Barre
This series adds:
-Management of multi-bank of external interrupts
stm32h7 has up to 96 inputs (3 banks of 32 inputs).
-Fix initial value after cold/hot boot (wakeup issue).
Changes v3:
-remove chip.name and handler, already done by
irq_alloc_domain_generic_chips
-add Rob
Hi Julien
thank for your review
On 10/26/2017 04:36 PM, Julien Thierry wrote:
Hi Ludovic,
On 25/10/17 18:10, Ludovic Barre wrote:
From: Ludovic Barre
-Prepare to manage multi-bank of external interrupts
(N banks of 32 inputs).
-Prepare to manage registers offsets by compatible
(registers
thanks Cyrille
indeed, the "Signed-off" on Geert'commit was a mistake
BR
Ludo
On 10/29/2017 06:50 PM, Cyrille Pitchen wrote:
Hi Ludovic,
Le 26/10/2017 à 17:12, Ludovic Barre a écrit :
From: Geert Uytterhoeven
With gcc 4.1.2:
drivers/mtd/spi-nor/stm32-quadspi
On 06/20/2018 03:29 PM, Guenter Roeck wrote:
On 06/20/2018 06:24 AM, Ludovic BARRE wrote:
On 06/20/2018 11:19 AM, Guenter Roeck wrote:
On 06/20/2018 12:53 AM, Ludovic Barre wrote:
From: Ludovic Barre
This patch adds config data to manage specific properties by
compatible. Adds stm32mp1
From: Ludovic Barre
This patch adds independent watchdog support for stm32mp157c.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32mp157c.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index
From: Ludovic Barre
This patch adds config data to manage specific properties by
compatible. Adds stm32mp1 config which requires pclk clock.
Signed-off-by: Ludovic Barre
---
.../devicetree/bindings/watchdog/st,stm32-iwdg.txt | 21 +++-
drivers/watchdog/stm32_iwdg.c | 116
From: Ludovic Barre
This patch activates independent watchdog support for
stm32mp157c board.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c
From: Ludovic Barre
This patch series updates stm32_iwdg driver to manage config
by compatible. stm32mp1 config requires a pclk clock.
v3:
-remove stm32_iwdg_config structure, just assign the
boolean directly to .dat
Ludovic Barre (3):
watchdog: stm32: add pclk feature for stm32mp1
ARM
On 06/20/2018 09:14 PM, Rob Herring wrote:
On Wed, Jun 20, 2018 at 03:51:36PM +0200, Ludovic Barre wrote:
From: Ludovic Barre
This patch adds config data to manage specific properties by
compatible. Adds stm32mp1 config which requires pclk clock.
Signed-off-by: Ludovic Barre
From: Ludovic Barre
This patch adds independent watchdog support for stm32mp157c.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32mp157c.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index
From: Ludovic Barre
This patch adds compatible data to manage pclk clock by
compatible. Adds stm32mp1 support which requires pclk clock.
Signed-off-by: Ludovic Barre
---
drivers/watchdog/stm32_iwdg.c | 116 +++---
1 file changed, 74 insertions(+), 42
From: Ludovic Barre
This patch series updates stm32_iwdg driver to manage pclk
clock by compatible. stm32mp1 requires a pclk clock.
v4:
-dt-bindings: split and review
v3:
-remove stm32_iwdg_config structure, just assign the
boolean directly to .dat
Ludovic Barre (4):
dt-bindings: watchdog
From: Ludovic Barre
This patch activates independent watchdog support for
stm32mp157c board.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c
From: Ludovic Barre
This patch adds support of stm32mp1.
stm32mp1 requires 2 clocks lsi and pclk.
Signed-off-by: Ludovic Barre
---
.../devicetree/bindings/watchdog/st,stm32-iwdg.txt | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/Documentation
On 06/21/2018 06:53 PM, Guenter Roeck wrote:
On Thu, Jun 21, 2018 at 11:02:15AM +0200, Ludovic Barre wrote:
From: Ludovic Barre
This patch adds compatible data to manage pclk clock by
compatible. Adds stm32mp1 support which requires pclk clock.
Signed-off-by: Ludovic Barre
---
drivers
From: Ludovic Barre
This patch adds support of stm32mp1.
stm32mp1 requires 2 clocks lsi and pclk.
Signed-off-by: Ludovic Barre
---
.../devicetree/bindings/watchdog/st,stm32-iwdg.txt | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/Documentation
From: Ludovic Barre
This patch series updates stm32_iwdg driver to manage pclk
clock by compatible. stm32mp1 requires a pclk clock.
v5:
-update stm32f429.dtsi
v4:
-dt-bindings: split and review
v3:
-remove stm32_iwdg_config structure, just assign the
boolean directly to .dat
Ludovic Barre
From: Ludovic Barre
This patch adds compatible data to manage pclk clock by
compatible. Adds stm32mp1 support which requires pclk clock.
Signed-off-by: Ludovic Barre
Acked-by: Alexandre TORGUE
---
drivers/watchdog/stm32_iwdg.c | 116 +++---
1 file changed
From: Ludovic Barre
This patch updates iwdg watchdog to use lsi clock name.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32f429.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index ede77e0..39ea13a 100644
From: Ludovic Barre
This patch activates independent watchdog support for
stm32mp157c board.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c
From: Ludovic Barre
This patch adds independent watchdog support for stm32mp157c.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32mp157c.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index
after
itself.
Fixes: f9fc1745501e ("irqchip/stm32: Add host and driver data structures")
Signed-off-by: Dan Carpenter
Reviewed-by: Ludovic Barre
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
index 3df527fcf4e1..0a2088e12d96 100644
--- a/drivers/i
On 07/31/2018 07:42 AM, Stephen Rothwell wrote:
Hi all,
Today's linux-next merge of the pinctrl tree got a conflict in:
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
between commit:
791d3ef2e111 ("dt-bindings: remove 'interrupt-parent' from bindings")
from the devic
From: Ludovic Barre
This patch adds dma_release callback at mmci_host_ops
to allow to call specific variant.
Signed-off-by: Ludovic Barre
---
drivers/mmc/host/mmci.c | 13 -
drivers/mmc/host/mmci.h | 2 ++
drivers/mmc/host/mmci_qcom_dml.c | 1 +
3 files changed
From: Ludovic Barre
This patch introduces dma_priv pointer to define specific
needs for each dma engine. This patch is needed to prepare
sdmmc variant with internal dma which not use dmaengine API.
Signed-off-by: Ludovic Barre
---
drivers/mmc/host/mmci.c | 165
From: Ludovic Barre
This patch adds dma_finalize callback at mmci_host_ops
to allow to call specific variant.
Signed-off-by: Ludovic Barre
---
drivers/mmc/host/mmci.c | 14 --
drivers/mmc/host/mmci.h | 2 ++
drivers/mmc/host/mmci_qcom_dml.c | 1 +
3 files
From: Ludovic Barre
This patch adds prepare/unprepare callbacks to mmci_host_ops.
Like this mmci_pre/post_request can be generic, mmci_prepare_data
and mmci_unprepare_data provide common next_cookie management.
Signed-off-by: Ludovic Barre
---
drivers/mmc/host/mmci.c | 118
From: Ludovic Barre
This patch creates a generic mmci_dma_setup which calls
dma_setup callback and manages common next_cookie.
This patch is needed for sdmmc variant which has a different
dma settings.
Signed-off-by: Ludovic Barre
---
drivers/mmc/host/mmci.c | 25
From: Ludovic Barre
This patch internalizes the dma_inprogress into mmci dma interfaces.
This allows to simplify and prepare the next dma callbacks
for mmci host ops. __dma_inprogress is called in mmci_dma_data_error
and mmci_dma_finalize.
Signed-off-by: Ludovic Barre
---
drivers/mmc/host
From: Ludovic Barre
This patch merges the prepare data functions.
This allows to define a single access to prepare data service.
This prepares integration for mmci host ops.
Signed-off-by: Ludovic Barre
---
drivers/mmc/host/mmci.c | 22 +-
1 file changed, 9 insertions
From: Ludovic Barre
This patch internalizes the management of dma map/unmap into
mmci dma interfaces. This allows to simplify and prepare the next dma
callbacks for mmci host ops.
mmci_dma_unmap was called in mmci_data_irq & mmci_cmd_irq functions
and can be integrated in mmci_dma_data_e
From: Ludovic Barre
This patch adds dma_error callback at mmci_host_ops
to allow to call specific variant.
Signed-off-by: Ludovic Barre
---
drivers/mmc/host/mmci.c | 20 +++-
drivers/mmc/host/mmci.h | 2 ++
drivers/mmc/host/mmci_qcom_dml.c | 1 +
3 files
From: Ludovic Barre
This patch adds dma_start callback to mmci_host_ops.
Create a generic mmci_dma_start function which regroup
common action between variant.
Signed-off-by: Ludovic Barre
---
drivers/mmc/host/mmci.c | 63 +++-
drivers/mmc/host
From: Ludovic Barre
This patch adds validate_data callback at mmci_host_ops
to check specific constraints of variant.
Signed-off-by: Ludovic Barre
---
drivers/mmc/host/mmci.c | 39 +--
drivers/mmc/host/mmci.h | 1 +
2 files changed, 22 insertions(+), 18
From: Ludovic Barre
This patch adds get_next_data callback to mmci_host_ops.
Generic mmci_get_next_data factorizes next_cookie check and
the host ops call.
Signed-off-by: Ludovic Barre
---
drivers/mmc/host/mmci.c | 16 ++--
drivers/mmc/host/mmci.h | 2
From: Ludovic Barre
This patch fixes qcom dma issue during mmci init.
Like init callback of qcom variant is not set, the qcom dma
is not correctly initialized and fail while dma transfer
("buggy DMA detected. Taking evasive action").
Signed-off-by: Ludovic Barre
---
drivers/mmc/h
From: Ludovic Barre
This patch series prepares and adds callbacks for dma transfert at
mmci_host_ops. This series is composed of 3 parts:
-Internalize specific needs of legacy dmaengine.
-Create and setup dma_priv pointer
-Create generic callbacks which share some features
(like cookie...) and
From: Ludovic Barre
This patch moves next cookie to mmci host structure to
share same cookie management between all variants.
Signed-off-by: Ludovic Barre
---
drivers/mmc/host/mmci.c | 10 --
drivers/mmc/host/mmci.h | 2 ++
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git
On 08/01/2018 12:08 PM, Ulf Hansson wrote:
Anyway, we can just drop this patch from your series as I amended the
patch causing the problem.
I will continue to review the rest.
yes, I sent to early. (sorry)
BR
Ludo
On 07/05/2018 05:26 PM, Ulf Hansson wrote:
On 12 June 2018 at 15:14, Ludovic Barre wrote:
From: Ludovic Barre
This patch integrates qcom dml feature into mmci_dma file.
Qualcomm Data Mover lite/local is already a variant of mmci dmaengine.
Signed-off-by: Ludovic Barre
---
drivers/mmc
On 07/11/2018 02:16 PM, Ulf Hansson wrote:
On 11 July 2018 at 11:41, Ludovic BARRE wrote:
On 07/05/2018 05:17 PM, Ulf Hansson wrote:
On 12 June 2018 at 15:14, Ludovic Barre wrote:
From: Ludovic Barre
Prepare mmci driver to manage dma interface by new property.
This patch defines
On 07/13/2018 01:17 PM, Ulf Hansson wrote:
On 11 July 2018 at 17:19, Ludovic BARRE wrote:
On 07/05/2018 05:26 PM, Ulf Hansson wrote:
On 12 June 2018 at 15:14, Ludovic Barre wrote:
From: Ludovic Barre
This patch integrates qcom dml feature into mmci_dma file.
Qualcomm Data Mover
From: Ludovic Barre
This patch adds initial support of STM32MP157 microprocessor (MPU)
based on Arm Cortex-A7. New Cortex-A infrastructure (gic, timer,...)
are selected if ARCH_MULTI_V7 is defined.
Signed-off-by: Ludovic Barre
---
Documentation/arm/stm32/stm32mp157-overview.rst | 19
From: Ludovic Barre
This patch rewrites stm32 documentation to rst
(ReStructuredText) format.
Signed-off-by: Ludovic Barre
---
Documentation/arm/stm32/overview.rst | 31 +++
Documentation/arm/stm32/overview.txt | 33
From: Ludovic Barre
Add stm32mp157c initial support with:
-Dual Cortex-A7
-Arm psci, timer, gic
-Pinctrl
-Uart
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 172 ++
arch/arm/boot/dts/stm32mp157c.dtsi| 194
From: Ludovic Barre
This patch adds STM32MP157 SoC bindings.
Signed-off-by: Ludovic Barre
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/arm/stm32.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/stm32.txt
b/Documentation
From: Ludovic Barre
This patch prepares the STM32 machine for the integration of Cortex-A
based microprocessor (MPU), on top of the existing Cortex-M
microcontroller family (MCU). Since both MCUs and MPUs are sharing
common hardware blocks we can keep using ARCH_STM32 flag for most of
them. If a
From: Ludovic Barre
Add support of stm32mp157c evaluation board (part number: STM32MP157C-EV1)
split in 2 elements:
-Daughter board (part number: STM32MP157C-ED1)
which includes CPU, memory and power supply
-Mother board (part number: STM32MP157C-EM1)
which includes external peripherals (like
From: Ludovic Barre
This patch adds stm32 support to multi_v7_defconfig
Signed-off-by: Ludovic Barre
---
arch/arm/configs/multi_v7_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 11e648a..a0163e7
From: Ludovic Barre
This patch series extends the existing STM32 microcontrollers (MCUs)
family to microprocessors (MPUs). The MPU platform (based on
Arm Cortex-A) is a continuation of the MCU one (based on Arm
Cortex-M) in that it shares a wide number of hardware blocks.
change v4:
-Add all
On 01/16/2018 03:25 PM, Arnd Bergmann wrote:
On Tue, Jan 16, 2018 at 3:12 PM, Ludovic Barre wrote:
+
+ aliases {
+ serial3 = &uart4;
+ };
Why 'serial3' ? If you have multiple UARTS on this board, just list
all of them, otherwise
start
From: Ludovic Barre
This patch adds STM32MP157 SoC bindings.
Signed-off-by: Ludovic Barre
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/arm/stm32.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/stm32.txt
b/Documentation
From: Ludovic Barre
Add stm32mp157c initial support with:
-Dual Cortex-A7
-Arm psci, timer, gic
-Pinctrl
-Uart
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 172 ++
arch/arm/boot/dts/stm32mp157c.dtsi| 194
From: Ludovic Barre
This patch adds initial support of STM32MP157 microprocessor (MPU)
based on Arm Cortex-A7. New Cortex-A infrastructure (gic, timer,...)
are selected if ARCH_MULTI_V7 is defined.
Signed-off-by: Ludovic Barre
---
Documentation/arm/stm32/stm32mp157-overview.rst | 19
From: Ludovic Barre
This patch adds stm32 support to multi_v7_defconfig
Signed-off-by: Ludovic Barre
---
arch/arm/configs/multi_v7_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 11e648a..a0163e7
From: Ludovic Barre
This patch rewrites stm32 documentation to rst
(ReStructuredText) format.
Signed-off-by: Ludovic Barre
---
Documentation/arm/stm32/overview.rst | 31 +++
Documentation/arm/stm32/overview.txt | 33
From: Ludovic Barre
This patch series extends the existing STM32 microcontrollers (MCUs)
family to microprocessors (MPUs). The MPU platform (based on
Arm Cortex-A) is a continuation of the MCU one (based on Arm
Cortex-M) in that it shares a wide number of hardware blocks.
change v5:
-fix
From: Ludovic Barre
Add support of stm32mp157c evaluation board (part number: STM32MP157C-EV1)
split in 2 elements:
-Daughter board (part number: STM32MP157C-ED1)
which includes CPU, memory and power supply
-Mother board (part number: STM32MP157C-EM1)
which includes external peripherals (like
From: Ludovic Barre
This patch prepares the STM32 machine for the integration of Cortex-A
based microprocessor (MPU), on top of the existing Cortex-M
microcontroller family (MCU). Since both MCUs and MPUs are sharing
common hardware blocks we can keep using ARCH_STM32 flag for most of
them. If a
hi Ulf
due to some ST internal works, I will busy the next days.
But I will sent the change as soon as possible.
On 11/21/18 6:56 PM, Ulf Hansson wrote:
On 7 November 2018 at 10:30, Ludovic Barre wrote:
From: Ludovic Barre
The mmc framework follows the requirement of SD_Specification:
the
On 12/5/18 3:23 PM, Ulf Hansson wrote:
On Tue, 20 Nov 2018 at 10:42, Ulf Hansson wrote:
On 7 November 2018 at 10:30, Ludovic Barre wrote:
From: Ludovic Barre
Refer to "4.15 set block count command" of sd specification:
Host needs to issue CMD12 if any error is detected in
the
On 12/5/18 3:23 PM, Ulf Hansson wrote:
On Tue, 20 Nov 2018 at 10:42, Ulf Hansson wrote:
On 7 November 2018 at 10:30, Ludovic Barre wrote:
From: Ludovic Barre
Refer to "4.15 set block count command" of sd specification:
Host needs to issue CMD12 if any error is detected in
the
From: Ludovic Barre
This patch series adds variant property to:
-Set cmdstop bit on STOP_TRANSMISSION command.
-On command or data error, send a stop command.
to clear DPSM if it's yet activated.
change v3:
-Move the cmdstop bit in separate patch.
-Use Ulf re-wording for patch 2/2.
From: Ludovic Barre
On cmd12 (STOP_TRANSMISSION), STM32 sdmmc variant needs to set
cmdstop bit in command register. The CPSM ("Command Path State Machine")
treats the command as a Stop Transmission command and signals
abort to the DPSM ("Data Path State Machine").
Signed-o
From: Ludovic Barre
The current approach with sending a CMD12 (STOP_TRANSMISSION) to
complete a data transfer request, either because of using the open
ended transmission type or because of receiving an error during a data
transfer, isn't sufficient for the STM32 sdmmc variant.
More prec
hi Ulf
I know that you very busy on other task,
but did you have time to look my serie.
do you have first feedback ?
BR
Ludo
On 06/12/2018 03:14 PM, Ludovic Barre wrote:
From: Ludovic Barre
This patch series adapts mmci driver to add support for stm32
sdmmc variant. stm32h7 SoC integrates
hi Ulf
thanks for review, comments below
On 07/04/2018 03:37 PM, Ulf Hansson wrote:
On 12 June 2018 at 15:14, Ludovic Barre wrote:
From: Ludovic Barre
The mmc framework follows the requirement of SD_Specification:
the STOP_TRANSMISSION is sent on multiple write/read commands
and the stop
On 07/05/2018 05:17 PM, Ulf Hansson wrote:
On 12 June 2018 at 15:14, Ludovic Barre wrote:
From: Ludovic Barre
Prepare mmci driver to manage dma interface by new property.
This patch defines and regroups dma operations for mmci drivers.
mmci_dma_XX prototypes are added to call member of
On 07/05/2018 03:48 PM, Ulf Hansson wrote:
On 12 June 2018 at 15:14, Ludovic Barre wrote:
From: Ludovic Barre
A specific variant could have different power or clock procedures.
This patch allows to overwrite the default mmci_set_clkreg and
mmci_set_pwrreg for a specific variant.
Signed
On 05/04/2018 10:38 PM, Rob Herring wrote:
On Thu, May 3, 2018 at 4:55 AM, Ludovic BARRE wrote:
On 05/02/2018 07:45 PM, Rob Herring wrote:
On Wed, May 2, 2018 at 11:03 AM, Ludovic BARRE
wrote:
Hi Rob
On 05/01/2018 04:56 PM, Rob Herring wrote:
On Thu, Apr 26, 2018 at 06:18:30PM
From: Ludovic Barre
This patch adds independent watchdog support for stm32mp157c.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32mp157c.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index
From: Ludovic Barre
This patch adds config data to manage specific properties by
compatible. Adds stm32mp1 config which requires pclk clock.
Signed-off-by: Ludovic Barre
---
.../devicetree/bindings/watchdog/st,stm32-iwdg.txt | 21 +++-
drivers/watchdog/stm32_iwdg.c | 132
From: Ludovic Barre
This patch series updates stm32_iwdg driver to manage config
by compatible. stm32mp1 config requires a pclk clock.
Ludovic Barre (3):
watchdog: stm32: add pclk feature for stm32mp1
ARM: dts: stm32: add iwdg2 support for stm32mp157c
ARM: dts: stm32: add iwdg2 support
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