Add compatible string for Allwinner suniv timer which is similar to
sun4i timer.
Signed-off-by: Mesih Kilinc
Acked-by: Maxime Ripard
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
The suniv ARMv5 F1C100s chip has similar sram controller to sun4i A10.
Add compatible string for it.
Signed-off-by: Mesih Kilinc
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/sram/sunxi-sram.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree
Lichee Pi Nano is a F1C100s board by Lichee Pi.
Add initial device tree for it.
Signed-off-by: Icenowy Zheng
Signed-off-by: Mesih Kilinc
---
arch/arm/boot/dts/Makefile| 2 ++
arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts | 26 +++
2 files
Add compatible string for Allwinner suniv F1C100s SoC's pinctrl.
Signed-off-by: Mesih Kilinc
Acked-by: Maxime Ripard
Patch applied to the pin control tree for v4.21.
---
Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 +
1 file changed, 1 insertion(+)
diff --g
Add compatible string for Allwinner suniv timer which is similar to
sun4i timer.
Signed-off-by: Mesih Kilinc
Acked-by: Maxime Ripard
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
series add spi support and enables spi flash at Lichee-pi Nano
in patch 4 ~ 7. This patches are based on Icenowy's work.
Thanks!
Mesih Kilinc (7):
dt-bindings: timer: Add Allwinner suniv timer
clocksource: sun4i: add a compatible for suniv
ARM: dts: suniv: Add dt-binding headers for F1
it has no architecture timer.
Register sun4i_timer as sched_clock on it.
Signed-off-by: Mesih Kilinc
Acked-by: Maxime Ripard
Acked-by: Daniel Lezcano
---
drivers/clocksource/timer-sun4i.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/timer-sun4i.c
Allwinner suniv F1C100s has similar SPI controllers as sun8i H3.
Add compatible string for it.
Signed-off-by: Mesih Kilinc
---
Documentation/devicetree/bindings/spi/spi-sun6i.txt | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/spi
PC0~PC4 is pin group for SPI0. PA0~PA4 is pin group for SPI1.
Add device tree nodes for this groups.
Signed-off-by: Mesih Kilinc
---
arch/arm/boot/dts/suniv-f1c100s.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi
b/arch/arm/boot/dts
dt-binding headers for F1C100s merged now. So add them back to dtsi.
Signed-off-by: Mesih Kilinc
---
arch/arm/boot/dts/suniv-f1c100s.dtsi | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi
b/arch/arm/boot/dts/suniv
The Lichee Pi Nano board has a Winbond W25Q128FVSIQ 128Mbit SPI NOR flash
connected to the SPI0 controller of F1C100s SoC, via the pinmux group at
PC bank; so it's bootable.
Enable this SPI flash.
Signed-off-by: Mesih Kilinc
---
arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
Allwinner suniv F1C100s has similar SPI controller as sun8i H3.
F1C100s has no dedicated mod clock, instead it uses AHB bus clock.
Add support for both SPI0 and SPI1.
Signed-off-by: Mesih Kilinc
---
arch/arm/boot/dts/suniv-f1c100s.dtsi | 26 ++
1 file changed, 26
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