David,
On 09/19/2012 01:55 PM, Nicolas Ferre :
> This is an enhancement work that began several years ago. I try to catchup
> with
> some performance improvement that has been implemented then by Havard.
> The ring index logic and the TX error path modification are the biggest
>
On 10/27/2012 07:53 PM, Jean-Christophe PLAGNIOL-VILLARD :
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
Acked-by: Nicolas Ferre
> ---
> MAINTAINERS |6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/MAINTAINERS
/macb: clean up ring buffer logic
net/macb: Offset first RX buffer by two bytes
Jean-Christophe PLAGNIOL-VILLARD (1):
net/macb: add pinctrl consumer support
Nicolas Ferre (4):
net/macb: remove macb_get_drvinfo()
net/macb: tx status is more than 8 bits now
net/macb: ethtool interface: add
From: Patrice Vilchez
Add Gigabit Ethernet mode to GEM cadence IP and enable RGMII connection.
Signed-off-by: Patrice Vilchez
Signed-off-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb.c | 15 ---
drivers/net/ethernet/cadence/macb.h | 4
2 files changed, 16
From: Havard Skinnemoen
Remove a couple of unneeded barriers and document the remaining ones.
Signed-off-by: Havard Skinnemoen
[nicolas.fe...@atmel.com: split patch in topics]
Signed-off-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb.c | 18 ++
1 file changed, 14
This function has little meaning so remove it altogether and
let ethtool core fill in the fields automatically.
Signed-off-by: Nicolas Ferre
Reviewed-by: Ben Hutchings
---
drivers/net/ethernet/cadence/macb.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/drivers/net/ethernet
status]
Signed-off-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb.c | 22 --
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index e7f554d..b161d73 100644
--- a/drivers/net
On some revision of GEM, TSR status register has more information.
Signed-off-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index 4db52f3
smaller, and hopefully faster as well. Also,
doing the ring buffer management this way will simplify things a lot when
making the ring sizes configurable in the future.
Signed-off-by: Havard Skinnemoen
[nicolas.fe...@atmel.com: split patch in topics, adapt to newer kernel]
Signed-off-by: Nicolas
Add macb_get_regs() ethtool function and its helper function:
macb_get_regs_len().
The version field is deduced from the IP revision which gives the
"MACB or GEM" information. An additional version field is reserved.
Signed-off-by: Nicolas Ferre
Reviewed-by: Ben Hutchings
---
d
napi for RX for now.
With this sequence, we do not need a special check during the xmit
method as the packets will be caught by TX disable during workqueue
execution.
Signed-off-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb.c | 166
drivers/net
NET_IP_ALIGN.
Signed-off-by: Havard Skinnemoen
[nicolas.fe...@atmel.com: adapt to newer kernel]
Signed-off-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb.c | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b
From: Jean-Christophe PLAGNIOL-VILLARD
If no pinctrl available just report a warning as some architecture may not
need to do anything.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
[nicolas.fe...@atmel.com: adapt the error path]
Signed-off-by: Nicolas Ferre
Cc: net...@vger.kernel.org
On 10/30/2012 11:17 AM, Nicolas Ferre :
> This is an enhancement work that began several years ago. I try to catchup
> with
> some performance improvement that has been implemented then by Havard.
> The ring index logic and the TX error path modification are the biggest
> cha
Due to the use of common structure in at91_ether and macb drivers,
change the name of DMA descriptor structures in at91_ether as well:
dma_desc => macb_dma_desc
Signed-off-by: Nicolas Ferre
---
Hi,
This patch is a fix for the patch
[PATCH v3 06/10] net/macb: clean up ring buffer logic
tha
> That one doesn't look quite right to me.
>> Surely it should be masking with 'TX_RING_SIZE - 1'
>
> Why is that? head and tail can never be more than TX_RING_SIZE apart,
> so it shouldn't make any difference.
Absolutely.
Best regards,
--
Nicolas Ferre
On 10/31/2012 10:59 AM, Nicolas Ferre :
> On 10/30/2012 07:22 PM, Håvard Skinnemoen :
>> On Tue, Oct 30, 2012 at 4:12 AM, David Laight
>> wrote:
>>>> Instead of masking head and tail every time we increment them, just let
>>>> them
>>>> wrap th
On 10/30/2012 06:37 PM, Joachim Eastwood :
> On 30 October 2012 11:18, Nicolas Ferre wrote:
>> From: Jean-Christophe PLAGNIOL-VILLARD
>>
>> If no pinctrl available just report a warning as some architecture may not
>> need to do anything.
>>
>> Signed-o
On 24/08/2013 21:21, Boris BREZILLON :
Test the presence of a PHY device before printing attached PHY
informations.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
files changed, 14 insertions(+), 7 deletions(-)
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Please read the FA
insertions(+), 1 deletion(-)
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uot;generic" is not going to overcome the native
pinctrl, I do not feel like switching to this at the cost of changing
the whole dtsi/dts entries that we already have.
So, it is more to Linus and Stephen to give us clues about this...
Bye,
--
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uot; with conf = 0x%lu\n", pin->conf.native);
+ else
+ dev_dbg(dev, "\n");
do not change debug output
I do not change the debug output for the native pinconf binding, but
I cannot print the config as
a single interger in hex format if the generic pinconf i
definition using dt.
A fallback to the autoscan procedure is added in case there is no phy
devices defined in dt.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb.c | 48 +++
1 file changed, 38 insertions(+), 10
On 27/08/2013 09:39, Boris BREZILLON :
This patch describe the phy used on atmel sama5d3 mother board:
- phy address
- phy interrupt pin
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
arch/arm/boot/dts/sama5d3xmb.dtsi |8
1 file changed, 8 insertions
=8c038e7e14b1c5f156745e3c4df0a3aa46173dd9
http://git.kernel.org/cgit/linux/kernel/git/davem/net-next.git/commit/?id=148cbb53ace32f584d208764c7f7e6aa8edb970c
Okay, I will submit patches (based on net-next branch) to fix those bugs.
You can add my Acked-by to your fixes...
Bye,
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On 27/08/2013 15:19, Boris BREZILLON :
In PIO_PUSR and PIO_PPDSR register if a given bit is set 1 this means the
pullup/down for this pin (pin is represented as a bit position) is
disabled.
Signed-off-by: Boris BREZILLON
Indeed.
Acked-by: Nicolas Ferre
and even:
Cc: stable # 3.8+
Thanks
On 27/08/2013 15:26, Boris BREZILLON :
Add missing "atmel,at91sam9x5-pinctrl" compatible string to the
documentation.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt|2 +-
1 file changed, 1 insertion(+),
; 0x1) << 6)
Can you add this change to the documentation as well:
Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
#define AT91_PINCTRL_DEBOUNCE (1 << 16)
#define AT91_PINCTRL_DEBOUNCE_VA(x) (x << 17)
Oh, we have a nice typo here! ---^^
And
On 28/08/2013 09:35, boris brezillon :
On 28/08/2013 09:31, Nicolas Ferre wrote:
On 27/08/2013 16:51, Boris BREZILLON :
Add support for pin output control through the pinctrl config:
- support enabling/disabling output on a given pin
- support output level setting (high or low)
Signed
On 28/08/2013 09:43, Nicolas Ferre :
On 28/08/2013 09:35, boris brezillon :
On 28/08/2013 09:31, Nicolas Ferre wrote:
On 27/08/2013 16:51, Boris BREZILLON :
Add support for pin output control through the pinctrl config:
- support enabling/disabling output on a given pin
- support
On 29/08/2013 03:09, Bo Shen :
Hi Olof,
On 08/29/2013 07:58 AM, Olof Johansson wrote:
On Mon, Aug 26, 2013 at 05:55:43PM +0200, Nicolas Ferre wrote:
Arnd, Olof, Kevin,
Here is AT91 SoC updates for 3.12 kernel. It is the first pull-request for
this topic and it is based on 3.11-rc5 like your
/mach/uncompress.h | 13 +
4 files changed, 25 insertions(+), 1 deletion(-)
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On 02/10/2013 14:35, Boris BREZILLON :
Check function return values to avoid false positive driver init.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
drivers/clocksource/tcb_clksrc.c | 33 -
1 file changed, 28 insertions(+), 5 deletions
On 02/10/2013 14:35, Boris BREZILLON :
Remove the deprecated IRQF_DISABLED flag.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
drivers/clocksource/tcb_clksrc.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers
-revert on the AT91 git tree or you are able to apply it
through the clock git tree together with the patch that is fixing the
issue (it may prevent synchronization difficulties)? (BTW, I do not see
it yet in "next").
Anyway, if it is required, you can add my:
Tested-by: Nicolas Ferr
eeded SND_ATMEL_SOC_PDC config selection
* use static snd_soc_card and snd_soc_dai_link structures.
Best regards,
Richard.
Nicolas Ferre (1):
sound: sam9x5_wm8731: machine driver for at91sam9x5 wm8731 boards
Richard Genoud (4):
ARM: AT91: DTS: sam9x5: add SSC DMA parameters
ARM:
quot;;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ status = "disabled";
+};
+
--
1.7.10.4
--
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On 09/07/2013 10:36, Jongsung Kim :
Signed-off-by: Jongsung Kim
Acked-by: Nicolas Ferre
Cc: stable # 3.10+
Thanks for having spotted that.
Best regards,
---
drivers/net/ethernet/cadence/macb.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net
On 10/07/2013 17:57, Wolfram Sang :
Since commit ab78029 (drivers/pinctrl: grab default handles from device core),
we can rely on device core for setting the default pins. Compile tested only.
Acked-by: Linus Walleij (personally at LCE13)
Signed-off-by: Wolfram Sang
Acked-by: Nicolas Ferre
/atmel_serial.c |8
For atmel_serial.c:
Acked-by: Nicolas Ferre
Thanks.
drivers/tty/serial/imx.c |9 -
drivers/tty/serial/mxs-auart.c|8
drivers/tty/serial/omap-serial.c |9 -
4 files changed, 34 deletions(-)
diff --git a
On 18/09/2013 17:06, Boris BREZILLON :
Clock source changes are never applied to the CMR register.
This may lead to wrong period/duty cycle configuration.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
drivers/pwm/pwm-atmel-tcb.c |2 ++
1 file changed, 2 insertions
On 18/09/2013 17:06, Boris BREZILLON :
Use the the tcb counter width to compute the maximum time that can be
represented using the slow clock source instead of the static 16 bit width.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
drivers/pwm/pwm-atmel-tcb.c |2 +-
1
Reported-by: Jiri Prchal
Signed-off-by: Nicolas Ferre
---
arch/arm/boot/dts/at91sam9x5.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi
b/arch/arm/boot/dts/at91sam9x5.dtsi
index c68486e..e74dc15 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b
t irq, void
*dev_id)
static struct irqaction at91x40_timer_irq = {
.name = "at91_tick",
- .flags = IRQF_DISABLED | IRQF_TIMER,
+ .flags = IRQF_TIMER,
.handler= at91x40_timer_interrupt
};
--
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On 27/08/2013 16:57, Nicolas Ferre :
On 27/08/2013 15:26, Boris BREZILLON :
Add missing "atmel,at91sam9x5-pinctrl" compatible string to the
documentation.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
Linus, it seems that you were not in copy of the original email.
other phys]
Signed-off-by: Boris BREZILLON
[nicolas.fe...@atmel.com: commit message modification]
Signed-off-by: Nicolas Ferre
Cc: David J. Choi
---
drivers/net/phy/micrel.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micr
other phys]
Signed-off-by: Boris BREZILLON
[nicolas.fe...@atmel.com: commit message modification]
Signed-off-by: Nicolas Ferre
Cc: David J. Choi
---
drivers/net/phy/micrel.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micr
On 19/09/2013 23:42, Thomas Meyer :
sizeof when applied to a pointer typed expression gives the size of the
pointer.
Found by coccinelle spatch "misc/noderef.cocci"
Signed-off-by: Thomas Meyer
Acked-by: Nicolas Ferre
---
diff -u -p a/drivers/iio/adc/at91_adc.c b/drive
On 19/09/2013 20:08, David Miller :
From: Nicolas Ferre
Date: Thu, 19 Sep 2013 19:40:48 +0200
From: Patrice Vilchez
All supported Micrel PHYs implement the standard "power down" bit 11 of BMCR,
so this patch adds support using the generic genphy_{suspend,resume} functions.
Sig
t at91_pmc *pmc, int offset)
+{
+ return readl_relaxed(pmc->regbase + offset);
+}
+
+static inline void pmc_write(struct at91_pmc *pmc, int offset, u32 value)
+{
+ return writel_relaxed(value, pmc->regbase + offset);
+}
+
+#endif /* __PMC_H_ */
--
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t91_boot_soc.register_clocks)
+ at91_boot_soc.register_clocks();
at91_boot_soc.init();
}
@@ -498,7 +499,8 @@ void __init at91_dt_initialize(void)
at91_dt_clock_init();
/* Register the processor-specific clocks */
- at91_boot_soc.register_clocks();
+ if (at
/
+#define AT91_PMC_MOSCRCS 17 /* Main On-Chip RC */
+#define AT91_PMC_CFDEV 18 /* Clock Failure Detector Event
*/
+
+#endif
--
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ndex b7e8397..294e230 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -55,4 +55,7 @@ static inline void pmc_write(struct at91_pmc *pmc, int
offset, u32 value)
return writel_relaxed(value, pmc->regbase + offset);
}
+extern void __init of_at91rm9200_clk_main_setup(str
On 07/10/2013 21:11, boris brezillon :
On 07/10/2013 18:51, Nicolas Ferre wrote:
On 08/08/2013 07:06, Boris BREZILLON :
This patch adds new at91 main oscillator clock implementation using
common
clk framework.
If rate is not provided during clock registration it is calculated using
the slow
+
+For example:
+ usb: usbck {
+ compatible = "atmel,at91sam9x5-clk-usb";
+ #clock-cells = <0>;
+ clocks = <&plladiv>, <&utmi>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91rm9200-
np,
+ struct at91_pmc *pmc);
+
#endif /* __PMC_H_ */
diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h
index 00c45b3..a6911eb 100644
--- a/include/linux/clk/at91_pmc.h
+++ b/include/linux/clk/at91_pmc.h
@@ -164,6 +164,8 @@ extern void __io
/* PLLA clk id */
+#define AT91_PLLB_CLK 1 /* PLLB clk id */
+
+#endif
--
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On 08/10/2013 14:37, boris brezillon :
On 08/10/2013 11:44, Nicolas Ferre wrote:
On 08/08/2013 09:19, Boris BREZILLON :
This patch adds new at91 clks dt bindings documentation.
Signed-off-by: Boris BREZILLON
---
.../devicetree/bindings/clock/at91-clock.txt | 312
extern void __init of_at91sam9x5_clk_master_setup(struct device_node *np,
struct at91_pmc *pmc);
+extern void __init of_at91rm9200_clk_sys_setup(struct device_node *np,
+ struct at91_pmc *pmc);
+
#endif /* __PMC_H_
+
+#define AT91_PCK_SYS_CLK 0
+#define AT91_DDRCK_SYS_CLK 2
+#define AT91_LCDCK_SYS_CLK 3
+#define AT91_SMDCK_SYS_CLK 4
+#define AT91_UHP_SYS_CLK 6
+#define AT91_UDP_SYS_CLK 7
+
+#define AT91_PROG_SYS_CLK(id) (8 + id)
+
+#define AT91_MAX_SYS_CLKS 32
+
+#endif
--
Nic
_init of_at91sam9x5_clk_master_setup(struct
device_node *np,
extern void __init of_at91rm9200_clk_sys_setup(struct device_node *np,
struct at91_pmc *pmc);
+extern void __init of_at91rm9200_clk_periph_setup(struct device_node *np,
+
3
+
+#endif
--
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@@ -82,4 +82,13 @@ extern void __init of_at91rm9200_clk_periph_setup(struct
device_node *np,
extern void __init of_at91sam9x5_clk_periph_setup(struct device_node *np,
struct at91_pmc *pmc);
+#if defined(CONFIG_AT91_PROGRAMMABLE_CLOCKS)
+extern void __init of_a
On 08/10/2013 18:02, Nicolas Ferre :
On 08/08/2013 09:12, Boris BREZILLON :
This patch adds new at91 programmable clocks implementation using common clk
framework.
A programmable clock is a clock which can be exported on a given pin to clock
external devices.
Each programmable clock is given an
struct at91_pmc *pmc);
#endif
+#if defined(CONFIG_HAVE_AT91_UTMI)
+extern void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np,
+ struct at91_pmc *pmc);
+#endif
+
#endif /* __PMC_H_ */
--
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On 08/10/2013 18:01, boris brezillon :
On 08/10/2013 17:44, Nicolas Ferre wrote:
On 08/08/2013 09:10, Boris BREZILLON :
This patch adds the peripheral divisors macros (for sam9x5 compatible
IPs)
which will be used by peripheral clk dt definitions.
I am in favor for these definitions. So
(struct
device_node *np,
struct at91_pmc *pmc);
#endif
+#if defined(CONFIG_HAVE_AT91_USB_CLK)
+extern void __init of_at91rm9200_clk_usb_setup(struct device_node *np,
+ struct at91_pmc *pmc);
+extern void _
struct at91_pmc *pmc);
#endif
+#if defined(CONFIG_HAVE_AT91_SMD)
+extern void __init of_at91sam9x5_clk_smd_setup(struct device_node *np,
+ struct at91_pmc *pmc);
+#endif
+
#endif /* __PMC_H_ */
--
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On 08/08/2013 10:17, Boris BREZILLON :
Use device tree to get the source clock of the PIT (Periodic Interval Timer).
If the clock is not found in device tree (or dt is not enabled) we'll try to
get it using clk_lookup definitions.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas
.compatible = "atmel,at91sam9g45-pmc" },
+ { .compatible = "atmel,at91sam9n12-pmc" },
+ { .compatible = "atmel,at91sam9x5-pmc" },
+ { .compatible = "atmel,at91sam9g35-pmc" },
With removal of this compatibility string:
Acked-by:
On 09/10/2013 11:56, boris brezillon :
On 07/10/2013 17:12, Nicolas Ferre wrote:
On 08/08/2013 07:02, Boris BREZILLON :
This patch adds the following Kconfig options to prepare the
transition to
common clk framework:
- AT91_USE_OLD_CLK: this option is selected by every SoC which does not
registers all at91 clks using the dt definition before
calling the PIT init function.
The device tree clock registration is enabled only if common clk is
selected. Else the old clk registration is been done during
at91_dt_initialize call.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
On 08/08/2013 11:21, Boris BREZILLON :
This patch enclose sama5d3 old clk registration in
"#if defined(CONFIG_OLD_CLK_AT91) #endif" sections.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
And... do not forget to remove completely the code when transition is
done (ie: in
};
+ };
+
tcb1: timer@f8014000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf8014000 0x100>;
interrupts = ;
+
On 08/08/2013 11:36, Boris BREZILLON :
Define the main clock frequency for the new main clock node
in sama5d3xcm.dtsi.
Signed-off-by: Boris BREZILLON
Acked-by: Nicolas Ferre
---
arch/arm/boot/dts/sama5d3xcm.dtsi |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot
-by: Nicolas Ferre
---
arch/arm/mach-at91/Kconfig |1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 97033f7..b4f7d6f 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -86,7 +86,6 @@ config SOC_SAMA5D3
patch. You can even squash all this cleanup stuff in a single patch to
remove all old material.
otherwise:
Acked-by: Nicolas Ferre
---
arch/arm/boot/dts/sama5d3xcm.dtsi | 11 ---
1 file changed, 11 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi
b/arch/arm/boot/dts
unfortunate.
So, instead of failing during probe() we just silently configure the serial
peripheral as an uart. It allows us to use these serial outputs.
The proper solution is proposed in another patch.
Signed-off-by: Nicolas Ferre
---
drivers/tty/serial/atmel_serial.c | 9 ++---
1 file changed, 2
On older SoC, the "name" field is not filled in the register map.
Fix the way to figure out if the serial port is an uart or an usart for these
older products (with corresponding properties).
Signed-off-by: Nicolas Ferre
---
drivers/tty/serial/atmel_serial.c | 19 ++
: Bartlomiej Zolnierkiewicz
Signed-off-by: Kyungmin Park
Anyway, no need to resend it:
Acked-by: Nicolas Ferre
---
v2:
- use __initdata as it is OK to do it
arch/arm/mach-at91/board-cam60.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/mach-at91/board-cam60.c
src.c | 10 +-
2 files changed, 13 insertions(+), 5 deletions(-)
--
Nicolas Ferre
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On 20/09/2013 20:42, Jonathan Cameron :
On 09/20/13 19:36, Jonathan Cameron wrote:
On 09/20/13 08:26, Nicolas Ferre wrote:
On 19/09/2013 23:42, Thomas Meyer :
sizeof when applied to a pointer typed expression gives the size of the
pointer.
Found by coccinelle spatch "misc/noderef.
struct atmel_pwm_chip *atmel_pwm = platform_get_drvdata(pdev);
+
+ clk_unprepare(atmel_pwm->clk);
+
+ return pwmchip_remove(&atmel_pwm->chip);
+}
+
+static struct platform_driver atmel_pwm_driver = {
+ .driver = {
+ .name = "atmel-pwm",
+
ails.
Cc: Jean-Christophe PLAGNIOL-VILLARD
Cc: Nicolas Ferre
Acked-by: Nicolas Ferre
Thanks Johan.
Signed-off-by: Johan Hovold
---
drivers/pcmcia/at91_cf.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/pcmcia/at91_cf.c b/drivers/pcmcia/at91_cf.
al (1):
ARM: at91: serial: fix wrong pinctrl_usart2_rts
Michael Opdenacker (1):
ARM: at91: remove IRQF_DISABLED
Nicolas Ferre (1):
ARM: at91: at91sam9x5: set default mmc[01] pinctrl-names
arch/arm/boot/dts/at91sam9x5.dtsi | 6 --
arch/arm/mach-at91/at91rm9200_time.c | 2 +-
I modify the subject: s/sama5d/sama5d3/ and push it to our
at91-3.13-soc branch on:
https://github.com/at91linux/linux-at91/commits/at91-3.13-soc
With:
Acked-by: Nicolas Ferre
Thanks, bye,
On 24/09/2013 19:30, Alexandre Belloni :
Signed-off-by: Alexandre Belloni
---
arch/arm/mach-at91
On 25/09/2013 05:27, Bo Shen :
Add Atmel PWM controller driver based on PWM framework.
This is the basic function implementation of Atmel PWM controller.
It can work with PWM based led and backlight.
Signed-off-by: Bo Shen
It seems simple and nice.
Acked-by: Nicolas Ferre
Bye
On 09/06/2012 01:27 AM, Ben Hutchings :
> On Wed, 2012-09-05 at 11:00 +0200, Nicolas Ferre wrote:
>> Add an indication about which revision of the hardware we are running in
>> info->driver string.
>>
>> Signed-off-by: Nicolas Ferre
>> ---
>> drivers/net
Add macb_get_regs() ethtool function and its helper function:
macb_get_regs_len().
The version field is deduced from the IP revision which gives the
"MACB or GEM" information. An additional version field is reserved.
Signed-off-by: Nicolas Ferre
---
v2: - modify MACB_GREGS_NBR name an
On 09/05/2012 11:30 PM, David Miller :
> From: Nicolas Ferre
> Date: Wed, 5 Sep 2012 10:19:11 +0200
>
>> From: Havard Skinnemoen
>>
>> Fix a race in macb_start_xmit() where we unconditionally set the TSTART bit.
>> If an underrun just happened (we do thi
On 09/06/2012 05:49 PM, Havard Skinnemoen :
> On Wed, Sep 5, 2012 at 11:30 PM, David Miller wrote:
>> From: Nicolas Ferre
>> Date: Wed, 5 Sep 2012 10:19:11 +0200
>>
>>> From: Havard Skinnemoen
>>>
>>> Fix a race in macb_start_xmit() where
done by
the driver.
Signed-off-by: Havard Skinnemoen
[nicolas.fe...@atmel.com: adapt to newer kernel]
Signed-off-by: Nicolas Ferre
---
v2: - keep struct macb members as they are shared between
at91_ether and macb.
drivers/net/ethernet/cadence/macb.c | 206
Depending on datapath, some revisions of GEM need
64bits aligned descriptors. Use dmapool to allocate
these descriptors.
Note that different size between RX and TX rings
leads to the creation of two pools.
Signed-off-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb.c | 99
lower the
impact of this move to a variable rx buffer size on rx hot path.
RX DMA buffer size has to be multiple of 64 bytes as indicated in
DMA Configuration Register specification.
Signed-off-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb.c | 61
e net layer, it seems to me that the use
of non-coherent memory is sensible.
Do you still have reluctance with this patch?
Best regards,
--
Nicolas Ferre
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hould be better.
> The copy in the rx path is also better for short packets
> the can end up queued for userspace (although a copy in
> the socket code would solve that one.
Sure, some patches by Haavard that I am working on at the moment are
taking care of copying in any cases the
On 12/03/2012 03:01 PM, Ben Hutchings :
> On Mon, 2012-12-03 at 13:15 +0100, Nicolas Ferre wrote:
>> Depending on datapath, some revisions of GEM need
>> 64bits aligned descriptors. Use dmapool to allocate
>> these descriptors.
>> Note that different size between RX a
On 12/04/2012 07:22 PM, David Miller :
> From: Nicolas Ferre
> Date: Mon, 3 Dec 2012 13:15:43 +0100
>
>> Macb Ethernet controller requires a RX buffer of 128 bytes. It is
>> highly sub-optimal for Gigabit-capable GEM that is able to use
>> a bigger DMA buffer. Change t
t - since
> you completely forget about the memory once you pass the skb
> upstream.
>
> Some quick sums indicate you might want to allocate 8k memory
> blocks and split into 5 buffers.
Well, for the 10/100 MACB interface, I am stuck with 128 Bytes buffers!
So this use of pages seems
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