This adds the cpu-supply DT property to the cpu0 DT node needed by
the board to adapt the regulator voltage depending on the currently use
OPP.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a33-olinuxino.dts | 4
1 file changed, 4 inse
This adds the cpu-supply DT property to the cpu0 DT node needed by
the board to adapt the regulator voltage depending on the currently used
OPP.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 4
1 file chan
Hi Icenowy,
On 10/03/2017 20:25, Icenowy Zheng wrote:
>
>
> 10.03.2017, 18:56, "Quentin Schulz" <quentin.sch...@free-electrons.com>:
>> This patch adds documentation for the A33 GPADC binding.
>>
>> Signed-off-by: Quentin Schulz <quentin.sch..
Hi Icenowy,
On 10/03/2017 20:36, Icenowy Zheng wrote:
>
>
> 10.03.2017, 18:56, "Quentin Schulz" <quentin.sch...@free-electrons.com>:
>> This moves code used in MFD probing to a new sun4i_gpadc_probe_mfd
>> function.
>>
>> Signed-off-by:
Hi Chen-Yu,
Sorry for the late reply.
On 21/02/2017 05:55, Chen-Yu Tsai wrote:
> On Wed, Feb 15, 2017 at 4:53 PM, Quentin Schulz
> <quentin.sch...@free-electrons.com> wrote:
>> Hi,
>>
>> On 15/02/2017 01:46, Liam Breck wrote:
>>>
>>> On Tue,
Hi Jonathan,
On 14/03/2017 06:18, Icenowy Zheng wrote:
>
>
> 14.03.2017, 05:08, "Jonathan Cameron" <ji...@kernel.org>:
>> On 10/03/17 10:39, Quentin Schulz wrote:
>>> This adds support for the Allwinner A33 thermal sensor.
>>>
>>> U
Hi Jonathan,
On 06/02/2017 19:35, Jonathan Cameron wrote:
> On 06/02/17 07:37, Quentin Schulz wrote:
>> Hi Jonathan,
>>
>> On 14/01/2017 20:28, Jonathan Cameron wrote:
>>>
>>>
>>> On 14 January 2017 19:19:58 GMT+00:00, Quentin Schulz
>&g
supported SoCs
and almost the same bits, for the same purpose (thermal sensor).
The thermal sensor behaves exactly the same (except the presence of
interrupts or not) on the different SoCs.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Lee Jones <lee.jo...@l
Hi Lee,
On 05/04/2017 11:57, Lee Jones wrote:
> On Wed, 05 Apr 2017, Quentin Schulz wrote:
>> On 04/04/2017 10:31, Lee Jones wrote:
>>> On Tue, 21 Mar 2017, Quentin Schulz wrote:
>>>> v3:
>>>> - fixed compatible name in DT and in documentat
This adds the DT node for the thermal sensor present in the Allwinner
A33 GPADC.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
v3:
- switched compatible to allwinner,sun8i-a33-ths,
- renamed DT node name and label to ths to better match datasheet's name,
ar
This patch removes the sun4i touchscreen controller binding
documentation since it has been merged with the sun4i GPADC binding
documentation.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Rob Herring <r...@kernel.org>
Acked-by: Dmitry Torokhov &
that will require to create a DT binding for this IP, we can
avoid using an MFD, thus we need two separate functions: one for probing
via MFD and one for probing without MFD.
This split the code specific to MFD probing in a function separated from
the driver probe function.
Signed-off-by: Quentin
This patch adds documentation for the A33 GPADC binding.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
v3:
- fixed missing allwinner in front of compatible,
- updated compatible to allwinner,sun8i-a33-ths to better reflect the
datasheet's name,
- updated exa
The OPP are declared as shared but no operating points are declared for
cpu1, 2 and 3. Thus, the following error happens during the boot:
cpu cpu1: dev_pm_opp_of_get_sharing_cpus: Couldn't find tcpu_dev node.
This patch applies the operating points to each cpu of the A33.
Signed-off-by: Quentin
boards defining the CPU regulator, we cannot have these
two frequencies as it would cause the CPU to try to run a higher
frequency without "overvolting" which is very likely to crash the CPU.
Therefore, these two frequencies must be enabled on a per-board basis.
Signed-off-by: Quen
on a BMX055 and the datasheet of the BMG160
and the BMI055 give the same reset register and bits.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
drivers/iio/gyro/bmg160_core.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/iio/gyro/bmg160_co
This patch removes the sun4i touchscreen controller binding
documentation since it has been merged with the sun4i GPADC binding
documentation.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Rob Herring <r...@kernel.org>
---
added in v2
.../bi
tched from DT IIO channels mapping to iio_map structures IIO
channels mapping,
Quentin
Quentin Schulz (6):
dt-bindings: power: supply: add AXP20X/AXP22X battery DT binding
power: supply: add battery driver for AXP20X and AXP22X PMICs
ARM: dtsi: axp209: add battery power supply subnode
supply subnode for AXP20X PMIC.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Acked-by: Chen-Yu Tsai <w...@csie.org>
---
v2:
- changed DT node name from battery_power_supply to
battery-power-sup
subnode for AXP22X PMIC.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Acked-by: Chen-Yu Tsai <w...@csie.org>
---
v2:
- changed DT node name from battery_power_supply to
battery-power-supply,
- r
The NextThing Co. CHIP has an AXP209 PMIC with battery connector.
This enables the battery power supply subnode.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Acked-by: Chen-Yu Tsai <w...@csie.org>
capacity (in percentage), voltage max and min limits, current
voltage and battery capacity (in Ah).
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
v6:
max and min limits, current voltage and battery
capacity (in Ah).
This battery driver uses the AXP20X/AXP22X ADC driver as PMIC data
provider.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Jonathan Cameron <ji...@kernel.org>
Acked-by: Maxime Ripard
The Sinlinx SinA33 has an AXP223 PMIC and a battery connector, thus, we
enable the battery power supply subnode in its Device Tree.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Acked-by: Chen-Yu Tsai &l
ed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
---
arch/arm/mach-at91/Kconfig | 4 +-
drivers/clk/at91/Makefile| 1 +-
drivers/clk/at91/clk-audio-pll.c | 536 -
The way to find the best_diff and do the appropriate process afterwards
can be re-used.
This patch prepares the driver for an upcoming patch that will allow
clk_generated to determine the rate of the audio_pll.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by:
of the clock.
Since audio IPs are most likely to request the same rate, we enforce
that the only clks able to modify gck rate are those of audio IPs.
To remain consistent, we deny other clocks to be children of audio_pll.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Mark Brown <broo...@kernel.org>
Acked-by: Nicolas Ferre <nicolas.fe...@microchip.com>
---
sound/soc/atmel/atmel-classd.c | 47 ++-
1 file changed, 14 insertions(+), 33 deletions(-)
diff
/msg436120.html
[5] http://www.spinics.net/lists/linux-clk/msg17927.html
Quentin Schulz (7):
clk: at91: clk-generated: remove useless divisor loop
dt-bindings: clk: at91: add audio plls to the compatible list
clk: at91: add audio pll clock drivers
clk: at91: clk-generated: create function to find
Since gclk (generated-clk) is now able to determine the rate of the
audio_pll, there is no need for classd to have a direct phandle to the
audio_pll while already having a phandle to gclk.
This binding is used by no board in mainline so it is safe to be
modified.
Signed-off-by: Quentin Schulz
(passed along req argument of the function) and
the parent clock rate, thus we know the closest rounded divisor, we
don't need to iterate over the available divisors to find the best one
for a given clock.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Boris Bre
have different enable bits and different dividers and divider formulas,
they are handled by two different drivers.
This adds the audio plls (frac, pad and pmc) to the compatible list of
at91 clocks in DT binding.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Rob H
Hi all,
On 17/07/2017 11:53, Quentin Schulz wrote:
> According to their datasheets, the AXP221, AXP223, AXP288, AXP803,
> AXP809 and AXP813 PEK have different values for startup time bits from
> the AXP20X PEK (which are currently used for all the aforementioned PMICs).
>
> Th
the board.
Thanks,
Quentin
Quentin Schulz (2):
Input: axp20x-pek: add support for AXP221 PEK
mfd: axp20x: use correct platform device id for many PEK
drivers/input/misc/axp20x-pek.c | 62 ++---
drivers/mfd/axp20x.c| 12
2 files changed
According to their datasheets, the AXP221, AXP223, AXP288, AXP803,
AXP809 and AXP813 PEK have different values for startup time bits from
the AXP20X, let's use the platform device id with the correct values.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
drive
The AXP221 has different values for startup time bits from the AXP20X.
This patch introduces a different platform_device_id to the driver and
adds the necessary code to handle the different platform_device_ids.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
drivers
to be
reconfigured as well.
The other registers and init process are taken care of by the SDHCI
core.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Ludovic Desroches <ludovic.desroc...@microchip.com>
---
v2:
- use runtime_resume as system_resume,
- set a
The setting of clocks and presets is currently done in probe only but
once deep PM support is added, it'll be needed in the resume function.
Let's create a function for this setting.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Ludovic Desroches <ludov
From: Cyrille Pitchen <cyrille.pitc...@atmel.com>
This patch adds the pin muxing for classd and enables it.
Signed-off-by: Cyrille Pitchen <cyrille.pitc...@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.fe...@atmel.com>
Signed-off-by: Quentin Schulz <quentin.sch.
-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Mark Brown <broo...@kernel.org>
---
added in v2:
- split from bigger patch with audio PLLs and DT binding,
- updated all variables and macros named ACLK to GCLK,
sound/soc/atmel/atmel-c
://patchwork.kernel.org/patch/9462349/
[4] https://www.spinics.net/lists/arm-kernel/msg436120.html
[5] http://www.spinics.net/lists/linux-clk/msg17927.html
Cyrille Pitchen (2):
ARM: dts: at91: sama5d2: add classd nodes
ARM: dts: at91: sama5d2_xplained: add pin muxing and enable classd
Quentin
have different enable bits and different dividers and divider formulas,
they are handled by two different drivers.
This adds the audio plls (frac, pad and pmc) to the compatible list of
at91 clocks in DT binding.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Rob H
(passed along req argument of the function) and
the parent clock rate, thus we know the closest rounded divisor, we
don't need to iterate over the available divisors to find the best one
for a given clock.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Boris Bre
to be
reconfigured as well.
The other registers and init process are taken care of by the SDHCI
core.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Ludovic Desroches <ludovic.desroc...@microchip.com>
---
v3:
- pm_runtime_force_suspend before setting restore
The setting of clocks and presets is currently done in probe only but
once deep PM support is added, it'll be needed in the resume function.
Let's create a function for this setting.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Ludovic Desroches <ludov
ed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
v2:
- split DT binding in a different patch,
- removed unused AUDIO_PLL_*FOUT* defines from clk-audio-pll-pmc,
- split classD modifications in a different patch,
arch/arm/mach-at91/Kconfig | 4 +
driv
From: Cyrille Pitchen <cyrille.pitc...@atmel.com>
This patch adds nodes for the classd device and its generated clock.
Signed-off-by: Cyrille Pitchen <cyrille.pitc...@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.fe...@atmel.com>
Signed-off-by: Quentin Schulz &l
The way to find the best_diff and do the appropriate process afterwards
can be re-used.
This patch prepares the driver for an upcoming patch that will allow
clk_generated to determine the rate of the audio_pll.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by:
of the clock.
Since audio IPs are most likely to request the same rate, we enforce
that the only clks able to modify gck rate are those of audio IPs.
To remain consistent, we deny other clocks to be children of audio_pll.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Since gclk (generated-clk) is now able to determine the rate of the
audio_pll, there is no need for classd to have a direct phandle to the
audio_pll while already having a phandle to gclk.
This binding is used by no board in mainline so it is safe to be
modified.
Signed-off-by: Quentin Schulz
Hi Lee,
On 18/07/2017 09:19, Lee Jones wrote:
> On Mon, 17 Jul 2017, Quentin Schulz wrote:
>
>> According to their datasheets, the AXP221, AXP223, AXP288, AXP803,
>> AXP809 and AXP813 PEK have different values for startup time bits from
>> the AXP20X, let's us
Hi Lee,
On 18/07/2017 09:18, Lee Jones wrote:
> On Mon, 17 Jul 2017, Quentin Schulz wrote:
>
>> Hi all,
>>
>> On 17/07/2017 11:53, Quentin Schulz wrote:
>>> According to their datasheets, the AXP221, AXP223, AXP288, AXP803,
>>> AXP809 and AXP813 PEK h
Hi Maxime,
On 18/07/2017 09:57, Maxime Ripard wrote:
> On Tue, Jul 18, 2017 at 09:36:04AM +0200, Quentin Schulz wrote:
>>>> +
>>>> + error = sysfs_create_group(>dev.kobj,
>>>> + axp20x_pek->attribute_group);
>
Hi Maxime,
On 17/07/2017 13:29, Maxime Ripard wrote:
> Hi,
>
> On Mon, Jul 17, 2017 at 11:53:06AM +0200, Quentin Schulz wrote:
>> The AXP221 has different values for startup time bits from the AXP20X.
>>
>> This patch introduces a different platform_device_i
Hi Lee,
On 18/07/2017 11:49, Lee Jones wrote:
> On Tue, 18 Jul 2017, Quentin Schulz wrote:
>
>> Hi Lee,
>>
>> On 18/07/2017 09:19, Lee Jones wrote:
>>> On Mon, 17 Jul 2017, Quentin Schulz wrote:
>>>
>>>> According to their datasheets, the
Hi all,
It's been almost a week with no comments on this patch set, so kindly
pinging.
Thanks,
Quentin
On 13/07/2017 09:49, Quentin Schulz wrote:
> This patch series adds support for the audio PLLs and enables ClassD that
> can be found in ATMEL Sama5d2 SoC.
>
> There are two aud
Now that extended attributes aren't used anymore, remove all the
mentions to extended attributes.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
drivers/input/misc/axp20x-pek.c | 60 -
1 file changed, 29 insertions(+), 31 del
can be easily supported by just filling
correctly its ax20x_info structure and adding a platform_device_id.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
drivers/input/misc/axp20x-pek.c | 131 +++-
1 file changed, 88 insertions(
,
- separate in different patches,
- removed mfd patch to correct mfd cell name since Chen-Yu will take care
of it in another patch series,
Thanks,
Quentin
Quentin Schulz (3):
Input: axp20x-pek: use driver_data of platform_device_id instead of
extended attributes
Input: axp20x-pek: remove
The AXP221 has different values for startup time bits from the AXP20X.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
drivers/input/misc/axp20x-pek.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/input/misc/axp20x-pek.c b/drivers/inpu
an eMMC SDIO device.
>>>>
>>>> The code was taken from an out-of-tree repository and has seen a first
>>>> pass in the cleanup process.
>>>>
>>>> At the moment, there is no publicly available datasheet for this chip.
>>>
/ _end functions
Quentin Schulz (1):
staging: net: wireless: add ESP8089 WiFi driver
drivers/mmc/core/core.c | 47 +-
drivers/staging/Kconfig |2 +
drivers/staging/Makefile|1 +
drivers/staging/esp8089/Kconfig
Hi Stephen,
I forgot to answer one of your questions:
On 22/07/2017 00:20, Stephen Boyd wrote:
> On 07/13, Quentin Schulz wrote:
>> diff --git a/drivers/clk/at91/clk-audio-pll-pad.c
>> b/drivers/clk/at91/clk-audio-pll-pad.c
>> new file mode 100644
>> index 000
Hi Alexandre,
On 26/07/2017 08:57, Alexandre Belloni wrote:
> On 25/07/2017 at 17:44:19 +0200, Nicolas Ferre wrote:
>> On 25/07/2017 at 09:37, Quentin Schulz wrote:
>>> This patch series adds support for the audio PLLs and enables ClassD that
>>> can be
ed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezil...@free-electrons.com>
---
arch/arm/mach-at91/Kconfig | 4 +-
drivers/clk/at91/Makefile| 1 +-
drivers/clk/at91/clk-audio-pll.c | 531 -
The way to find the best_diff and do the appropriate process afterwards
can be re-used.
This patch prepares the driver for an upcoming patch that will allow
clk_generated to determine the rate of the audio_pll.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by:
From: Cyrille Pitchen <cyrille.pitc...@atmel.com>
This patch adds the pin muxing for classd and enables it.
Signed-off-by: Cyrille Pitchen <cyrille.pitc...@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.fe...@atmel.com>
Signed-off-by: Quentin Schulz <quentin.sch.
have different enable bits and different dividers and divider formulas,
they are handled by two different drivers.
This adds the audio plls (frac, pad and pmc) to the compatible list of
at91 clocks in DT binding.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Rob H
://patchwork.kernel.org/patch/9462349/
[4] https://www.spinics.net/lists/arm-kernel/msg436120.html
[5] http://www.spinics.net/lists/linux-clk/msg17927.html
Cyrille Pitchen (2):
ARM: dts: at91: sama5d2: add classd nodes
ARM: dts: at91: sama5d2_xplained: add pin muxing and enable classd
Quentin Schulz (7):
clk
From: Cyrille Pitchen <cyrille.pitc...@atmel.com>
This patch adds nodes for the classd device and its generated clock.
Signed-off-by: Cyrille Pitchen <cyrille.pitc...@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.fe...@atmel.com>
Signed-off-by: Quentin Schulz &l
(passed along req argument of the function) and
the parent clock rate, thus we know the closest rounded divisor, we
don't need to iterate over the available divisors to find the best one
for a given clock.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Boris Bre
-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Mark Brown <broo...@kernel.org>
---
sound/soc/atmel/atmel-classd.c | 47 ++-
1 file changed, 14 insertions(+), 33 deletions(-)
diff --git a/sound/soc/atmel/atmel-classd.c b/sound/soc/atmel/at
of the clock.
Since audio IPs are most likely to request the same rate, we enforce
that the only clks able to modify gck rate are those of audio IPs.
To remain consistent, we deny other clocks to be children of audio_pll.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Since gclk (generated-clk) is now able to determine the rate of the
audio_pll, there is no need for classd to have a direct phandle to the
audio_pll while already having a phandle to gclk.
This binding is used by no board in mainline so it is safe to be
modified.
Signed-off-by: Quentin Schulz
Hi all,
Kindly pinging since the merge window is now closed and I haven;t
received any update in the last two weeks,
Thanks,
Quentin
On 04/07/2017 14:37, Quentin Schulz wrote:
> When phy-sun4i-usb's probing fails, it does not print the reason in
> kernel log, forcing the developer t
Hi Stephen,
On 22/07/2017 00:20, Stephen Boyd wrote:
> On 07/13, Quentin Schulz wrote:
>> diff --git a/drivers/clk/at91/clk-audio-pll-pad.c
>> b/drivers/clk/at91/clk-audio-pll-pad.c
>> new file mode 100644
>> index ..10dd6d625696
>> --- /dev/null
&g
Hi Greg,
On 21/07/2017 17:01, Greg KH wrote:
> On Fri, Jul 21, 2017 at 04:35:01PM +0200, Quentin Schulz wrote:
>> The Espressif ESP8089 WiFi chips can be often found in cheap tablets.
>> There is one in A23 Polaroid tablets for example.
>>
>> The chip is often embe
From: Hans de Goede
Some sdio devices have a multiple stage bring-up process. Specifically
the esp8089 (for which an out of tree driver is available) loads firmware
on the first call to its sdio-drivers' probe function and then resets
the device causing it to reboot from its
From: Cyrille Pitchen <cyrille.pitc...@atmel.com>
This patch adds the pin muxing for classd and enables it.
Signed-off-by: Cyrille Pitchen <cyrille.pitc...@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.fe...@atmel.com>
Signed-off-by: Quentin Schulz <quentin.sch.
-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
added in v2:
- split from bigger patch with audio PLLs and DT binding,
- updated all variables and macros named ACLK to GCLK,
sound/soc/atmel/atmel-classd.c | 47 +-
1 file changed, 14 inse
of the clock.
Since audio IPs are most likely to request the same rate, we enforce
that the only clks able to modify gck rate are those of audio IPs.
To remain consistent, we deny other clocks to be children of audio_pll.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
-
From: Cyrille Pitchen <cyrille.pitc...@atmel.com>
This patch adds nodes for the classd device and its generated clock.
Signed-off-by: Cyrille Pitchen <cyrille.pitc...@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.fe...@atmel.com>
Signed-off-by: Quentin Schulz &l
Since gclk (generated-clk) is now able to determine the rate of the
audio_pll, there is no need for classd to have a direct phandle to the
audio_pll while already having a phandle to gclk.
This binding is used by no board in mainline so it is safe to be
modified.
Signed-off-by: Quentin Schulz
When phy-sun4i-usb's probing fails, it does not print the reason in
kernel log, forcing the developer to edit this driver to add info logs.
This commit makes the kernel print the reason of phy-sun4i-usb's probing
failure or a success message.
Signed-off-by: Quentin Schulz <quentin.sch...@f
ed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
v2:
- split DT binding in a different patch,
- removed unused AUDIO_PLL_*FOUT* defines from clk-audio-pll-pmc,
- split classD modifications in a different patch,
arch/arm/mach-at91/Kconfig | 4 +
driv
The way to find the best_diff and do the appropriate process afterwards
can be re-used.
This patch prepares the driver for an upcoming patch that will allow
clk_generated to determine the rate of the audio_pll.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by:
(passed along req argument of the function) and
the parent clock rate, thus we know the closest rounded divisor, we
don't need to iterate over the available divisors to find the best one
for a given clock.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Boris Bre
://patchwork.kernel.org/patch/9462349/
[4] https://www.spinics.net/lists/arm-kernel/msg436120.html
[5] http://www.spinics.net/lists/linux-clk/msg17927.html
Cyrille Pitchen (2):
ARM: dts: at91: sama5d2: add classd nodes
ARM: dts: at91: sama5d2_xplained: add pin muxing and enable classd
Quentin
have different enable bits and different dividers and divider formulas,
they are handled by two different drivers.
This adds the audio plls (frac, pad and pmc) to the compatible list of
at91 clocks in DT binding.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Acked-by: Rob H
Reported-by: Andreas Färber <afaer...@suse.de>
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
drivers/iio/adc/sun4i-gpadc-iio.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c
b/drivers/iio/adc/s
Hi Adrian and Ludovic,
On 20/06/2017 11:49, Ludovic Desroches wrote:
> On Tue, Jun 20, 2017 at 10:07:06AM +0200, Quentin Schulz wrote:
>> Hi Adrian,
>>
>> On 20/06/2017 09:39, Adrian Hunter wrote:
>>> On 16/06/17 10:29, Quentin Schulz wrote:
>>>> This add
Better with the link.
On 05/07/2017 08:23, Quentin Schulz wrote:
> Hi Adrian and Ludovic,
>
> On 20/06/2017 11:49, Ludovic Desroches wrote:
>> On Tue, Jun 20, 2017 at 10:07:06AM +0200, Quentin Schulz wrote:
>>> Hi Adrian,
>>>
>>> On 20/06/2017 09:39, A
can be easily supported by just filling
correctly its ax20x_info structure and adding a platform_device_id.
Moreover, since we get rid of extended attributes, rename
axp20x_store_ext_attr to axp20x_store_attr and axp20x_show_ext_attr to
axp20x_show_attr.
Signed-off-by: Quentin Schulz <quentin.
and their respective masks,
- separate in different patches,
- removed mfd patch to correct mfd cell name since Chen-Yu will take care
of it in another patch series,
Thanks,
Quentin
Quentin Schulz (2):
Input: axp20x-pek: use driver_data of platform_device_id instead of extended
attributes
The AXP221 has different values for startup time bits from the AXP20X.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/input/misc/axp20x-pek.c | 17 +
1 file changed, 17 insertions(+)
diff --g
Hum, forgot the changelog.
On 03/05/2017 14:37, Quentin Schulz wrote:
> This adds Power Management deep Suspend/Resume support for Bosch M_CAN
> chip.
>
> When the system resumes from deep sleep, the chip needs to be fully
> reinitialized (RAM, chip, clocks, irq, candev, ...) t
This adds Power Management deep Suspend/Resume support for Bosch M_CAN
chip.
When the system resumes from deep sleep, the chip needs to be fully
reinitialized (RAM, chip, clocks, irq, candev, ...) to be functional.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
d
Hi Marc,
On 03/05/2017 14:16, Marc Kleine-Budde wrote:
> On 05/03/2017 02:11 PM, Quentin Schulz wrote:
>> This adds Power Management deep Suspend/Resume support for Bosch M_CAN
>> chip.
>>
>> When the chip resumes from deep sleep, the RAM needs to be initialized
>&
it can
be called separately from device initialization from Device Tree.
Signed-off-by: Quentin Schulz <quentin.sch...@free-electrons.com>
---
drivers/net/can/m_can/m_can.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/drivers/net/can/m_can/m_c
This adds Power Management deep Suspend/Resume support for Bosch M_CAN
chip.
When the chip resumes from deep sleep, the RAM needs to be initialized
as it is done when the driver probes. The net interface also needs to be
closed and reopened to be fully functional.
Signed-off-by: Quentin Schulz
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