Re: [PATCH 11/30] spi: dw: Add DWC SSI capability

Mark, A concrete question is below of my previous comment. On Wed, Sep 30, 2020 at 01:17:37AM +0300, Serge Semin wrote: > On Tue, Sep 29, 2020 at 02:52:33PM +0100, Mark Brown wrote: > > On Sun, Sep 20, 2020 at 02:28:55PM +0300, Serge Semin wrote: > > > > > - /* > &g

Re: [PATCH 02/30] spi: dw: Use ternary op to init set_cs callback

On Wed, Sep 30, 2020 at 04:01:17PM +0100, Mark Brown wrote: > On Wed, Sep 30, 2020 at 05:57:59PM +0300, Serge Semin wrote: > > On Wed, Sep 30, 2020 at 12:55:55AM +0300, Serge Semin wrote: > > > > + if (dws->set_cs) > > > + master->set_cs = dws->set_

Re: [PATCH 11/30] spi: dw: Add DWC SSI capability

On Wed, Sep 30, 2020 at 04:41:49PM +0100, Mark Brown wrote: > On Wed, Sep 30, 2020 at 06:03:12PM +0300, Serge Semin wrote: > > On Wed, Sep 30, 2020 at 01:17:37AM +0300, Serge Semin wrote: > > > > > > - /* > > > > > - * SPI mode (SCPOL|SCPH)

[PATCH v2 07/21] spi: dw: Add DW SPI controller config structure

driver, but by the glue layer drivers too. This will be required in a coming further commit. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 29 + drivers/spi/spi-dw.h | 10 ++ 2 files changed, 27 insertions(+), 12 deletions(-) diff --git a

[PATCH v2 08/21] spi: dw: Refactor data IO procedure

tx_max(), rx_max(), dw_writer() and dw_reader() methods. Such modification will not only give us the more optimized IO procedures, but will make the data IO methods much more readable than before. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 37

[PATCH v2 04/21] spi: dw: Update SPI bus speed in a config function

otype to have a generic function name not related to CR0. Leave the too long line with the chip->clk_div setting as is for now, since it's going to be changed later anyway. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 28 ++-- 1 file changed, 14 inse

[PATCH v2 17/21] spi: dw: Add memory operations support

s and this is not a DW APB SSI controller with fixed automatic CS toggle functionality. Co-developed-by: Ramil Zaripov Signed-off-by: Ramil Zaripov Signed-off-by: Serge Semin --- drivers/spi/Kconfig | 1 + drivers/spi/spi-dw-core.c | 300 ++ drivers/spi/s

[PATCH v2 20/21] dt-bindings: spi: dw: Add Baikal-T1 SPI Controllers

igned-off-by: Serge Semin Reviewed-by: Rob Herring --- .../bindings/spi/snps,dw-apb-ssi.yaml | 33 +-- 1 file changed, 31 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,d

[PATCH v2 11/21] spi: dw: Unmask IRQs after enabling the chip

ix it anyway just in case... Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index db3fec4195f7..58a7c7465c61 100644 --- a/drivers/spi/spi-dw-core.c +++ b/

[PATCH v2 02/21] spi: dw: Add DWC SSI capability

of the normal DW APB SSI controller setup to make the dw_spi_update_cr0() method looking coherent. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 80 ++- drivers/spi/spi-dw-mmio.c | 20 +- drivers/spi/spi-dw.h | 9 + 3 files chan

[PATCH v2 06/21] spi: dw: Update Rx sample delay in the config function

Rx sample delay can be SPI device specific, and should be synchronously initialized with the rest of the communication and peripheral device related controller setups. So let's move the Rx-sample delay setup into the DW APB SSI configuration update method. Signed-off-by: Serge Semin --- dr

[PATCH v2 12/21] spi: dw: Discard chip enabling on DMA setup error

non-zero value returned from the dma_setup callback to be erroneous as it's supposed to be in the kernel. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.

[PATCH v2 00/21] spi: dw: Add full Baikal-T1 SPI Controllers support

IO-methods to access FIFOs [PATCH 00/05] spi: dw: Disable all IRQs when controller is unused [PATCH 00/04] spi: dw: Clear IRQ status on DW SPI controller reset [PATCH 00/03] spi: dw: Initialize n_bytes before the memory barrier [PATCH 00/01] spi: dw: Discard IRQ threshold macro Signed-off

[PATCH v2 21/21] spi: dw: Add Baikal-T1 SPI Controller glue driver

ns of the DW SPI core module. Co-developed-by: Ramil Zaripov Signed-off-by: Ramil Zaripov Signed-off-by: Serge Semin --- drivers/spi/Kconfig | 28 drivers/spi/Makefile | 1 + drivers/spi/spi-dw-bt1.c | 339 +++ 3 files changed, 368 inser

[PATCH v2 01/21] spi: dw: Use an explicit set_cs assignment

Simplify the dw_spi_add_host() method a bit by replacing the currently implemented default set_cs callback setting up and later having it overwritten by a custom function with direct if-else-based callback assignment. Signed-off-by: Serge Semin --- Changelog v2: - Replace the ternary operator

[PATCH v2 15/21] spi: dw: Move num-of retries parameter to the header file

The parameter will be needed for another wait-done method being added in the framework of the SPI memory operation modification in a further commit. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-dma.c | 5 ++--- drivers/spi/spi-dw.h | 2 ++ 2 files changed, 4 insertions(+), 3 deletions

[PATCH v2 14/21] spi: dw: Explicitly de-assert CS on SPI transfer completion

efore that. We'll also need a way to explicitly set and clear the corresponding CS bit at a certain moment of the operation. Let's alter the set_cs function then to also de-activate the CS, when it's required. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 2 +- 1 file

[PATCH v2 10/21] spi: dw: Perform IRQ setup in a dedicated function

lated one. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 41 ++- 1 file changed, 23 insertions(+), 18 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 74e8f0da2883..db3fec4195f7 100644 --- a/drivers/spi/spi-dw-c

[PATCH v2 19/21] spi: dw: Add poll-based SPI transfers support

nt iteration. Finally the errors status is checked on each iteration. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 40 ++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index c

[PATCH v2 18/21] spi: dw: Introduce max mem-ops SPI bus frequency setting

only applicable for the memory operations, since the standard SPI core interface is implemented with an assumption that there is no problem with the automatic CS toggling. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 4 +++- drivers/spi/spi-dw.h | 1 + 2 files changed, 4 insertions(

[PATCH v2 16/21] spi: dw: Add generic DW SSI status-check method

new method to detect the errors in the IRQ- and DMA-based SPI transfer execution procedures. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 43 +++ drivers/spi/spi-dw-dma.c | 11 ++ drivers/spi/spi-dw.h | 1 + 3 files changed, 37

[PATCH v2 03/21] spi: dw: Detach SPI device specific CR0 config method

nt of setting it up. By doing so we'll finally make the SPI device chip_data serving as it's supposed to - to preserve the SPI device specific DW SPI configuration. See spi-fsl-dspi.c, spi-pl022.c, spi-pxa2xx.c drivers for example of the way the chip data is utilized. Signed-off-

[PATCH v2 09/21] spi: dw: Refactor IRQ-based SPI transfer procedure

e outbound data is sent out, we'll disable the Tx FIFO Empty IRQ. If there is still some data to receive, we'll adjust the Rx FIFO Threshold level, so the next IRQ would be raised at the moment of all incoming data being available in the Rx FIFO. Signed-off-by: Serge Semin --- drive

[PATCH v2 13/21] spi: dw: De-assert chip-select on reset

ments in case of an error or having the CS left set by a bootloader or another software. Signed-off-by: Serge Semin --- drivers/spi/spi-dw.h | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index cfc9f63acde4..eb1d46983319 1

[PATCH v2 05/21] spi: dw: Simplify the SPI bus speed config procedure

ication speed update procedure by removing the clock-related fields from the peripheral chip data and update the DW SPI clock divider only if it's really changed. The later change is reached by keeping the effective SPI bus speed in the internal DW SPI private data. Signed-off-by: Serge Semin

Re: [PATCH v2 02/21] spi: dw: Add DWC SSI capability

On Thu, Oct 01, 2020 at 10:51:05PM +0100, Mark Brown wrote: > On Wed, Sep 30, 2020 at 09:55:26PM +0300, Serge Semin wrote: > > Currently DWC SSI core is supported by means of setting up the > > core-specific update_cr0() callback. It isn't suitable for multiple > > re

[PATCH v3 17/21] spi: dw: Add memory operations support

s and this is not a DW APB SSI controller with fixed automatic CS toggle functionality. Co-developed-by: Ramil Zaripov Signed-off-by: Ramil Zaripov Signed-off-by: Serge Semin --- drivers/spi/Kconfig | 1 + drivers/spi/spi-dw-core.c | 300 ++ drivers/spi/s

[PATCH v3 18/21] spi: dw: Introduce max mem-ops SPI bus frequency setting

only applicable for the memory operations, since the standard SPI core interface is implemented with an assumption that there is no problem with the automatic CS toggling. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 4 +++- drivers/spi/spi-dw.h | 1 + 2 files changed, 4 insertions(

[PATCH v3 01/21] spi: dw: Use an explicit set_cs assignment

Simplify the dw_spi_add_host() method a bit by replacing the currently implemented default set_cs callback setting up and later having it overwritten by a custom function with direct if-else-based callback assignment. Signed-off-by: Serge Semin --- Changelog v2: - Replace the ternary operator

[PATCH v3 20/21] dt-bindings: spi: dw: Add Baikal-T1 SPI Controllers

igned-off-by: Serge Semin Reviewed-by: Rob Herring --- .../bindings/spi/snps,dw-apb-ssi.yaml | 33 +-- 1 file changed, 31 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,d

[PATCH v3 19/21] spi: dw: Add poll-based SPI transfers support

nt iteration. Finally the errors status is checked on each iteration. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 40 ++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index c

[PATCH v3 00/21] spi: dw: Add full Baikal-T1 SPI Controllers support

IO-methods to access FIFOs [PATCH 00/05] spi: dw: Disable all IRQs when controller is unused [PATCH 00/04] spi: dw: Clear IRQ status on DW SPI controller reset [PATCH 00/03] spi: dw: Initialize n_bytes before the memory barrier [PATCH 00/01] spi: dw: Discard IRQ threshold macro Changelog v

[PATCH v3 08/21] spi: dw: Refactor data IO procedure

tx_max(), rx_max(), dw_writer() and dw_reader() methods. Such modification will not only give us the more optimized IO procedures, but will make the data IO methods much more readable than before. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 37

[PATCH v3 04/21] spi: dw: Update SPI bus speed in a config function

otype to have a generic function name not related to CR0. Leave the too long line with the chip->clk_div setting as is for now, since it's going to be changed later anyway. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 28 ++-- 1 file changed, 14 inse

[PATCH v3 02/21] spi: dw: Add DWC SSI capability

of the normal DW APB SSI controller setup to make the dw_spi_update_cr0() method looking coherent. Signed-off-by: Serge Semin --- Changelog v2: - Get back the in-code comments to the dw_spi_update_cr0() method and it' further derivatives. Changelog v3: - Remove dw_spi_update_cr0() callback assi

[PATCH v3 21/21] spi: dw: Add Baikal-T1 SPI Controller glue driver

ns of the DW SPI core module. Co-developed-by: Ramil Zaripov Signed-off-by: Ramil Zaripov Signed-off-by: Serge Semin --- drivers/spi/Kconfig | 28 drivers/spi/Makefile | 1 + drivers/spi/spi-dw-bt1.c | 339 +++ 3 files changed, 368 inser

[PATCH v3 16/21] spi: dw: Add generic DW SSI status-check method

new method to detect the errors in the IRQ- and DMA-based SPI transfer execution procedures. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 43 +++ drivers/spi/spi-dw-dma.c | 11 ++ drivers/spi/spi-dw.h | 1 + 3 files changed, 37

[PATCH v3 06/21] spi: dw: Update Rx sample delay in the config function

Rx sample delay can be SPI device specific, and should be synchronously initialized with the rest of the communication and peripheral device related controller setups. So let's move the Rx-sample delay setup into the DW APB SSI configuration update method. Signed-off-by: Serge Semin --- dr

[PATCH v3 03/21] spi: dw: Detach SPI device specific CR0 config method

nt of setting it up. By doing so we'll finally make the SPI device chip_data serving as it's supposed to - to preserve the SPI device specific DW SPI configuration. See spi-fsl-dspi.c, spi-pl022.c, spi-pxa2xx.c drivers for example of the way the chip data is utilized. Signed-off-

[PATCH v3 15/21] spi: dw: Move num-of retries parameter to the header file

The parameter will be needed for another wait-done method being added in the framework of the SPI memory operation modification in a further commit. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-dma.c | 5 ++--- drivers/spi/spi-dw.h | 2 ++ 2 files changed, 4 insertions(+), 3 deletions

[PATCH v3 10/21] spi: dw: Perform IRQ setup in a dedicated function

lated one. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 41 ++- 1 file changed, 23 insertions(+), 18 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 74e8f0da2883..db3fec4195f7 100644 --- a/drivers/spi/spi-dw-c

[PATCH v3 12/21] spi: dw: Discard chip enabling on DMA setup error

non-zero value returned from the dma_setup callback to be erroneous as it's supposed to be in the kernel. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.

[PATCH v3 09/21] spi: dw: Refactor IRQ-based SPI transfer procedure

e outbound data is sent out, we'll disable the Tx FIFO Empty IRQ. If there is still some data to receive, we'll adjust the Rx FIFO Threshold level, so the next IRQ would be raised at the moment of all incoming data being available in the Rx FIFO. Signed-off-by: Serge Semin --- drive

[PATCH v3 11/21] spi: dw: Unmask IRQs after enabling the chip

ix it anyway just in case... Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index db3fec4195f7..58a7c7465c61 100644 --- a/drivers/spi/spi-dw-core.c +++ b/

[PATCH v3 05/21] spi: dw: Simplify the SPI bus speed config procedure

ication speed update procedure by removing the clock-related fields from the peripheral chip data and update the DW SPI clock divider only if it's really changed. The later change is reached by keeping the effective SPI bus speed in the internal DW SPI private data. Signed-off-by: Serge Semin

[PATCH v3 13/21] spi: dw: De-assert chip-select on reset

ments in case of an error or having the CS left set by a bootloader or another software. Signed-off-by: Serge Semin --- drivers/spi/spi-dw.h | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index cfc9f63acde4..eb1d46983319 1

[PATCH v3 07/21] spi: dw: Add DW SPI controller config structure

driver, but by the glue layer drivers too. This will be required in a coming further commit. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 29 + drivers/spi/spi-dw.h | 10 ++ 2 files changed, 27 insertions(+), 12 deletions(-) diff --git a

[PATCH v3 14/21] spi: dw: Explicitly de-assert CS on SPI transfer completion

efore that. We'll also need a way to explicitly set and clear the corresponding CS bit at a certain moment of the operation. Let's alter the set_cs function then to also de-activate the CS, when it's required. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 2 +- 1 file

Re: [PATCH v3 02/21] spi: dw: Add DWC SSI capability

On Fri, Oct 02, 2020 at 01:19:29PM +0300, Andy Shevchenko wrote: > On Fri, Oct 02, 2020 at 01:28:10AM +0300, Serge Semin wrote: > > Currently DWC SSI core is supported by means of setting up the > > core-specific update_cr0() callback. It isn't suitable for multiple >

Re: [PATCH v3 03/21] spi: dw: Detach SPI device specific CR0 config method

On Fri, Oct 02, 2020 at 01:22:46PM +0300, Andy Shevchenko wrote: > On Fri, Oct 02, 2020 at 01:28:11AM +0300, Serge Semin wrote: > > Indeed there is no point in detecting the SPI peripheral device parameters > > and initializing the CR0 register fields each time an SPI transfer

Re: [PATCH v3 02/21] spi: dw: Add DWC SSI capability

On Fri, Oct 02, 2020 at 09:26:07PM +0300, Andy Shevchenko wrote: > On Fri, Oct 2, 2020 at 8:18 PM Serge Semin > wrote: > > > > On Fri, Oct 02, 2020 at 01:19:29PM +0300, Andy Shevchenko wrote: > > > On Fri, Oct 02, 2020 at 01:28:10AM +0300, Serge Semin wrote: > &

Re: [PATCH v3 03/21] spi: dw: Detach SPI device specific CR0 config method

On Fri, Oct 02, 2020 at 09:24:55PM +0300, Andy Shevchenko wrote: > On Fri, Oct 2, 2020 at 8:47 PM Serge Semin > wrote: > > On Fri, Oct 02, 2020 at 01:22:46PM +0300, Andy Shevchenko wrote: > > > On Fri, Oct 02, 2020 at 01:28:11AM +0300, Serge Semin wrote: > > > &g

Re: [PATCH v3 02/21] spi: dw: Add DWC SSI capability

On Fri, Oct 02, 2020 at 10:46:09PM +0300, Serge Semin wrote: > On Fri, Oct 02, 2020 at 09:26:07PM +0300, Andy Shevchenko wrote: > > On Fri, Oct 2, 2020 at 8:18 PM Serge Semin > > wrote: > > > > > > On Fri, Oct 02, 2020 at 01:19:29PM +0300, Andy Shevchenko wrote: &

Re: [PATCH v3 02/21] spi: dw: Add DWC SSI capability

On Fri, Oct 02, 2020 at 11:08:29PM +0300, Serge Semin wrote: > On Fri, Oct 02, 2020 at 10:46:09PM +0300, Serge Semin wrote: > > On Fri, Oct 02, 2020 at 09:26:07PM +0300, Andy Shevchenko wrote: > > > On Fri, Oct 2, 2020 at 8:18 PM Serge Semin > > > wrote: > > >

[PATCH] MAINTAINERS: Add maintainer of DW APB SSI driver

Add myself as a maintainer of the Synopsis DesignWare APB SSI driver. Suggested-by: Andy Shevchenko Signed-off-by: Serge Semin Link: https://lore.kernel.org/linux-spi/20201001222829.15977-1-sergey.se...@baikalelectronics.ru/ --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff

[PATCH v4 17/21] spi: dw: Add memory operations support

s and this is not a DW APB SSI controller with fixed automatic CS toggle functionality. Co-developed-by: Ramil Zaripov Signed-off-by: Ramil Zaripov Signed-off-by: Serge Semin --- drivers/spi/Kconfig | 1 + drivers/spi/spi-dw-core.c | 301 ++ drivers/spi/s

[PATCH v4 14/21] spi: dw: Explicitly de-assert CS on SPI transfer completion

efore that. We'll also need a way to explicitly set and clear the corresponding CS bit at a certain moment of the operation. Let's alter the set_cs function then to also de-activate the CS, when it's required. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 2 +- 1 file

[PATCH v4 15/21] spi: dw: Move num-of retries parameter to the header file

The parameter will be needed for another wait-done method being added in the framework of the SPI memory operation modification in a further commit. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-dma.c | 5 ++--- drivers/spi/spi-dw.h | 2 ++ 2 files changed, 4 insertions(+), 3 deletions

[PATCH v4 18/21] spi: dw: Introduce max mem-ops SPI bus frequency setting

only applicable for the memory operations, since the standard SPI core interface is implemented with an assumption that there is no problem with the automatic CS toggling. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 4 +++- drivers/spi/spi-dw.h | 1 + 2 files changed, 4 insertions(

[PATCH v4 16/21] spi: dw: Add generic DW SSI status-check method

new method to detect the errors in the IRQ- and DMA-based SPI transfer execution procedures. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 43 +++ drivers/spi/spi-dw-dma.c | 11 ++ drivers/spi/spi-dw.h | 1 + 3 files changed, 37

[PATCH v4 10/21] spi: dw: Perform IRQ setup in a dedicated function

lated one. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 41 ++- 1 file changed, 23 insertions(+), 18 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 4a45610c85f1..e7ffcfff6594 100644 --- a/drivers/spi/spi-dw-c

[PATCH v4 11/21] spi: dw: Unmask IRQs after enabling the chip

ix it anyway just in case... Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index e7ffcfff6594..89e5428c8de6 100644 --- a/drivers/spi/spi-dw-core.c +++ b/

[PATCH v4 01/21] spi: dw: Use an explicit set_cs assignment

Simplify the dw_spi_add_host() method a bit by replacing the currently implemented default set_cs callback setting up and later having it overwritten by a custom function with direct if-else-based callback assignment. Signed-off-by: Serge Semin --- Changelog v2: - Replace the ternary operator

[PATCH v4 03/21] spi: dw: Detach SPI device specific CR0 config method

nt of setting it up. By doing so we'll finally make the SPI device chip_data serving as it's supposed to - to preserve the SPI device specific DW SPI configuration. See spi-fsl-dspi.c, spi-pl022.c, spi-pxa2xx.c drivers for example of the way the chip data is utilized. Signed-off-

[PATCH v4 06/21] spi: dw: Update Rx sample delay in the config function

Rx sample delay can be SPI device specific, and should be synchronously initialized with the rest of the communication and peripheral device related controller setups. So let's move the Rx-sample delay setup into the DW APB SSI configuration update method. Signed-off-by: Serge Semin --- dr

[PATCH v4 13/21] spi: dw: De-assert chip-select on reset

ments in case of an error or having the CS left set by a bootloader or another software. Signed-off-by: Serge Semin --- drivers/spi/spi-dw.h | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index cfc9f63acde4..eb1d46983319 1

[PATCH v4 20/21] dt-bindings: spi: dw: Add Baikal-T1 SPI Controllers

igned-off-by: Serge Semin Reviewed-by: Rob Herring --- .../bindings/spi/snps,dw-apb-ssi.yaml | 33 +-- 1 file changed, 31 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,d

[PATCH v4 05/21] spi: dw: Simplify the SPI bus speed config procedure

ication speed update procedure by removing the clock-related fields from the peripheral chip data and update the DW SPI clock divider only if it's really changed. The later change is reached by keeping the effective SPI bus speed in the internal DW SPI private data. Signed-off-by: Serge Semin

[PATCH v4 21/21] spi: dw: Add Baikal-T1 SPI Controller glue driver

ns of the DW SPI core module. Co-developed-by: Ramil Zaripov Signed-off-by: Ramil Zaripov Signed-off-by: Serge Semin --- drivers/spi/Kconfig | 28 drivers/spi/Makefile | 1 + drivers/spi/spi-dw-bt1.c | 339 +++ 3 files changed, 368 inser

[PATCH v4 04/21] spi: dw: Update SPI bus speed in a config function

otype to have a generic function name not related to CR0. Leave the too long line with the chip->clk_div setting as is for now, since it's going to be changed later anyway. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 28 ++-- 1 file changed, 14 inse

[PATCH v4 12/21] spi: dw: Discard chip enabling on DMA setup error

non-zero value returned from the dma_setup callback to be erroneous as it's supposed to be in the kernel. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.

[PATCH v4 09/21] spi: dw: Refactor IRQ-based SPI transfer procedure

e outbound data is sent out, we'll disable the Tx FIFO Empty IRQ. If there is still some data to receive, we'll adjust the Rx FIFO Threshold level, so the next IRQ would be raised at the moment of all incoming data being available in the Rx FIFO. Signed-off-by: Serge Semin --- drive

[PATCH v4 19/21] spi: dw: Add poll-based SPI transfers support

nt iteration. Finally the errors status is checked on each iteration. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 40 ++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index b

[PATCH v4 02/21] spi: dw: Add DWC SSI capability

of the normal DW APB SSI controller setup to make the dw_spi_update_cr0() method looking coherent. Signed-off-by: Serge Semin --- Changelog v2: - Get back the in-code comments to the dw_spi_update_cr0() method and it' further derivatives. Changelog v3: - Remove dw_spi_update_cr0() callback assi

[PATCH v4 00/21] spi: dw: Add full Baikal-T1 SPI Controllers support

ps://lore.kernel.org/linux-spi/20201001222829.15977-1-sergey.se...@baikalelectronics.ru Changelog v4: - Rename dw_spi_get_cr0() to dw_spi_prepare_cr0(). Signed-off-by: Serge Semin Cc: Alexey Malahov Cc: Ramil Zaripov Cc: Pavel Parkhomenko Cc: Andy Shevchenko Cc: Andy Shevchenko Cc: Lars P

[PATCH v4 08/21] spi: dw: Refactor data IO procedure

tx_max(), rx_max(), dw_writer() and dw_reader() methods. Such modification will not only give us the more optimized IO procedures, but will make the data IO methods much more readable than before. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 37

[PATCH v4 07/21] spi: dw: Add DW SPI controller config structure

driver, but by the glue layer drivers too. This will be required in a coming further commit. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 29 + drivers/spi/spi-dw.h | 10 ++ 2 files changed, 27 insertions(+), 12 deletions(-) diff --git a

Re: [PATCH v2] MIPS: replace add_memory_region with memblock

Hello Thomas On Thu, Oct 08, 2020 at 10:43:54AM +0200, Thomas Bogendoerfer wrote: > add_memory_region was the old interface for registering memory and > was already changed to used memblock internaly. Replace it by > directly calling memblock functions. Thanks for suggesting this cleanup. It's gr

Re: [PATCH v2] MIPS: replace add_memory_region with memblock

On Thu, Oct 08, 2020 at 04:30:35PM +0100, Maciej W. Rozycki wrote: > On Thu, 8 Oct 2020, Serge Semin wrote: > > > At least I don't see a decent reason to preserve them. The memory > > registration > > method does nearly the same sanity checks. The memory reservation

Re: [PATCH v2] MIPS: replace add_memory_region with memblock

On Thu, Oct 08, 2020 at 09:49:46AM -0700, Florian Fainelli wrote: > > > On 10/8/2020 8:54 AM, Serge Semin wrote: > > On Thu, Oct 08, 2020 at 04:30:35PM +0100, Maciej W. Rozycki wrote: > > > On Thu, 8 Oct 2020, Serge Semin wrote: > > > > > > > At

Re: [PATCH v2] MIPS: replace add_memory_region with memblock

On Thu, Oct 08, 2020 at 05:56:17PM +0100, Maciej W. Rozycki wrote: > On Thu, 8 Oct 2020, Serge Semin wrote: > > > > > At least I don't see a decent reason to preserve them. The memory > > > > registration > > > > method does nearly the same sanity c

Re: [PATCH 0/3] serial: 8250_dw: Fix clk-notifier/port suspend deadlock

Hello, On Sun, Sep 27, 2020 at 05:01:52PM +0200, Hans de Goede wrote: > Hi, > > On 9/23/20 6:19 PM, Serge Semin wrote: > > Hans has discovered that there is a potential deadlock between the ref > > clock change notifier and the port suspension procedures {see the link at

Re: [PATCH 0/2] mips: Introduce some IO-accessors optimizations

Thomas, Any comment on the series? The changes aren't that comprehensive, so it would be great to merge it in before the 5.10 merge window is opened. -Sergey On Sun, Sep 20, 2020 at 02:00:08PM +0300, Serge Semin wrote: > It has been discovered that on our MIPS P5600-based CPU the IO a

Re: [PATCH 02/30] spi: dw: Use ternary op to init set_cs callback

On Tue, Sep 29, 2020 at 02:11:53PM +0100, Mark Brown wrote: > On Sun, Sep 20, 2020 at 02:28:46PM +0300, Serge Semin wrote: > > Simplify the dw_spi_add_host() method a bit by replacing the set_cs > > callback overwrite procedure with direct setting the callback if a custom > &

Re: [PATCH 03/30] spi: dw: Initialize n_bytes before the memory barrier

On Tue, Sep 29, 2020 at 02:12:25PM +0100, Mark Brown wrote: > On Sun, Sep 20, 2020 at 02:28:47PM +0300, Serge Semin wrote: > > Since n_bytes field of the DW SPI private data is also utilized by the > > IRQ handler, we need to make sure it' initialization is done before th

Re: [PATCH 04/30] Revert: spi: spi-dw: Add lock protect dw_spi rx/tx to prevent concurrent calls

On Tue, Sep 29, 2020 at 02:28:11PM +0100, Mark Brown wrote: > On Sun, Sep 20, 2020 at 02:28:48PM +0300, Serge Semin wrote: > > There is no point in having the commit 19b61392c5a8 ("spi: spi-dw: Add > > lock protect dw_spi rx/tx to prevent concurrent calls") applied. The

Re: [PATCH 11/30] spi: dw: Add DWC SSI capability

On Tue, Sep 29, 2020 at 02:52:33PM +0100, Mark Brown wrote: > On Sun, Sep 20, 2020 at 02:28:55PM +0300, Serge Semin wrote: > > > - /* > > -* SPI mode (SCPOL|SCPH) > > -* CTRLR0[ 8] Serial Clock Phase > > -* CTRLR0[ 9] Serial Clock Polarity > >

Re: [PATCH 00/30] spi: dw: Add full Baikal-T1 SPI Controllers support

Hi Mark On Tue, Sep 29, 2020 at 03:43:51PM +0100, Mark Brown wrote: > On Sun, Sep 20, 2020 at 02:28:44PM +0300, Serge Semin wrote: > > > First two patches are just cleanups to simplify the DW APB SSI device > > initialization a bit. We suggest to discard the IRQ threshold macro

Re: [PATCH v2] MIPS: replace add_memory_region with memblock

On Fri, Oct 09, 2020 at 02:07:52PM +0200, Thomas Bogendoerfer wrote: > On Thu, Oct 08, 2020 at 06:20:06PM +0300, Serge Semin wrote: > > > Signed-off-by: Thomas Bogendoerfer > > > --- > > > Changes in v2: > > > fixed missing memblock include in fw/sni/s

[PATCH 09/18] dt-bindings: usb: renesas-xhci: Refer to the usb-xhci.yaml file

With minor peculiarities (like uploading some vendor-specific firmware) these are just Generic xHCI controllers fully compatible with its properties. Make sure the Renesas USB xHCI DT nodes are also validated against the Generic xHCI DT schema. Signed-off-by: Serge Semin --- Documentation

[PATCH 04/18] dt-bindings: usb: usb-hcd: Add "ulpi/serial/hsic" PHY types

Aside from the UTMI+ there are also ULPI, Serial and HSIC PHY types can be specified in the phy_type HCD property. Add them to the enumeration of the acceptable values. Signed-off-by: Serge Semin --- Documentation/devicetree/bindings/usb/usb-hcd.yaml | 10 ++ 1 file changed, 6

[PATCH 11/18] dt-bindings: usb: dwc3: Add interrupt-names property support

The controller driver supports two types of DWC USB3 devices: with a common interrupt lane and with individual interrupts for each mode. Add both of these cases support to the DWC USB3 DT schema. Signed-off-by: Serge Semin --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 11

[PATCH 02/18] dt-bindings: usb: usb-hcd: Add "wireless" maximum-speed property value

It appears that the "maximum-speed" property can also accept the "wireless" value. Add it to the enumeration of the possible property values then. Signed-off-by: Serge Semin --- Documentation/devicetree/bindings/usb/usb-hcd.yaml | 2 +- 1 file changed, 1 insertion(+), 1 del

[PATCH 07/18] dt-bindings: usb: Convert xHCI bindings to DT schema

range, single interrupts source, and is supposed to optionally contain up to two reference clocks for the controller core and CSRs. Signed-off-by: Serge Semin --- .../devicetree/bindings/usb/generic-xhci.yaml | 63 +++ .../devicetree/bindings/usb/usb-xhci.txt

[PATCH 03/18] dt-bindings: usb: usb-hcd: Add "otg-rev" property restriction

There are only four OTG revisions are currently supported by the kernel: 0x0100, 0x0120, 0x0130, 0x0200. Any another value is considered as invalid. Signed-off-by: Serge Semin --- Documentation/devicetree/bindings/usb/usb-hcd.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a

[PATCH 12/18] dt-bindings: usb: dwc3: Add synopsys,dwc3 compatible string

nopsys, Inc. is presented with just "snps" vendor prefix. Signed-off-by: Serge Semin --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/dev

[PATCH 08/18] dt-bindings: usb: xhci: Add Broadcom STB v2 compatible device

For some reason the "brcm,xhci-brcm-v2" compatible string has been missing in the original bindings file. Add it to the Generic xHCI Controllers DT schema since driver expects it to be supported. Signed-off-by: Serge Semin --- Documentation/devicetree/bindings/usb/generic-xhci.yaml |

[PATCH 01/18] dt-bindings: usb: usb-hcd: Convert generic USB properties to DT schema

The generic USB HCD properties have been described in the legacy bindings text file: Documentation/devicetree/bindings/usb/generic.txt . Let's convert it' content into the USB HCD DT schema properties so all USB DT nodes would be validated to have them properly utilized. Signed-off

[PATCH 2/3] usb: dwc3: ulpi: Replace CPU-based busyloop with Protocol-based one

1.1, October 20, 2004, pp. 30 - 36. Fixes: 88bc9d194ff6 ("usb: dwc3: add ULPI interface support") Signed-off-by: Serge Semin --- drivers/usb/dwc3/ulpi.c | 18 +++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/usb/dwc3/ulpi.c b/drivers/usb/

[PATCH 00/18] dt-bindings: usb: Add generic USB HCD, xHCI, DWC USB3 DT schema

roller with too many PHYs. We haven't fixed the problems denoted above in this patchset for now. So any help, suggestions on how they (especially #1) could be fixed, following up fixup patches would be appropriate. Signed-off-by: Serge Semin Cc: Alexey Malahov Cc: Pavel Parkhomenko Cc: And

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