[PATCH] spi: spi-pxa2xx: Check status register to determine if SSSR_TINT is disabled

From: "Tan, Jui Nee" <jui.nee@intel.com> On Intel Baytrail, there is case when interrupt handler get called, no SPI message is captured. The RX FIFO is indeed empty when RX timeout pending interrupt (SSSR_TINT) happens. Use the BIOS version where both HSUART and SPI are on th

RE: [PATCH v2 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

> -Original Message- > From: Lee Jones [mailto:lee.jo...@linaro.org] > Sent: Monday, May 9, 2016 8:25 PM > To: Tan, Jui Nee <jui.nee@intel.com> > Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com; > andriy.shevche...@linux.intel.com;

[PATCH v3 1/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

This is to cater the need for non-ACPI system whereby a platform device has to be created in order to bind with the Apollo Lake Pinctrl GPIO platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- drivers/pinctrl/intel/pinctrl-broxton.c | 43 --

[PATCH v3 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- drivers/mfd/Kconfig | 3 +- drivers/mfd/lpc_ich.c | 153 ++ 2

[PATCH v3 0/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL" to fix kbuildbot error Andy Shevchenko (1): x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's Tan Jui Nee (2): pinctrl/broxton: enable platform device in the absent of ACPI enumeration mf

[PATCH v3 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

[PATCH v4 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V4: - Move Kconfig option CONFIG_X86_INTEL_NON_ACPI from [PATCH 2/3] x86/platform/p2s

[PATCH v4 0/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

Intel SOC's Tan Jui Nee (2): pinctrl/broxton: enable platform device in the absent of ACPI enumeration mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system arch/x86/Kconfig| 14 arch/x86/include/asm/p2sb.h

[PATCH v4 1/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

This is to cater the need for non-ACPI system whereby a platform device has to be created in order to bind with the Apollo Lake Pinctrl GPIO platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> Acked-by: Mika Westerberg <mika.westerb...@linux.intel.com> --- C

RE: [PATCH v3 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

> -Original Message- > From: Lee Jones [mailto:lee.jo...@linaro.org] > Sent: Thursday, June 9, 2016 11:56 PM > To: Tan, Jui Nee <jui.nee@intel.com> > Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com; > andriy.shevche...@linux.intel.com;

RE: [PATCH v3 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

> -Original Message- > From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com] > Sent: Monday, June 13, 2016 11:59 PM > To: Andy Shevchenko <andriy.shevche...@linux.intel.com> > Cc: Tan, Jui Nee <jui.nee@intel.com>; heikki.kroge...@linux.intel.co

RE: [PATCH v3 1/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

> -Original Message- > From: Linus Walleij [mailto:linus.wall...@linaro.org] > Sent: Tuesday, June 14, 2016 3:09 PM > To: Tan, Jui Nee <jui.nee@intel.com> > Cc: Mika Westerberg <mika.westerb...@linux.intel.com>; Heikki Krogerus > <heikki.kroge...@

[PATCH v4 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

RE: [PATCH v3 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

> -Original Message- > From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com] > Sent: Tuesday, June 21, 2016 3:24 PM > To: Tan, Jui Nee <jui.nee@intel.com> > Cc: Andy Shevchenko <andriy.shevche...@linux.intel.com>; > heikki.kroge...@linux.int

[PATCH v5 2/3] mfd: lpc_ich: Prepare to split lpc-ich driver

This patch follows the example of mfd/wm831x and splits it into an interface independent core since it is growing quite fast with many table entries. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- drivers/mfd/Makefile |1 + drivers/mfd/lpc_ich-core.c

[PATCH v5 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V5: - Split lpc-ich driver into two parts (lpc_ich-core and lpc_ich-apl). The file l

[PATCH v5 0/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

Changes in V2: - Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL" to fix kbuildbot error Andy Shevchenko (1): x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's Tan Jui Nee (2): mfd: lpc_ich: Prepare to split lpc-

[PATCH v5 1/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

RE: [PATCH 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

> -Original Message- > From: lkp > Sent: Monday, April 11, 2016 12:35 PM > To: Tan, Jui Nee <jui.nee@intel.com> > Cc: kbuild-...@01.org; mika.westerb...@linux.intel.com; > heikki.kroge...@linux.intel.com; andriy.shevche...@linux.intel.com; > t...@linutro

[PATCH 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- drivers/mfd/Kconfig | 3 +- drivers/mfd/lpc_ich.c | 119 ++ 2

[PATCH 0/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

Tan Jui Nee (2): pinctrl/broxton: enable platform device in the absent of ACPI enumeration mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system arch/x86/Kconfig| 4 ++ arch/x86/include/asm/p2sb.h | 27 arch

[PATCH 1/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

This is to cater the need for non-ACPI system whereby a platform device has to be created in order to bind with the Apollo Lake Pinctrl GPIO platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- drivers/pinctrl/intel/pinctrl-broxton.c | 43 --

[PATCH 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

[PATCH v2 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- drivers/mfd/Kconfig | 3 +- drivers/mfd/lpc_ich.c | 128 ++ 2

[PATCH v2 1/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

This is to cater the need for non-ACPI system whereby a platform device has to be created in order to bind with the Apollo Lake Pinctrl GPIO platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- drivers/pinctrl/intel/pinctrl-broxton.c | 43 --

[PATCH v2 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

[PATCH v2 0/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

NCTRL" to fix kbuildbot error Andy Shevchenko (1): x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's Tan Jui Nee (2): pinctrl/broxton: enable platform device in the absent of ACPI enumeration mfd: lpc_ich: Add support for Intel Apollo Lake GP

[PATCH v6 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V6: - Rename CONFIG_X86_INTEL_APL to CONFIG_X86_INTEL_IVI so that it relates to the

[PATCH v6 2/3] mfd: lpc_ich: Rename lpc-ich driver

This patch follows the example of mfd/wm831x to rename the driver from "lpc_ich" to "lpc_ich-core". Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V6: - none, just a subject line and commit message change. drivers/mfd/Makefile

[PATCH v6 0/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

all mfd_add_devices() once for all gpio communities Changes in V2: - Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL" to fix kbuildbot error Andy Shevchenko (1): x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's T

[PATCH v6 1/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

RE: [PATCH v5 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

> -Original Message- > From: Lee Jones [mailto:lee.jo...@linaro.org] > Sent: Tuesday, June 28, 2016 5:15 PM > To: Andy Shevchenko <andy.shevche...@gmail.com> > Cc: Tan, Jui Nee <jui.nee@intel.com>; Mika Westerberg > <mika.westerb...@linux.intel.com&g

RE: [PATCH v5 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

> -Original Message- > From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com] > Sent: Tuesday, June 28, 2016 4:19 PM > To: Tan, Jui Nee <jui.nee@intel.com> > Cc: heikki.kroge...@linux.intel.com; andriy.shevche...@linux.intel.com; > t...@linutronix

RE: [PATCH v6 1/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

> -Original Message- > From: paul.gortma...@gmail.com [mailto:paul.gortma...@gmail.com] On > Behalf Of Paul Gortmaker > Sent: Friday, July 15, 2016 8:01 AM > To: Tan, Jui Nee <jui.nee@intel.com> > Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.int

RE: [PATCH v6 1/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

> -Original Message- > From: Tan, Jui Nee > Sent: Monday, July 18, 2016 11:35 AM > To: 'Paul Gortmaker' <paul.gortma...@windriver.com>; > andriy.shevche...@linux.intel.com > Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com; > t...@linutro

RE: [PATCH v7 2/6] mfd: lpc_ich: Rename lpc-ich driver

> -Original Message- > From: Lee Jones [mailto:lee.jo...@linaro.org] > Sent: Friday, September 30, 2016 8:31 AM > To: Tan, Jui Nee <jui.nee@intel.com> > Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com; > andriy.shevche...@linux.intel.com

RE: [PATCH v7 4/6] mfd: move enum lpc_chipsets into lpc_ich.h

> -Original Message- > From: Lee Jones [mailto:lee.jo...@linaro.org] > Sent: Friday, September 30, 2016 8:33 AM > To: Tan, Jui Nee <jui.nee@intel.com> > Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com; > andriy.shevche...@linux.intel.com

RE: [PATCH v7 5/6] mfd: lpc_ich: Add Device IDs for Intel Apollo Lake PCH

> -Original Message- > From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com] > Sent: Thursday, September 29, 2016 7:09 PM > To: Tan, Jui Nee <jui.nee@intel.com> > Cc: heikki.kroge...@linux.intel.com; andriy.shevche...@linux.intel.com; > t...@linutro

RE: [PATCH v6 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

> -Original Message- > From: Lee Jones [mailto:lee.jo...@linaro.org] > Sent: Tuesday, August 9, 2016 3:16 PM > To: Tan, Jui Nee <jui.nee@intel.com> > Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com; > andriy.shevche...@linux.intel.com;

[PATCH v7 0/6] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

use case - Only call mfd_add_devices() once for all gpio communities Changes in V2: - Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL" to fix kbuildbot error Andy Shevchenko (1): x86/platform/p2sb: New Primary to Sideband bridge support dr

[PATCH v7 4/6] mfd: move enum lpc_chipsets into lpc_ich.h

Move the enum's definition into a standalone header file which can be used wherever its definition is needed. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- drivers/mfd/lpc_ich-core.c | 71 - include/linux/mfd/lpc_ich.

[PATCH v7 6/6] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V7: - Add author information and rewrite description of source file lpc_ich

[PATCH v7 2/6] mfd: lpc_ich: Rename lpc-ich driver

This patch follows the example of mfd/wm831x to rename the driver from "lpc_ich" to "lpc_ich-core". Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V7: - No change Changes in V6: - none, just a subject line and commit message chan

[PATCH v7 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

[PATCH v7 5/6] mfd: lpc_ich: Add Device IDs for Intel Apollo Lake PCH

Adding Intel codename Apollo Lake platform device IDs for PCH. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- drivers/mfd/lpc_ich-core.c | 6 ++ include/linux/mfd/lpc_ich.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/mfd/lpc_ich-core.c b/drivers/mfd/lpc_ich-

[PATCH v7 3/6] x86/intel-ivi: Add Intel In-Vehicle Infotainment (IVI) systems used in cars support

to GPIO. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- arch/x86/Kconfig | 8 1 file changed, 8 insertions(+) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index edc0313..ce5a048 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -511,6 +511,14 @@ config X86_IN

[PATCH v9 6/6] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V9: - No change Changes in V8: - Rename source file lpc_ich-apl.c to lpc_ich_apl.c (sug

[PATCH v9 0/6] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

orm/p2sb: New Primary to Sideband bridge support driver for Intel SOC's Tan Jui Nee (5): mfd: lpc_ich: Rename lpc-ich driver x86/intel-ivi: Add Intel In-Vehicle Infotainment (IVI) systems used in cars support mfd: move enum lpc_chipsets into lpc_ich.h mfd: lpc_ich: Add Device IDs for Int

[PATCH v9 2/6] mfd: lpc_ich: Rename lpc-ich driver

This patch follows the example of mfd/wm831x to rename the driver from "lpc_ich" to "lpc_ich_core". Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V9: - Remove the filename from the header of lpc_ich_core.c (suggested by Lee). Changes in V8:

[PATCH v9 4/6] mfd: move enum lpc_chipsets into lpc_ich.h

Move the enum's definition into a standalone header file which can be used wherever its definition is needed. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V9: - No change Changes in V8: - No change drivers/mfd/lpc_ich_core.c

[PATCH v9 5/6] mfd: lpc_ich: Add Device IDs for Intel Apollo Lake PCH

Adding Intel codename Apollo Lake platform device IDs for PCH. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> Acked-for-MFD-by: Lee Jones <lee.jo...@linaro.org> --- Changes in V9: - No change Changes in V8: - No change drivers/mfd/lpc_ich_core.c | 6 ++ i

[PATCH v9 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

[PATCH v9 3/6] x86/intel-ivi: Add Intel In-Vehicle Infotainment (IVI) systems used in cars support

to GPIO. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V9: - No change Changes in V8: - No change arch/x86/Kconfig | 8 1 file changed, 8 insertions(+) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index e2c1dcf..aa8928a 100644 --- a/ar

[PATCH v10 0/6] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

- Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL" to fix kbuildbot error Andy Shevchenko (1): drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's Tan Jui Nee (5): mfd: lpc_ich: Rename lpc-ich driver x86/intel-ivi:

[PATCH v10 4/6] mfd: move enum lpc_chipsets into lpc_ich.h

Move the enum's definition into a standalone header file which can be used wherever its definition is needed. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com> --- Changes in V10: - No change C

[PATCH v10 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

[PATCH v10 3/6] x86/intel-ivi: Add Intel In-Vehicle Infotainment (IVI) systems used in cars support

to GPIO. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com> --- Changes in V10: - No change Changes in V9: - No change Changes in V8: - No change arch/x86/Kconfig | 8 1 file changed,

[PATCH v10 6/6] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com> --- Changes in V10: - No change C

[PATCH v10 2/6] mfd: lpc_ich: Rename lpc-ich driver

This patch follows the example of mfd/wm831x to rename the driver from "lpc_ich" to "lpc_ich_core". Signed-off-by: Tan Jui Nee <jui.nee@intel.com> Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com> --- Changes in V10: - No change

[PATCH v10 5/6] mfd: lpc_ich: Add Device IDs for Intel Apollo Lake PCH

Adding Intel codename Apollo Lake platform device IDs for PCH. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> Acked-for-MFD-by: Lee Jones <lee.jo...@linaro.org> --- Changes in V10: - No change Changes in V9: - No change Changes in V8: - No change

[PATCH v11 2/6] mfd: lpc_ich: Rename lpc-ich driver

This patch follows the example of mfd/wm831x to rename the driver from "lpc_ich" to "lpc_ich_core". Signed-off-by: Tan Jui Nee <jui.nee@intel.com> Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com> --- Changes in V11: - No change Cha

[PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

[PATCH v11 4/6] mfd: move enum lpc_chipsets into lpc_ich.h

Move the enum's definition into a standalone header file which can be used wherever its definition is needed. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com> --- Changes in V11: - No change Ch

[PATCH v11 5/6] mfd: lpc_ich: Add Device IDs for Intel Apollo Lake PCH

Adding Intel codename Apollo Lake platform device IDs for PCH. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> Acked-for-MFD-by: Lee Jones <lee.jo...@linaro.org> --- Changes in V11: - No change Changes in V10: - No change Changes in V9: - No change C

[PATCH v11 6/6] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com> --- Changes in V11: - Remove duplicated

[PATCH v11 0/6] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

or all gpio communities Changes in V2: - Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL" to fix kbuildbot error Andy Shevchenko (1): drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's Tan Jui Nee (5): mfd: lpc

[PATCH v11 3/6] x86/intel-ivi: Add Intel In-Vehicle Infotainment (IVI) systems used in cars support

to GPIO. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com> --- Changes in V11: - Select CONFIG_P2SB when CONFIG_X86_INTEL_IVI is enabled instead of CONFIG_LPC_ICH is enabled. This is to fix kbuildbot err

RE: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

> -Original Message- > From: Andy Shevchenko [mailto:andriy.shevche...@linux.intel.com] > Sent: Friday, November 18, 2016 7:22 PM > To: Tan, Jui Nee <jui.nee@intel.com>; mika.westerb...@linux.intel.com; > heikki.kroge...@linux.intel.com; t...@linutronix.de; dvh..

[PATCH v8 0/6] inctrl/broxton: enable platform device in the absent of ACPI enumeration

or all gpio communities Changes in V2: - Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL" to fix kbuildbot error Andy Shevchenko (1): x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's Tan Jui Nee (5): mfd: lpc

[PATCH v8 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

[PATCH v8 2/6] mfd: lpc_ich: Rename lpc-ich driver

This patch follows the example of mfd/wm831x to rename the driver from "lpc_ich" to "lpc_ich_core". Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V8: - Update new file name with lpc_ich_core.c at description of source file. - Rewor

[PATCH v8 3/6] x86/intel-ivi: Add Intel In-Vehicle Infotainment (IVI) systems used in cars support

to GPIO. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V8: - No change arch/x86/Kconfig | 8 1 file changed, 8 insertions(+) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index e2c1dcf..aa8928a 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@

[PATCH v8 4/6] mfd: move enum lpc_chipsets into lpc_ich.h

Move the enum's definition into a standalone header file which can be used wherever its definition is needed. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V8: - No change drivers/mfd/lpc_ich_core.c | 71 - include

[PATCH v8 6/6] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V8: - Rename source file lpc_ich-apl.c to lpc_ich_apl.c (suggested by Mika). Changes

[PATCH v8 5/6] mfd: lpc_ich: Add Device IDs for Intel Apollo Lake PCH

Adding Intel codename Apollo Lake platform device IDs for PCH. Signed-off-by: Tan Jui Nee <jui.nee@intel.com> --- Changes in V8: - No change drivers/mfd/lpc_ich_core.c | 6 ++ include/linux/mfd/lpc_ich.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drive

RE: [PATCH v10 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

> -Original Message- > From: linux-gpio-ow...@vger.kernel.org [mailto:linux-gpio- > ow...@vger.kernel.org] On Behalf Of Andy Shevchenko > Sent: Friday, November 11, 2016 12:07 AM > To: Tan, Jui Nee <jui.nee@intel.com>; mika.westerb...@linux.inte

[PATCH] spi: spi-pxa2xx: Check status register to determine if SSSR_TINT is disabled

From: "Tan, Jui Nee" On Intel Baytrail, there is case when interrupt handler get called, no SPI message is captured. The RX FIFO is indeed empty when RX timeout pending interrupt (SSSR_TINT) happens. Use the BIOS version where both HSUART and SPI are on the same IRQ. Both drivers

RE: [PATCH v7 2/6] mfd: lpc_ich: Rename lpc-ich driver

> -Original Message- > From: Lee Jones [mailto:lee.jo...@linaro.org] > Sent: Friday, September 30, 2016 8:31 AM > To: Tan, Jui Nee > Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com; > andriy.shevche...@linux.intel.com; t...@linutronix.de; mi.

RE: [PATCH v7 4/6] mfd: move enum lpc_chipsets into lpc_ich.h

> -Original Message- > From: Lee Jones [mailto:lee.jo...@linaro.org] > Sent: Friday, September 30, 2016 8:33 AM > To: Tan, Jui Nee > Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com; > andriy.shevche...@linux.intel.com; t...@linutronix.de; mi.

RE: [PATCH v7 5/6] mfd: lpc_ich: Add Device IDs for Intel Apollo Lake PCH

> -Original Message- > From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com] > Sent: Thursday, September 29, 2016 7:09 PM > To: Tan, Jui Nee > Cc: heikki.kroge...@linux.intel.com; andriy.shevche...@linux.intel.com; > t...@linutronix.de; mi...@redhat.com;

[PATCH v9 3/6] x86/intel-ivi: Add Intel In-Vehicle Infotainment (IVI) systems used in cars support

to GPIO. Signed-off-by: Tan Jui Nee --- Changes in V9: - No change Changes in V8: - No change arch/x86/Kconfig | 8 1 file changed, 8 insertions(+) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index e2c1dcf..aa8928a 100644 --- a/arch/x86/Kconfig +++ b/arch/x86

[PATCH v9 0/6] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

orm/p2sb: New Primary to Sideband bridge support driver for Intel SOC's Tan Jui Nee (5): mfd: lpc_ich: Rename lpc-ich driver x86/intel-ivi: Add Intel In-Vehicle Infotainment (IVI) systems used in cars support mfd: move enum lpc_chipsets into lpc_ich.h mfd: lpc_ich: Add Device IDs for Int

[PATCH v9 2/6] mfd: lpc_ich: Rename lpc-ich driver

This patch follows the example of mfd/wm831x to rename the driver from "lpc_ich" to "lpc_ich_core". Signed-off-by: Tan Jui Nee --- Changes in V9: - Remove the filename from the header of lpc_ich_core.c (suggested by Lee). Changes in V8: -

[PATCH v9 4/6] mfd: move enum lpc_chipsets into lpc_ich.h

Move the enum's definition into a standalone header file which can be used wherever its definition is needed. Signed-off-by: Tan Jui Nee --- Changes in V9: - No change Changes in V8: - No change drivers/mfd/lpc_ich_core.c | 71

[PATCH v9 5/6] mfd: lpc_ich: Add Device IDs for Intel Apollo Lake PCH

Adding Intel codename Apollo Lake platform device IDs for PCH. Signed-off-by: Tan Jui Nee Acked-for-MFD-by: Lee Jones --- Changes in V9: - No change Changes in V8: - No change drivers/mfd/lpc_ich_core.c | 6 ++ include/linux/mfd/lpc_ich.h | 1 + 2 files changed, 7

[PATCH v9 1/6] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong, Jonathan Signed-off-by: Andy Shevchenko

[PATCH v9 6/6] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee --- Changes in V9: - No change Changes in V8: - Rename source file lpc_ich-apl.c to lpc_ich_apl.c (suggested by Mika). Changes in V7

[PATCH v11 2/6] mfd: lpc_ich: Rename lpc-ich driver

This patch follows the example of mfd/wm831x to rename the driver from "lpc_ich" to "lpc_ich_core". Signed-off-by: Tan Jui Nee Reviewed-by: Mika Westerberg --- Changes in V11: - No change Changes in V10: - No change Changes in V9: - Remove the file

[PATCH v11 0/6] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

or all gpio communities Changes in V2: - Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL" to fix kbuildbot error Andy Shevchenko (1): drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's Tan Jui Nee (5): mfd: lpc

[PATCH v11 4/6] mfd: move enum lpc_chipsets into lpc_ich.h

Move the enum's definition into a standalone header file which can be used wherever its definition is needed. Signed-off-by: Tan Jui Nee Reviewed-by: Mika Westerberg --- Changes in V11: - No change Changes in V10: - No change Changes in V9: - No change Changes in V8

[PATCH v11 5/6] mfd: lpc_ich: Add Device IDs for Intel Apollo Lake PCH

Adding Intel codename Apollo Lake platform device IDs for PCH. Signed-off-by: Tan Jui Nee Acked-for-MFD-by: Lee Jones --- Changes in V11: - No change Changes in V10: - No change Changes in V9: - No change Changes in V8: - No change drivers/mfd/lpc_ich_core.c

[PATCH v11 6/6] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee Reviewed-by: Mika Westerberg --- Changes in V11: - Remove duplicated object file lpc_ich-objs in Makefile. - Put p2sb.h header file

[PATCH v11 3/6] x86/intel-ivi: Add Intel In-Vehicle Infotainment (IVI) systems used in cars support

to GPIO. Signed-off-by: Tan Jui Nee Reviewed-by: Mika Westerberg --- Changes in V11: - Select CONFIG_P2SB when CONFIG_X86_INTEL_IVI is enabled instead of CONFIG_LPC_ICH is enabled. This is to fix kbuildbot error. Changes in V10: - No change Changes in V9

[PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong, Jonathan Signed-off-by: Andy Shevchenko

RE: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

> -Original Message- > From: Andy Shevchenko [mailto:andriy.shevche...@linux.intel.com] > Sent: Friday, November 18, 2016 7:22 PM > To: Tan, Jui Nee ; mika.westerb...@linux.intel.com; > heikki.kroge...@linux.intel.com; t...@linutronix.de; dvh...@infradead.org; > m

[PATCH v10 2/6] mfd: lpc_ich: Rename lpc-ich driver

This patch follows the example of mfd/wm831x to rename the driver from "lpc_ich" to "lpc_ich_core". Signed-off-by: Tan Jui Nee Reviewed-by: Mika Westerberg --- Changes in V10: - No change Changes in V9: - Remove the filename from the header of lpc_ich_core.

[PATCH v10 5/6] mfd: lpc_ich: Add Device IDs for Intel Apollo Lake PCH

Adding Intel codename Apollo Lake platform device IDs for PCH. Signed-off-by: Tan Jui Nee Acked-for-MFD-by: Lee Jones --- Changes in V10: - No change Changes in V9: - No change Changes in V8: - No change drivers/mfd/lpc_ich_core.c | 6 ++ include/linux/mfd

[PATCH v10 0/6] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

- Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL" to fix kbuildbot error Andy Shevchenko (1): drivers/platform/x86/p2sb: New Primary to Sideband bridge support driver for Intel SOC's Tan Jui Nee (5): mfd: lpc_ich: Rename lpc-ich driver x86/intel-ivi:

[PATCH v10 4/6] mfd: move enum lpc_chipsets into lpc_ich.h

Move the enum's definition into a standalone header file which can be used wherever its definition is needed. Signed-off-by: Tan Jui Nee Reviewed-by: Mika Westerberg --- Changes in V10: - No change Changes in V9: - No change Changes in V8: - No change drivers/mfd

[PATCH v10 6/6] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee Reviewed-by: Mika Westerberg --- Changes in V10: - No change Changes in V9: - No change Changes in V8: - Rename source file

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