Re: [PATCH] crypto: ccm - preserve the IV buffer

2017-11-02 Thread Tudor Ambarus
ccm_decrypt_done, req); Reviewed-by: Tudor Ambarus

Re: [PATCH 2/2] crypto: atmel-aes - Reset the controller before each use

2017-11-06 Thread Tudor Ambarus
Hi, Romain, On 10/31/2017 05:25 PM, Romain Izard wrote: When using the rfc4543(gcm(aes))) mode, the registers of the hardware engine are not empty after use. If the engine is not reset before its next use, the following results will be invalid. Always reset the hardware engine. Thanks for the

[RESEND PATCH v2 0/3] add support to non-uniform SFDP SPI NOR flash memories

2018-08-27 Thread Tudor Ambarus
rase types that can erase the entire memory - fix support for overlaid regions. Cyrille Pitchen (1): mtd: spi-nor: parse SFDP 4-byte Address Instruction Table Tudor Ambarus (2): mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories mtd: spi-nor: parse SFDP Sector Map Pa

[RESEND PATCH v2 3/3] mtd: spi-nor: parse SFDP 4-byte Address Instruction Table

2018-08-27 Thread Tudor Ambarus
the Base Address Register (BAR). Signed-off-by: Cyrille Pitchen Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/spi-nor.c | 148 ++ 1 file changed, 148 insertions(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index

[RESEND PATCH v2 2/3] mtd: spi-nor: parse SFDP Sector Map Parameter Table

2018-08-27 Thread Tudor Ambarus
: Tudor Ambarus --- drivers/mtd/spi-nor/spi-nor.c | 269 +++--- include/linux/mtd/spi-nor.h | 11 ++ 2 files changed, 264 insertions(+), 16 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index c1e8169..522d5aa 100644

[RESEND PATCH v2 1/3] mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories

2018-08-27 Thread Tudor Ambarus
come back to the uniform case. The 'erase with the best command, move forward and repeat' approach was suggested by Cristian Birsan in a brainstorm session, so: Suggested-by: Cristian Birsan Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/

Re: [PATCH v2 0/3] add support to non-uniform SFDP SPI NOR flash memories

2018-07-30 Thread Tudor Ambarus
As a side note, the SFDP code increases its size, it would make sense to move all SFDP logic into a spi-nor-sfdp.c file. I'm volunteering to do this after this patch set gets applied. Best, ta

[PATCH 0/2] i2c: enable buses to save their clock frequency in adapter

2018-08-01 Thread Tudor Ambarus
their own assumption of the clock frequency. Spare the i2c clients of making wrong assumptions of the i2c bus clock frequency and enable the buses to save their clock frequency in adapter. since rfc: - reword commit messages Tudor Ambarus (2): i2c: enable buses to save their clock frequency in ada

[PATCH 2/2] i2c: at91: Save the bus clock frequency in adapter

2018-08-01 Thread Tudor Ambarus
their own assumption of the clock frequency. Spare the i2c clients of making wrong assumptions of the i2c bus clock frequency and provide the bus clock frequency in adapter. Signed-off-by: Tudor Ambarus Acked-by: Ludovic Desroches --- drivers/i2c/busses/i2c-at91.c | 1 + 1 file changed, 1 insertio

[PATCH 1/2] i2c: enable buses to save their clock frequency in adapter

2018-08-01 Thread Tudor Ambarus
their own assumption of the clock frequency. Spare the i2c clients of making wrong assumptions of the i2c bus clock frequency and enable the buses to save their clock frequency in adapter. Signed-off-by: Tudor Ambarus --- include/linux/i2c.h | 1 + 1 file changed, 1 insertion(+) diff --git a/inc

[PATCH v2 0/3] add support to non-uniform SFDP SPI NOR flash memories

2018-07-12 Thread Tudor Ambarus
nd. Order erase types by size, iterate them from the biggest to the smallest and stop when best fitted command is found. - determine at init if there are erase types that can erase the entire memory - fix support for overlaid regions. Cyrille Pitchen (1): mtd: spi-nor: parse SFDP 4-byte A

[PATCH v2 2/3] mtd: spi-nor: parse SFDP Sector Map Parameter Table

2018-07-12 Thread Tudor Ambarus
: Tudor Ambarus --- drivers/mtd/spi-nor/spi-nor.c | 269 +++--- include/linux/mtd/spi-nor.h | 11 ++ 2 files changed, 264 insertions(+), 16 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 899b8c1..7c6291c 100644

[PATCH v2 1/3] mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories

2018-07-12 Thread Tudor Ambarus
come back to the uniform case. The 'erase with the best command, move forward and repeat' approach was suggested by Cristian Birsan in a brainstorm session, so: Suggested-by: Cristian Birsan Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/

[PATCH v2 3/3] mtd: spi-nor: parse SFDP 4-byte Address Instruction Table

2018-07-12 Thread Tudor Ambarus
the Base Address Register (BAR). Signed-off-by: Cyrille Pitchen Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/spi-nor.c | 148 ++ 1 file changed, 148 insertions(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index

Re: [PATCH 2/3] mtd: atmel nand: fix build warning on 64-bit

2018-07-13 Thread Tudor Ambarus
Hi, Arnd, On 07/09/2018 06:57 PM, Arnd Bergmann wrote: > + nc->ebi_csa_offs = (uintptr_t)match->data; I guess we should declare ebi_csa_offs as size_t, right? Best, ta

Re: [PATCH] crypto/ecc: Remove stack VLA usage

2018-03-08 Thread Tudor Ambarus
Hi, Kees, On 03/07/2018 11:56 PM, Kees Cook wrote: On the quest to remove all VLAs from the kernel[1], this switches to a pair of kmalloc regions instead of using the stack. This also moves the get_random_bytes() after all allocations (and drops the needless "nbytes" variable). [1] https://lkml

Re: [PATCH] crypto/ecc: Remove stack VLA usage

2018-03-09 Thread Tudor Ambarus
On 03/08/2018 11:55 PM, Kees Cook wrote: Looks like there are few intermediate buffers in ecc that should be zeroized as well. Can you send a patch for those? Yeah, I'll take a look. Best, ta

Re: [PATCH v2] crypto/ecc: Remove stack VLA usage

2018-03-09 Thread Tudor Ambarus
l.org/lkml/2018/3/7/621 Signed-off-by: Kees Cook Reviewed-by: Tudor Ambarus

Re: [PATCH] mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories

2018-07-09 Thread Tudor Ambarus
Hi, I will send a v2 in few days, together with the parsers for the optional SFDP tables: Sector Map Parameter table and 4-byte Address Instruction table. Below I detail what I'll change in v2 for this patch. On 06/08/2018 04:48 PM, Tudor Ambarus wrote: > Based on Cyrille Pitchen'

Re: [RFC PATCH 1/2] spi: Add QuadSPI driver for Atmel SAMA5D2

2018-06-26 Thread Tudor Ambarus
Hi, Piotr, General things to consider for the limitation in performance: - is the serial flash memory operating in Quad SPI? - QSCLK should be as high as possible - transfer delays - I checked them, they have default values, we should be good. - use DMA, as you suggested On 06/22/2018 10:39 AM, B

Re: [RFC PATCH 1/2] spi: Add QuadSPI driver for Atmel SAMA5D2

2018-06-28 Thread Tudor Ambarus
Hi, Piotr, On 06/27/2018 10:52 AM, Piotr Bugalski wrote: > >> General things to consider for the limitation in performance: >> - is the serial flash memory operating in Quad SPI? > > Yes, I've checked signal using logic analyzer, data is transferred using > all four lines. > >> - QSCLK should b

Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma

2018-05-25 Thread Tudor Ambarus
Hi, Peter, On 04/11/2018 06:34 PM, Nicolas Ferre wrote: I'll try to move forward with your detailed explanation and with my contacts within the "product" team internally. We have talked with the hardware team, looks like there is an error in the description of the Master to Slave Access matrix

Re: [PATCH v2] mtd: atmel-quadspi: add suspend/resume hooks

2018-07-04 Thread Tudor Ambarus
. Otherwise looks good. I've also looked over the test with suspending while copying on a ubifs mounted on QSPI NOR, looks good too. After checking the return value, please add: Reviewed-by: Tudor Ambarus Best, ta > + > + return atmel_qspi_init(aq); > +} > + > +stat

[RFC PATCH] mtd: spi-nor: add support to non-uniform SPI NOR flash memories

2018-05-18 Thread Tudor Ambarus
iss chunks of data when traversing the regions. - backward compatibility test done on MX25L25673G. The 'erase with the best command, move forward and repeat' approach was suggested by Cristian Birsan in a brainstorm session, so: ] Suggested-by: Cristian Birsan Signed-off-by: Tudor Ambar

Re: [PATCH v2 0/3] add support to non-uniform SFDP SPI NOR flash memories

2018-08-20 Thread Tudor Ambarus
Hi, Marek, Did you have the chance to look over these patches? Please advise how can I move forward with the non-uniform erase support. Thanks, ta On 07/12/2018 08:32 PM, Tudor Ambarus wrote: > Backward compatibility test done on mx25l3273fm2i-08g. > Non-uniform erase test done on sst26

Re: [RESEND PATCH 1/2] mtd: spi-nor: add macros related to MICRON flash

2018-10-08 Thread Tudor Ambarus
On 09/19/2018 07:50 AM, Yogesh Gaur wrote: > Some MICRON related macros in spi-nor domain were ST. > Rename entries related to STMicroelectronics under macro SNOR_MFR_ST. > > Added entry of MFR Id for Micron flashes, 0x002C. > > Signed-off-by: Yogesh Gaur Reviewed

Re: [PATCH v3 1/2] mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories

2018-10-16 Thread Tudor Ambarus
ards > Yogesh Gaur > >> -Original Message- >> From: linux-mtd [mailto:linux-mtd-boun...@lists.infradead.org] On Behalf Of >> Tudor Ambarus >> Sent: Tuesday, September 11, 2018 9:10 PM >> To: marek.va...@gmail.com; dw...@infradead.org; >&g

Re: [PATCH v3 1/2] mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories

2018-10-17 Thread Tudor Ambarus
Hi, Yogesh, On 10/17/2018 10:46 AM, Yogesh Narayan Gaur wrote: > Hi Boris, > >> -Original Message- >> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com] >> Sent: Wednesday, October 17, 2018 1:00 PM >> To: Yogesh Narayan Gaur >> Cc: Cyrille P

Re: [PATCH v2 2/2] mtd: spi-nor: add entry for mt35xu512aba flash

2018-10-11 Thread Tudor Ambarus
_4K | USE_FSR | SPI_NOR_4B_OPCODES) }, > + The style is slightly different from what Brian proposed back in 9648388fc7737365be7a8092e77df78ccc2cd1a4. For consistency reasons, I think we should use the same style in all entries. Since I verified the correctness of the patch and my comment targets just a cosmetic change, I'll let the maintainers decide: Reviewed-by: Tudor Ambarus

Re: [PATCH v3 1/2] mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories

2018-10-22 Thread Tudor Ambarus
Hi, Please amend this as well. Thanks! --- drivers/mtd/spi-nor/spi-nor.c | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 3a9b69e9ba6d..3019708696cd 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++

Re: [PATCH v3 1/2] mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories

2018-09-17 Thread Tudor Ambarus
Hi, Boris, On 09/11/2018 06:40 PM, Tudor Ambarus wrote: > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c [cut] > /* I missed to use the opening comment mark for kernel-doc comments: "/**". This observation applies to all newly introduced function

[PATCH 1/3] mtd: spi-nor: add Global Block Unlock support

2018-07-17 Thread Tudor Ambarus
Macronix's MX25U12835F names it Gang Block Unlock, Winbound's W25Q128FV names it Global Block Unlock and Microchip's SST26VF064B names it Global Block Protection Unlock. Based on initial work done by Anurag Kumar Vulisha: https://patchwork.kernel.org/patch/7611271/ Signed-off-by: Tu

[PATCH 3/3] mtd: spi-nor: add support for Microchip SST26 QSPI flash memories

2018-07-17 Thread Tudor Ambarus
The flash memories are write-protected by default at power-on and must be unlocked first, before being erased, then programmed. The erase block sizes are not uniform. The memory layout is uniform just for the 4K sector blocks. Based on initial work done by Cyrille Pitchen. Signed-off-by: Tudor

[PATCH 2/3] mtd: spi-nor: unlock global block protection on sst26vf064b

2018-07-17 Thread Tudor Ambarus
To avoid inadvertent writes during power-up, sst26vf064b is write-protected by default after a power-on reset cycle. Unlock the serial flash memory by using the Global Block Protection Unlock command - it offers a single command cycle that unlocks the entire memory array. Signed-off-by: Tudor

[PATCH] pinctrl: at91-pio4: Fix slew rate disablement

2021-04-09 Thread Tudor Ambarus
nctrl: at91-pio4: add support for slew-rate") Signed-off-by: Tudor Ambarus --- drivers/pinctrl/pinctrl-at91-pio4.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c index a5d328808e4c..4c

Re: [RFC PATCH] mtd: spi-nor: add support to non-uniform SPI NOR flash memories

2018-05-23 Thread Tudor Ambarus
Hi, Marek, On 05/23/2018 12:56 PM, Marek Vasut wrote: [...] [...] +while (len) { +cmd = spi_nor_find_best_erase_cmd(map, region, addr, len); +if (!cmd) +return -EINVAL; What would happen if you realize mid-way that you cannot erase some sector , do you end up w

Re: [RFC PATCH] mtd: spi-nor: add support to non-uniform SPI NOR flash memories

2018-05-24 Thread Tudor Ambarus
Hi, Marek, On 05/23/2018 03:54 PM, Marek Vasut wrote: On 05/23/2018 02:52 PM, Tudor Ambarus wrote: Hi, Marek, Hi, On 05/23/2018 12:56 PM, Marek Vasut wrote: [...] [...] +while (len) { +cmd = spi_nor_find_best_erase_cmd(map, region, addr, len); +if (!cmd

Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma

2018-06-04 Thread Tudor Ambarus
Hi, Peter, On 05/28/2018 01:10 PM, Peter Rosin wrote: [cut] So, I think I want either A) the NAND controller to use master 1 DMAC0/IF0 (i.e. slave 8 DDR2 port 2) and the LCDC to use master 9 (i.e. slave 9 DDR2 Port 3) or B) the NAND controller to use master 2 DMAC0/IF1 (i.e. slave 7 DDR

Re: [PATCH v2 1/2] crypto: ccree: enable support for hardware keys

2018-04-25 Thread Tudor Ambarus
Hi, Gilad, On 04/23/2018 10:25 AM, Gilad Ben-Yossef wrote: Enable CryptoCell support for hardware keys. Hardware keys are regular AES keys loaded into CryptoCell internal memory via firmware, often from secure boot ROM or hardware fuses at boot time. As such, they can be used for enc/dec purpo

[PATCH] clk: Mark fwnodes when their clock provider is added

2021-02-10 Thread Tudor Ambarus
This is a follow-up for: commit 3c9ea42802a1 ("clk: Mark fwnodes when their clock provider is added/removed") The above commit updated the deprecated of_clk_add_provider(), but missed to update the preferred of_clk_add_hw_provider(). Update it now. Signed-off-by: Tudor Ambarus --- d

[PATCH] clk: Mark fwnodes when their clock provider is added

2021-02-10 Thread Tudor Ambarus
This is a follow-up for: commit 3c9ea42802a1 ("clk: Mark fwnodes when their clock provider is added/removed") The above commit updated the deprecated of_clk_add_provider(), but missed to update the preferred of_clk_add_hw_provider(). Update it now. Signed-off-by: Tudor Ambarus --- d

[PATCH] spi: atmel-quadspi: Disable the QSPI IP at suspend()

2021-02-10 Thread Tudor Ambarus
It is safer to disable the QSPI IP at suspend, in order to avoid possible impact of glitches on the internal FSMs. This is a theoretical fix, there were no problems seen as of now. Tested on sama5d2 and sam9x60 versions of the IP. Signed-off-by: Tudor Ambarus --- drivers/spi/atmel-quadspi.c | 1

[PATCH] spi: spi-ti-qspi: Free DMA resources

2021-02-18 Thread Tudor Ambarus
Release the RX channel and free the dma coherent memory when devm_spi_register_master() fails Signed-off-by: Tudor Ambarus --- drivers/spi/spi-ti-qspi.c | 20 ++-- 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti

[PATCH v2] spi: spi-ti-qspi: Free DMA resources

2021-02-18 Thread Tudor Ambarus
Release the RX channel and free the dma coherent memory when devm_spi_register_master() fails. Fixes: 5720ec0a6d26 ("spi: spi-ti-qspi: Add DMA support for QSPI mmap read") Cc: sta...@vger.kernel.org Signed-off-by: Tudor Ambarus --- v2: Add Fixes tag and Cc stable. drivers/spi/spi

[PATCH] spi: atmel: Drop unused variable

2021-02-18 Thread Tudor Ambarus
The DMA cap mask is no longer used since: commit 7758e390699f ("spi: atmel: remove compat for non DT board when requesting dma chan") Drop it now. Signed-off-by: Tudor Ambarus --- drivers/spi/spi-atmel.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/spi/spi-atmel.c

[PATCH] clk: at91: Fix the declaration of the clocks

2021-02-03 Thread Tudor Ambarus
he timers caused the fail at boot. Signed-off-by: Tudor Ambarus --- Tested on sama5d2_xplained. drivers/clk/at91/at91rm9200.c | 3 +-- drivers/clk/at91/at91sam9260.c | 16 drivers/clk/at91/at91sam9g45.c | 3 +-- drivers/clk/at91/at91sam9n12.c | 3 +-- drivers/clk/at9

[PATCH] mtd: spi-nor: Get rid of duplicated argument in spi_nor_parse_sfdp()

2021-02-04 Thread Tudor Ambarus
n't copy self-pointing struct around")' Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/core.c | 10 ++-- drivers/mtd/spi-nor/core.h | 6 +-- drivers/mtd/spi-nor/issi.c | 3 +- drivers/mtd/spi-nor/macronix.c | 3 +- drivers/mtd/spi-nor/sfdp.c | 87 +--

Re: [PATCH v3 1/2] mtd: spi-nor: Add Global Block Unlock command

2021-02-05 Thread Tudor Ambarus
On Thu, 21 Jan 2021 13:05:45 +0200, Tudor Ambarus wrote: > The Global Block Unlock command has different names depending > on the manufacturer, but always the same command value: 0x98. > Macronix's MX25U12835F names it Gang Block Unlock, Winbond's > W25Q128FV names it G

[PATCH 1/4] spi: atmel-quadspi: Fix AHB memory accesses

2020-12-07 Thread Tudor Ambarus
r sama5d2 and to '1' for sam9x60. Fix the setting of the QSPI_IFR.TFRTYP field. Fixes: 2d30ac5ed633 ("mtd: spi-nor: atmel-quadspi: Use spi-mem interface for atmel-quadspi driver") Cc: # v5.0+ Reported-by: Tom Burkart Signed-off-by: Tudor Ambarus --- drivers/spi/atmel-q

[PATCH 0/4] spi: atmel-quadspi: Fix AHB memory accesses

2020-12-07 Thread Tudor Ambarus
. Tested on both sama5d2 and sam9x60. Tudor Ambarus (4): spi: atmel-quadspi: Fix AHB memory accesses spi: atmel-quadspi: Drop superfluous set of QSPI_IFR_APBTFRTYP_READ spi: atmel-quadspi: Write QSPI_IAR only when needed spi: atmel-quadspi: Move common code outside of if else drivers/spi

[PATCH 2/4] spi: atmel-quadspi: Drop superfluous set of QSPI_IFR_APBTFRTYP_READ

2020-12-07 Thread Tudor Ambarus
That bit describes the APB transfer type. We are writing serial memory registers via AHB acesses, that bit does not make sense in the current context. Signed-off-by: Tudor Ambarus --- drivers/spi/atmel-quadspi.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/spi/atmel-quadspi.c b

[PATCH 3/4] spi: atmel-quadspi: Write QSPI_IAR only when needed

2020-12-07 Thread Tudor Ambarus
The address must be written in QSPI_IAR only when we have a instruction frame with address but no data. Signed-off-by: Tudor Ambarus --- drivers/spi/atmel-quadspi.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel

[PATCH 4/4] spi: atmel-quadspi: Move common code outside of if else

2020-12-07 Thread Tudor Ambarus
QSPI_IFR is set as the last QSPI Instruction Frame register regardless of the sama5d2 or sam9x60 version of the IP. Move the writing of QSPI_IFR outside of the IP specific code. Signed-off-by: Tudor Ambarus --- drivers/spi/atmel-quadspi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions

[PATCH v3 1/2] mtd: spi-nor: Move Software Write Protection logic out of the core

2021-03-22 Thread Tudor Ambarus
It makes the core file a bit smaller and provides better separation between the Software Write Protection features and the core logic. All the next generic software write protection features (e.g. Individual Block Protection) will reside in swp.c. Signed-off-by: Tudor Ambarus --- v3: - Add

[PATCH v3 2/2] mtd: spi-nor: swp: Improve code around spi_nor_check_lock_status_sr()

2021-03-22 Thread Tudor Ambarus
- bool return value for spi_nor_check_lock_status_sr(), gets rid of the return 1, - introduce temporary variables for better readability. Suggested-by: Joe Perches Signed-off-by: Tudor Ambarus --- v3: new patch drivers/mtd/spi-nor/swp.c | 27 +++ 1 file changed, 15

[PATCH v3 0/2] mtd: spi-nor: Cleanup patches

2021-03-22 Thread Tudor Ambarus
Various cleanup patches done while reviewing contributions. Tudor Ambarus (2): mtd: spi-nor: Move Software Write Protection logic out of the core mtd: spi-nor: swp: Improve code around spi_nor_check_lock_status_sr() drivers/mtd/spi-nor/Makefile | 2 +- drivers/mtd/spi-nor/core.c | 406

[PATCH] mtd: rawnand: atmel: Update ecc_stats.corrected counter

2021-03-22 Thread Tudor Ambarus
From: "Kai Stuhlemmer (ebee Engineering)" Update MTD ECC statistics with the number of corrected bits. Fixes: f88fc122cc34 ("mtd: nand: Cleanup/rework the atmel_nand driver") Cc: sta...@vger.kernel.org Signed-off-by: Kai Stuhlemmer (ebee Engineering) Signed-off-by: Tudor A

Re: [PATCH v5 0/3] mtd: spi-nor: OTP support

2021-04-01 Thread Tudor Ambarus
r: winbond: add OTP support to w25q32fw/jw https://git.kernel.org/mtd/c/5909dde2bc53 Best regards, -- Tudor Ambarus

Re: [PATCH v3 0/2] mtd: spi-nor: Cleanup patches

2021-04-01 Thread Tudor Ambarus
On Mon, 22 Mar 2021 09:51:29 +0200, Tudor Ambarus wrote: > Various cleanup patches done while reviewing contributions. > > Tudor Ambarus (2): > mtd: spi-nor: Move Software Write Protection logic out of the core > mtd: spi-nor: swp: Improve code around spi_nor_check

[PATCH 0/2] mtd: spi-nor: macronix: mx25l51245g, mx66l51235l and mx66l51235f

2021-04-02 Thread Tudor Ambarus
erase should be discovered when parsing BFPT, so there's no need to set the explicit SECT_4K flag. Tudor Ambarus (2): Revert "mtd: spi-nor: macronix: Add support for mx25l51245g" mtd: spi-nor: macronix: Fix name for mx66l51235f drivers/mtd/spi-nor/macronix.c | 5 + 1 file chang

[PATCH 1/2] Revert "mtd: spi-nor: macronix: Add support for mx25l51245g"

2021-04-02 Thread Tudor Ambarus
ronix: Add support for mx25l51245g") Cc: sta...@vger.kernel.org Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/macronix.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 6c2680b4cdad..42c2cf31702e 100644 --- a/drive

[PATCH 2/2] mtd: spi-nor: macronix: Fix name for mx66l51235f

2021-04-02 Thread Tudor Ambarus
According to macronix website, there is no mx66l51235l part number. The chip detected as such is actually mx66l51235f. Rename the flash. Do not update the mx66l51235l name from the spi_nor_dev_ids[], since there are dt that are using this compatible. Signed-off-by: Tudor Ambarus --- drivers/mtd

Re: [PATCH] mtd: spi-nor: Update comment about the default flash parameters

2021-03-16 Thread Tudor Ambarus
On Mon, 15 Mar 2021 07:56:34 +0200, Tudor Ambarus wrote: > s/legacy/default. spi_nor_info_init_params initializes some default > flash parameters and settings that can be overwritten when parsing > SFDP, or by fixup hooks. There's nothing legacy about them, they are > just some

Re: (subset) [PATCH v2 0/5] mtd: spi-nor: Cleanup patches

2021-03-16 Thread Tudor Ambarus
On Sat, 6 Mar 2021 11:49:57 +0200, Tudor Ambarus wrote: > Various cleanup patches done while reviewing contributions. > > Tudor Ambarus (5): > mtd: spi-nor: core: Advance erase after the erase cmd has been > completed > mtd: spi-nor: core: Add vdbg msg for spi_nor_e

Re: (subset)[PATCH 0/2] mtd: spi-nor: macronix: mx25l51245g, mx66l51235l and mx66l51235f

2021-04-11 Thread Tudor Ambarus
On Fri, 2 Apr 2021 11:20:29 +0300, Tudor Ambarus wrote: > mx25l51245g and mx66l51235l have the same flash ID. The flash > detection returns the first entry in the flash_info array that > matches the flash ID that was read, thus for the 0xc2201a ID, > mx25l51245g was always hit, i

[PATCH] mtd: core: Constify buf in mtd_write_user_prot_reg()

2021-04-02 Thread Tudor Ambarus
function prototype that is used for both reads and writes. mtd_dataflash and SPI NOR will benefit of the const buffer because they are using different paths for writes and reads. Signed-off-by: Tudor Ambarus --- drivers/mtd/chips/cfi_cmdset_0001.c | 7 --- drivers/mtd/chips/cfi_cmdset_0002

[PATCH] spi: Limit the spi device max speed to controller's max speed

2020-12-09 Thread Tudor Ambarus
Make sure the max_speed_hz of spi_device does not override the max_speed_hz of controller. Signed-off-by: Tudor Ambarus --- drivers/spi/spi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index cd3c395b4e90..51d7c004fbab 100644 --- a

[PATCH] mtd: spi-nor: Update comment about the default flash parameters

2021-03-14 Thread Tudor Ambarus
s/legacy/default. spi_nor_info_init_params initializes some default flash parameters and settings that can be overwritten when parsing SFDP, or by fixup hooks. There's nothing legacy about them, they are just some default settings, if not otherwise discovered or specified. Signed-off-by:

[PATCH 2/2] mtd: spi-nor: sst: Add support for Global Unlock on sst26vf

2021-01-20 Thread Tudor Ambarus
when MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y. Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/sst.c | 38 -- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 00e48da0744a..1cd2a360c41e 100644

[PATCH 1/2] mtd: spi-nor: Add Global Block Unlock command

2021-01-20 Thread Tudor Ambarus
otection Unlock. Used in the Individual Block Protection mode, which is mutual exclusive with the Block Protection mode (BP0-3). Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/core.c | 35 +++ drivers/mtd/spi-nor/core.h | 1 + include/linux/mtd/spi-nor.h

[PATCH v2 1/2] mtd: spi-nor: Add Global Block Unlock command

2021-01-20 Thread Tudor Ambarus
otection Unlock. Used in the Individual Block Protection mode, which is mutually exclusive with the Block Protection mode (BP0-3). Signed-off-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- v2: - s/mutual/mutually/ - set the GBULK cmd buswidth to 0 and call spi_nor_spimem_setup_op() to update the

[PATCH v2 2/2] mtd: spi-nor: sst: Add support for Global Unlock on sst26vf

2021-01-20 Thread Tudor Ambarus
when MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y. Signed-off-by: Tudor Ambarus --- v2: s/!ofs/ofs == 0/ drivers/mtd/spi-nor/sst.c | 38 -- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 00e48da

[PATCH v3 1/2] mtd: spi-nor: Add Global Block Unlock command

2021-01-21 Thread Tudor Ambarus
n Unlock. Used in the Individual Block Protection mode, which is mutually exclusive with the Block Protection mode (BP0-3). Signed-off-by: Tudor Ambarus Reviewed-by: Pratyush Yadav Reviewed-by: Michael Walle --- v3: - s/Winbound/Winbond - Add Michael's R-b tag v2: - s/mutual/mutually/

[PATCH v3 2/2] mtd: spi-nor: sst: Add support for Global Unlock on sst26vf

2021-01-21 Thread Tudor Ambarus
when MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y. Signed-off-by: Tudor Ambarus --- v3: - s/Winbound/Winbond/ - read CR.BPNV and check if we can really unlock the entire flash array - sst26vf_unlock: return -EINVAL instead of -EOPNOTSUPP when caller asks to unlock a range/granularity that we can't unlock v2:

[PATCH v2 0/5] mtd: spi-nor: Cleanup patches

2021-03-06 Thread Tudor Ambarus
Various cleanup patches done while reviewing contributions. Tudor Ambarus (5): mtd: spi-nor: core: Advance erase after the erase cmd has been completed mtd: spi-nor: core: Add vdbg msg for spi_nor_erase_multi_sectors() mtd: spi-nor: Get rid of duplicated argument in spi_nor_parse_sfdp

[PATCH v2 3/5] mtd: spi-nor: Get rid of duplicated argument in spi_nor_parse_sfdp()

2021-03-06 Thread Tudor Ambarus
n't copy self-pointing struct around")' Signed-off-by: Tudor Ambarus --- v2: Add params local variable in spi_nor_parse_4bait(), because params is used in multiple locations. drivers/mtd/spi-nor/core.c | 10 ++--- drivers/mtd/spi-nor/core.h | 6 +-- drivers/mtd/spi-nor/issi.c

[PATCH v2 2/5] mtd: spi-nor: core: Add vdbg msg for spi_nor_erase_multi_sectors()

2021-03-06 Thread Tudor Ambarus
Useful when debugging non-uniform erase. Signed-off-by: Tudor Ambarus --- v2: - s/dev_dbg/dev_vdb - move vdbg message the first thing in the while drivers/mtd/spi-nor/core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index

[PATCH v2 1/5] mtd: spi-nor: core: Advance erase after the erase cmd has been completed

2021-03-06 Thread Tudor Ambarus
addr and len were gratuitously updated even when spi_nor_wait_till_ready() failed. Wait for the erase cmd to complete and then advance the erase. Signed-off-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- v2: - update commit message - Add R-b tag drivers/mtd/spi-nor/core.c | 12

[PATCH v2 4/5] mtd: spi-nor: Move Software Write Protection logic out of the core

2021-03-06 Thread Tudor Ambarus
It makes the core file a bit smaller and provides better separation between the Software Write Protection features and the core logic. All the next generic software write protection features (e.g. Individual Block Protection) will reside in swp.c. Signed-off-by: Tudor Ambarus --- drivers/mtd

[PATCH v2 5/5] mtd: spi-nor: swp: Drop 'else' after 'return'

2021-03-06 Thread Tudor Ambarus
else is not generally useful after a break or return. Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/swp.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c index 75b9bb53d584..c35cb3becb41 100644 --- a

Re: [PATCH v2] mtd: spi-nor: winbond: Add support for w25q512jvq

2021-03-07 Thread Tudor Ambarus
or > read/write respectly, and flash_erase for erasing the flash. Applied to spi-nor/next, thanks! [1/1] mtd: spi-nor: winbond: Add support for w25q512jvq https://git.kernel.org/mtd/c/ff013330fbdb Best regards, -- Tudor Ambarus

Re: [PATCH] mtd: spi-nor: use is_power_of_2()

2021-03-07 Thread Tudor Ambarus
On Sat, 6 Mar 2021 00:45:52 +0100, Michael Walle wrote: > There is already a function to check if an integer is a power of 2. Use > it. Applied to spi-nor/next, thanks! [1/1] mtd: spi-nor: use is_power_of_2() https://git.kernel.org/mtd/c/04fc298c7d08 Best regards, -- Tudor Ambarus

Re: [PATCH v1 1/1] mtd: spi-nor: intel-spi: Move platform data header to x85 subfolder

2021-03-07 Thread Tudor Ambarus
: spi-nor: intel-spi: Move platform data header to x85 subfolder https://git.kernel.org/mtd/c/ae2177cf318d Best regards, -- Tudor Ambarus

[PATCH] MAINTAINERS: Add Michael and Pratyush as designated reviewers for SPI NOR

2021-03-08 Thread Tudor Ambarus
It's already been the case for some time that Michael and Pratyush are reviewing SPI NOR patches. Update MAINTAINERS to reflect reality. Signed-off-by: Tudor Ambarus --- Michael, Pratyush, please send your Acked-by tags if you agree. MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+)

[PATCH] MAINTAINERS: Add Michael and Pratyush as designated reviewers for SPI NOR

2021-03-08 Thread Tudor Ambarus
It's already been the case for some time that Michael and Pratyush are reviewing SPI NOR patches. Update MAINTAINERS to reflect reality. Signed-off-by: Tudor Ambarus --- Michael, Pratyush, please send your Acked-by tags if you agree. MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+)

Re: [PATCH] MAINTAINERS: Add Michael and Pratyush as designated reviewers for SPI NOR

2021-03-08 Thread Tudor Ambarus
On Mon, 8 Mar 2021 11:23:33 +0200, Tudor Ambarus wrote: > It's already been the case for some time that Michael and Pratyush > are reviewing SPI NOR patches. Update MAINTAINERS to reflect reality. Applied to spi-nor/next, thanks! [1/1] MAINTAINERS: Add Michael and Pratyush as

[PATCH 2/2] mtd: spi-nor: core: Add dbg msg for spi_nor_erase_multi_sectors()

2021-02-05 Thread Tudor Ambarus
Useful when debugging non-uniform erase. Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index bcaa161bc7db..7401c60b53e6 100644 --- a/drivers/mtd/spi-nor/core.c +++ b

[PATCH 1/2] mtd: spi-nor: core: Advance erase after the erase cmd has been completed

2021-02-05 Thread Tudor Ambarus
Wait for the erase cmd to complete and then advance the erase. Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/core.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 0522304f52fa..bcaa161bc7db

Re: [PATCH] mtd: spi-nor: hisi-sfc: Put child node np on error path

2021-01-24 Thread Tudor Ambarus
On Thu, 21 Jan 2021 01:18:47 -0800, Pan Bian wrote: > Put the child node np when it fails to get or register device. Applied to spi-nor/next, thanks! [1/1] mtd: spi-nor: hisi-sfc: Put child node np on error path https://git.kernel.org/mtd/c/fe6653460ee7 Best regards, -- Tudor Ambarus

[PATCH] clk: at91: sama5d2: Mark device OF_POPULATED after setup

2021-01-28 Thread Tudor Ambarus
again. Fixes: e590474768f1cc04 ("driver core: Set fw_devlink=on by default") Signed-off-by: Tudor Ambarus --- I'll be out of office, will check the rest of the at91 SoCs at the begining of next week. drivers/clk/at91/sama5d2.c | 2 ++ 1 file changed, 2 insertions(+) diff --gi

[PATCH] spi: Fix the clamping of spi->max_speed_hz

2020-12-16 Thread Tudor Ambarus
id a superfluous init to zero when both spi->max_speed_hz and spi->controller->max_speed_hz are zero. Fixes: 9326e4f1e5dd ("spi: Limit the spi device max speed to controller's max speed") Reported-by: Geert Uytterhoeven Suggested-by: Geert Uytterhoeven Signed-off-by: Tudor A

[PATCH] lib: asn1_decoder - add MODULE_LICENSE("GPL")

2016-04-29 Thread Tudor Ambarus
tary module has been inserted, which is not the case here. Signed-off-by: Tudor Ambarus --- lib/asn1_decoder.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lib/asn1_decoder.c b/lib/asn1_decoder.c index 2b3f46c..b1ffcab 100644 --- a/lib/asn1_decoder.c +++ b/lib/asn1_decoder.c @@ -12,

Re: [PATCH] mtd: spi-nor: cadence-quadspi: Use proper enum for dma_unmap_single

2018-09-25 Thread Tudor Ambarus
Hi, Nathan, On 09/21/2018 01:29 PM, Nathan Chancellor wrote: > Clang warns when one enumerated type is converted implicitly to another. > > drivers/mtd/spi-nor/cadence-quadspi.c:962:47: warning: implicit > conversion from enumeration type 'enum dma_transfer_direction' to > different enumeration t

Re: [PATCH] mtd: spi-nor: cadence-quadspi: Use proper enum for dma_unmap_single

2018-09-25 Thread Tudor Ambarus
On 09/25/2018 10:34 AM, Nathan Chancellor wrote: > On Tue, Sep 25, 2018 at 10:24:04AM +0300, Tudor Ambarus wrote: >> Hi, Nathan, >> >> On 09/21/2018 01:29 PM, Nathan Chancellor wrote: >>> Clang warns when one enumerated type is converted implicitly to anothe

Re: [RESEND PATCH v2 1/3] mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories

2018-09-07 Thread Tudor Ambarus
Thanks Marek, On 09/03/2018 08:37 PM, Marek Vasut wrote: > On 08/27/2018 12:26 PM, Tudor Ambarus wrote: > [...] > >> +/* JEDEC JESD216B Standard imposes erase sizes to be power of 2. */ >> +static inline u64 >> +spi_nor_div_by_erase_size(const struc

Re: [RESEND PATCH v2 2/3] mtd: spi-nor: parse SFDP Sector Map Parameter Table

2018-09-07 Thread Tudor Ambarus
On 09/03/2018 08:40 PM, Marek Vasut wrote: > On 08/27/2018 12:26 PM, Tudor Ambarus wrote: > [...] >> +static const u32 *spi_nor_get_map_in_use(struct spi_nor *nor, const u32 >> *smpt) >> +{ >> +const u32 *ret = NULL; >> +u32 i, addr; >> +i

[PATCH 2/2] ARM: dts: at91: at91sam9x5cm: fix addressable nand flash size

2018-10-02 Thread Tudor Ambarus
at91sam9x5cm comes with a 2Gb NAND flash. Fix the rootfs size to match this limit. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91sam9x5cm.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi

[PATCH 1/2] ARM: dts: at91: sama5d4_xplained: fix addresable nand flash size

2018-10-02 Thread Tudor Ambarus
sama5d4_xplained comes with a 4Gb NAND flash. Increase the rootfs size to match this limit. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d4_xplained.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91-sama5d4_xplained.dts b/arch/arm

[PATCH v2 1/2] ARM: dts: at91: sama5d4_xplained: fix addressable nand flash size

2018-10-02 Thread Tudor Ambarus
sama5d4_xplained comes with a 4Gb NAND flash. Increase the rootfs size to match this limit. Signed-off-by: Tudor Ambarus Acked-by: Ludovic Desroches --- v2: - fix typo in subject line - collect Ludovic's Acked-by arch/arm/boot/dts/at91-sama5d4_xplained.dts | 2 +- 1 file changed, 1 inse

[PATCH v2 2/2] ARM: dts: at91: at91sam9x5cm: fix addressable nand flash size

2018-10-02 Thread Tudor Ambarus
at91sam9x5cm comes with a 2Gb NAND flash. Fix the rootfs size to match this limit. Signed-off-by: Tudor Ambarus Acked-by: Ludovic Desroches --- v2: - collect Ludovic's Acked-by arch/arm/boot/dts/at91sam9x5cm.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arc

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