sam9x5cm, sama5d2_ptc_ek, sama5d3_xplained and sama5d4_xplained nand
flashes have a common memory map. Even the nand memory partitions to
match our nand flash map available at:
http://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections//demo_nandflash_map_lnx4sam5x.png
Signed-off-by: Tudor
The offsets for the bootloader environment and its redundant partition
were inverted. Fix the addresses to match our nand flash map available at:
http://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections//demo_nandflash_map_lnx4sam5x.png
Signed-off-by: Tudor Ambarus
---
arch/arm/boot/dts
sam9x5cm, sama5d2_ptc_ek, sama5d3_xplained and sama5d4_xplained nand
flashes have a common memory map. Even the nand memory partitions to
match our NAND flash map available at:
http://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections//demo_nandflash_map_lnx4sam5x.png
Tudor Ambarus (4):
ARM
sama5d3_xplained, sam9x5cm, sama5d2_ptc_ek and sama5d4_xplained nand
flashes have a common memory map. Even the nand memory partitions to
match our nand flash map available at:
http://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections//demo_nandflash_map_lnx4sam5x.png
Signed-off-by: Tudor
sama5d4_xplained, ssam9x5cm, sama5d2_ptc_ek and sama5d3_xplained nand
flashes have a common memory map. Even the nand memory partitions to
match our NAND flash map available at:
http://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections//demo_nandflash_map_lnx4sam5x.png
Signed-off-by: Tudor
o, we better don't take any chances and fix this by null
> checking pointer *nfc_np* before calling of_clk_get().
>
> Addresses-Coverity-ID: 1473052 ("Dereference null return value")
> Fixes: f88fc122cc34 ("mtd: nand: Cleanup/rework the atmel_nand driver")
Hi,
On 09/19/2018 07:50 AM, Yogesh Gaur wrote:
> Add entry for mt35xu512aba Micron NOR flash.
> This flash is having uniform sector erase size of 128KB, have
> support of FSR(flag status register), flash size is 64MB and
> supports 4-byte commands.
>
Seems that the datasheet for mt35xu512aba is
Hi,
On 09/19/2018 07:50 AM, Yogesh Gaur wrote:
> Some MICRON related macros in spi-nor domain were ST.
> Rename entries related to STMicroelectronics under macro SNOR_MFR_ST.
>
> Added entry of MFR Id for Micron flashes, 0x002C.
>
> Signed-off-by: Yogesh Gaur
> ---
> drivers/mtd/spi-nor/spi-no
>>> diff --git a/drivers/mtd/spi-nor/spi-nor.c
>>> @@ -271,6 +271,7 @@ static inline int set_4byte(struct spi_nor *nor, const
>> struct flash_info *info,
>>> u8 cmd;
>>>
>>> switch (JEDEC_MFR(info)) {
>>> + case SNOR_MFR_ST:
>>
>> We should mark switch cases where we are expecting to fa
Marek,
On 09/07/2018 11:31 PM, Marek Vasut wrote:
> On 09/07/2018 10:51 AM, Tudor Ambarus wrote:
>> Thanks Marek,
>>
>> On 09/03/2018 08:37 PM, Marek Vasut wrote:
>>> On 08/27/2018 12:26 PM, Tudor Ambarus wrote:
>>> [...]
>>>
>>>> +/*
The flash memories are write-protected by default at power-on and
must be unlocked first, before being erased, then programmed.
The erase block sizes are not uniform. The memory layout is uniform
just for the 4K sector blocks.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/spi-nor.c | 20
Cyrille's reviewed-by tag
- add cover letter
- fix link to initial work done by Anurag Kumar Vulisha
Tudor Ambarus (3):
mtd: spi-nor: add Global Block Unlock support
mtd: spi-nor: unlock global block protection on sst26vf064b
mtd: spi-nor: add support for Microchip SST26 QSPI flash mem
To avoid inadvertent writes during power-up, sst26vf064b is
write-protected by default after a power-on reset cycle.
Unlock the serial flash memory by using the Global Block Protection
Unlock command - it offers a single command cycle that unlocks
the entire memory array.
Signed-off-by: Tudor
Macronix's MX25U12835F names it Gang Block Unlock,
Winbound's W25Q128FV names it Global Block Unlock and
Microchip's SST26VF064B names it Global Block Protection Unlock.
Based on initial work done by Anurag Kumar Vulisha:
https://lkml.org/lkml/2015/11/13/307
Signed-off-by: Tudor Amba
come back to the uniform case.
The 'erase with the best command, move forward and repeat' approach was
suggested by Cristian Birsan in a brainstorm session, so:
Suggested-by: Cristian Birsan
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/
: Tudor Ambarus
---
drivers/mtd/spi-nor/spi-nor.c | 316 +++---
include/linux/mtd/spi-nor.h | 12 ++
2 files changed, 312 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 4687345..fbefcdb 100644
command is found.
- determine at init if there are erase types that can erase the entire
memory
- fix support for overlaid regions.
Tudor Ambarus (2):
mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories
mtd: spi-nor: parse SFDP Sector Map Parameter Table
drivers/mtd/spi-nor/sp
come back to the uniform case.
The 'erase with the best command, move forward and repeat' approach was
suggested by Cristian Birsan in a brainstorm session, so:
Suggested-by: Cristian Birsan
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/
ted once we validate
that the erase can be performed
- fix walking through the address space in overlaid regions
- drop wall-of-text description commit message, change author
Tudor Ambarus (1):
mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories
drivers/mtd/spi
Hi, Marek,
On 05/21/2018 02:35 PM, Marek Vasut wrote:
On 05/18/2018 11:32 AM, Tudor Ambarus wrote:
From: Cyrille Pitchen
This patch is a first step in introducing the support of SPI memories
with non-uniform erase sizes like Spansion s25fs512s.
It introduces the memory erase map which
Hi, Marek,
On 05/21/2018 07:59 PM, Marek Vasut wrote:
On 05/21/2018 06:42 PM, Tudor Ambarus wrote:
Hi, Marek,
[...]
This is a transitional patch: non-uniform erase maps will be used later
when initialized based on the SFDP data.
What about non-SFDP non-linear flashes ?
Non-SFDP non
On 05/07/2018 08:14 PM, Marek Vasut wrote:
But indeed there are -- to my knowledge -- no flashes with interleaved
erase blocks. And yes, there could be improvement in erasing exactly the
required chunk of flash with a fitting opcode:)
Thanks Marek.
Other improvement would be to minimize the a
Hi, Marek, all,
I'm studying Cyrille's patch for non-uniform SPI NOR flash memories:
https://lkml.org/lkml/2017/4/15/70.
It's not clear to me whether interleaved regions are possible or not. I
read the JEDEC Standard No. 216B and it looks like each region is well
delimited, there is no such thin
nd: Add support for w25q64jvm
https://git.kernel.org/mtd/c/0ee2872f10
Best regards,
--
Tudor Ambarus
nd to the mtd device and
> the 'flash_erase' command.
Applied to spi-nor/next, thanks!
[1/1] mtd: spi-nor: macronix: Add support for MX25R1635F
https://git.kernel.org/mtd/c/482dcb2a04
Best regards,
--
Tudor Ambarus
t are set via a non-volatile bit.
SPI_NOR_IO_MODE_EN_VOLATILE should be set just for the flashes that
don't define the optional SFDP SCCR Map, so that we don't pollute the
flash info flags.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/core.c | 6 ++
drivers/mtd/spi-nor/core.
avoid this way polluting the flash flags when declaring
one.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/sfdp.c | 52 ++
1 file changed, 52 insertions(+)
diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
index f192710aca31..7bca64cbba
My biggest concern with Pratyush's patches is that the stateful modes case
(X-X-X modes that are entered via a non-volatile bit) is not handled.
This is an attempt to tackle this problem. Reasons and explanations in
the commit messages.
Tudor Ambarus (3):
mtd: spi-nor: Intr
flash from a stateful
mode in kernel, entering the stateful mode is still dangerous if one's
bootloader can't handle it. We need a way to pass the responsibility
to the user and let him decide conciously about the risks of allowing
stateful modes.
Signed-off-by: Tudor Ambarus
---
WRDI command
https://git.kernel.org/mtd/c/44a80df4bfce
Best regards,
--
Tudor Ambarus
mtd: spi-nor: update read capabilities for w25q64 and s25fl064k
https://git.kernel.org/mtd/c/99eae48fd4c5
Best regards,
--
Tudor Ambarus
write speed is 4524 KiB/s
mtd_speedtest: eraseblock read speed is 21186 KiB/s
Signed-off-by: Tudor Ambarus
---
drivers/spi/Kconfig | 2 +-
drivers/spi/atmel-quadspi.c | 8
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi
The industry refers to these flash types as "SPI NOR" and
"SPI NAND". Be consistent and use the same acronyms.
Signed-off-by: Tudor Ambarus
---
drivers/spi/Kconfig| 10 +-
drivers/spi/spi-fsl-qspi.c | 2 +-
drivers/spi/spi-orion.c| 2 +-
3 files changed
00)
> [ 544.351528] intel_spi_read(from=200, len=40)
> [ 544.351528] intel_spi_read(from=200, len=40)
> End MTD read
>
> [...]
Applied to spi-nor/next, thanks!
[1/1] mtd: revert "spi-nor: intel: provide a range for poll_timout"
https://git.kernel.org/mtd/c/e93a977367b2
Best regards,
--
Tudor Ambarus
: NAND scan failed: -22
atmel-nand-controller: probe of 1000.ebi:nand-controller failed with error
-22
Tudor Ambarus (3):
mtd: rawnand: Fix wrongful fallthrough NAND_ECC_SOFT
mtd: rawnand: Introduce nand_set_ecc_on_host_ops()
mtd: rawnand: Don't overwrite the error code
ot;switch (ecc->mode)" statement, and when a fallback to SW ECC is
needed, we fallthrough "case NAND_ECC_SOFT".
Fixes: d3f8ec8e979b ("mtd: rawnand: Separate the ECC engine type and the ECC
byte placement")
Reported-by: Santiago Esteban
Signed-off-by: Tudor Ambarus
---
There were too many levels of indentation and the code was
hard to read. Introduce a new function, similar to
nand_set_ecc_soft_ops().
Signed-off-by: Tudor Ambarus
---
drivers/mtd/nand/raw/nand_base.c | 114 +--
1 file changed, 61 insertions(+), 53 deletions(-)
diff
The error code received from nand_set_ecc_soft_ops() was overwritten,
drop this redundant assignment and use the error code received from
the callee.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/nand/raw/nand_base.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers
7; was not declared. Should it be static?
symbol 'atmel_ecc_i2c_client_free' was not declared. Should it be static?
Signed-off-by: Colin Ian King
Acked-by: Tudor Ambarus
Thanks,
ta
On 02/15/2018 02:24 PM, SF Markus Elfring wrote:
From: Markus Elfring
Date: Thu, 15 Feb 2018 11:38:30 +0100
Omit extra messages for a memory allocation failure in these functions.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
Reviewed-by: Tudor
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