arrnaged compatible in alphabatical order.
5. changed cpu nodes to use cpu@100 -cpu@-103.
6. changed dts filename.
Vishnu Patekar (3):
ARM: sunxi: Introduce Allwinner for A83T support
ARM: dts: sun8i: Add Allwinner A83T dtsi
ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinner
Documentation/de
Allwinner A83T is octa-core cortex-a7 based SoC.
It's clock control unit and prcm, pinmux are different from previous sun8i
series.
Its processor cores are arragned in two clusters 4 cores each,
similar to A80.
Signed-off-by: Vishnu Patekar
---
Documentation/devicetree/bindings/arm/sunx
and PF4.
Enabled UART0 Header(PB9, PB10 pins).
Signed-off-by: Vishnu Patekar
---
.../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 64 ++
1 file changed, 64 insertions(+)
create mode 100644 arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
diff --git a/arch/arm/boot
Allwinner A83T is new octa-core cortex-a7 SOC.
This adds the basic dtsi, the clocks differs from
earlier sun8i SOCs.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 247 ++
1 file changed, 247 insertions(+)
create mode 100644 arch/arm
FIG_SERIO_APBPS2) += apbps2.o
>> obj-$(CONFIG_SERIO_OLPC_APSP)+= olpc_apsp.o
>> obj-$(CONFIG_HYPERV_KEYBOARD)+= hyperv-keyboard.o
>> +obj-$(CONFIG_SERIO_SUN4I_PS2)+= sun4i-ps2.o
>> diff --git a/drivers/input/serio/sun4i-ps2.c
>&g
pins conflict with HDMI.
7. added compatible as allwinner,sun4i-a10-ps2.
8. corrected the possible race condition.
Vishnu Patekar (4):
sunxi:dts-bindings:input: bindings for A10/A20 ps2
ARM:sunxi:drivers:input Add support for A10/A20 PS2
ARM: sunxi: dts: Add PS2 nodes to dtsi for A10,A20
ARM:
Signed-off-by: VishnuPatekar
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun4i-a10.dtsi | 16
arch/arm/boot/dts/sun7i-a20.dtsi | 16
2 files changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
in
c
new file mode 100644
index 000..d3cf6bc
--- /dev/null
+++ b/drivers/input/serio/sun4i-ps2.c
@@ -0,0 +1,347 @@
+/*
+ * Driver for Allwinner A10 PS2 host controller
+ *
+ * Author: Vishnu Patekar
+ * Aaron.maoye
+ *
+ *
+ */
+
+#include
+#include
+#include
+#include
Signed-off-by: VishnuPatekar
---
arch/arm/boot/dts/sun4i-a10.dtsi | 14 ++
arch/arm/boot/dts/sun7i-a20.dtsi | 14 ++
2 files changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 134100b..5536b01 100644
--- a/
Signed-off-by: VishnuPatekar
---
.../bindings/serio/allwinner,sun4i-ps2.txt | 23
1 file changed, 23 insertions(+)
create mode 100644
Documentation/devicetree/bindings/serio/allwinner,sun4i-ps2.txt
diff --git a/Documentation/devicetree/bindings/serio/allwinner,su
orrected style errors.
5. added support for A10 also, A10 and A2 have same properties of PS2
controller.
6. by default commented ps20 and ps21 nodes,as ps20 pins conflict with HDMI.
7. added compatible as allwinner,sun4i-a10-ps2.
8. corrected the possible race condition.
Vishnu Patekar (5):
sunxi:dts-
Signed-off-by: VishnuPatekar
---
.../bindings/serio/allwinner,sun4i-ps2.txt | 23
1 file changed, 23 insertions(+)
create mode 100644
Documentation/devicetree/bindings/serio/allwinner,sun4i-ps2.txt
diff --git a/Documentation/devicetree/bindings/serio/allwinner,su
c
new file mode 100644
index 000..06b3fef
--- /dev/null
+++ b/drivers/input/serio/sun4i-ps2.c
@@ -0,0 +1,330 @@
+/*
+ * Driver for Allwinner A10 PS2 host controller
+ *
+ * Author: Vishnu Patekar
+ * Aaron.maoye
+ *
+ *
+ */
+
+#include
+#include
+#include
+#include
Signed-off-by: VishnuPatekar
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun4i-a10.dtsi | 16
arch/arm/boot/dts/sun7i-a20.dtsi | 16
2 files changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
in
Signed-off-by: VishnuPatekar
---
arch/arm/boot/dts/sun4i-a10.dtsi | 14 ++
arch/arm/boot/dts/sun7i-a20.dtsi | 14 ++
2 files changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 2c31242..8fade3e 100644
--- a/
Signed-off-by: VishnuPatekar
---
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index ed364d5..3365f12 100644
--- a/arch/arm/boot
Hello Dmitry,
Thank you for review comments. Please see in-lined.
On Sun, Jan 18, 2015 at 3:55 AM, Dmitry Torokhov
wrote:
> Hi Vishnu,
>
> On Fri, Jan 16, 2015 at 07:33:38PM +0530, Vishnu Patekar wrote:
>> Signed-off-by: VishnuPatekar
>> ---
>> drivers/inp
es in alphabatical order.
4. arrnaged compatible in alphabatical order.
5. changed cpu nodes to use cpu@100 -cpu@-103.
6. changed dts filename.
Vishnu Patekar (3):
ARM: sunxi: Introduce Allwinner for A83T support
ARM: dts: sun8i: Add Allwinner A83T dtsi
ARM: dts: sun8i: Add A83T HomletV2 Board b
and PF4.
Enabled UART0 Header(PB9, PB10 pins).
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 64 ++
2 files changed, 65 insertions(+)
create mode 100644 arch/arm/boot/dts
Allwinner A83T is octa-core cortex-a7 based SoC.
It's clock control unit and prcm, pinmux are different from previous sun8i
series.
Its processor cores are arragned in two clusters 4 cores each,
similar to A80.
Signed-off-by: Vishnu Patekar
---
Documentation/arm/sunxi/R
Allwinner A83T is new octa-core cortex-a7 SOC.
This adds the basic dtsi, the clocks differs from
earlier sun8i SOCs.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 206 ++
1 file changed, 206 insertions(+)
create mode 100644 arch/arm
Hello,
Sorry for delayed response.
On Fri, Oct 23, 2015 at 9:37 AM, Chen-Yu Tsai wrote:
> On Fri, Oct 23, 2015 at 7:46 AM, Vishnu Patekar
> wrote:
>> Allwinner A83T is octa-core cortex-a7 based SoC.
>> It's clock control unit and prcm, pinmux are different from previous
Hello Maxime,
Sorry for delayed response.
On Mon, Oct 26, 2015 at 4:20 AM, Maxime Ripard
wrote:
> Hi,
>
> On Fri, Oct 23, 2015 at 07:46:16AM +0800, Vishnu Patekar wrote:
>> + memory {
>> + reg = <0x4000 0x8000>;
>
2: This patch adds support for Sinovoip BPI-M3 A83T based board, it has
2GB LPDDR3, u-boot support is added recently for this board.
patch 13: Introduce MACH_SUN8I_A83T config option.
Vishnu Patekar (13):
pinctrl: sunxi: Add A83T R_PIO controller support
clk: sunxi: add ahb1 clock for A83T
cl
APB1 is similar to sun4i-a10-apb0-clk, except different dividers.
This adds support for apb1 on A83T.
Signed-off-by: Vishnu Patekar
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/clk-sunxi.c | 13 +
2 files
The A83T has R_PIO pin controller, it's same as A23, execpt A83T
interrupt bit is 6th and A83T has one extra pin PL12.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
Acked-by: Rob Herring
---
.../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 +
drivers/pinctrl/sunxi/Kc
AHB1 on A83T is similar to ahb1 on A31, except parents are different.
clock index 0b1x is PLL6.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/clk-sunxi.c | 76
mmc clocks are compatible with that of earlier sun8i socs.
This adds mmc0, mmc1, and mmc2 clock nodes for A83T.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch
This adds A83T system bus clocks, bus gates, and clock resets.
Three ahb reset registers are combined into one node.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 114 +-
1 file changed, 112 insertions(+), 2 deletions(-)
diff --git a
This patch adds support for Sinovoip BPI-M3 A83T based board.
It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI,
mic, AP6212 Wifi, etc on it.
It is paired with AXP813 PMIC which is almost same as AXP818.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/Makefile
This enables mmc0.
Signed-off-by: Vishnu Patekar
Tested-by: LABBE Corentin
---
arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
b/arch/arm/boot/dts/sun8i-a83t
This adds A83T PRCM related clocks, clock resets.
As a83t apb0 gates clock support is added earlier, this enables it.
Apart from apb0 gates, other added clocks are compatible with
earlier sun8i socs.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi
A83T mmc is compatible with earliers sunxi socs.
This adds mmc0, mmc1, and mmc2 controller nodes for A83T.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++
1 file changed, 57 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i
Now that we have a driver for the R_PIO controller,
add the corresponding device node to the dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch/arm/boot/dts/sun8i
This patch adds a device node for the Reduced Serial Bus (RSB)
controller and the defacto pinmux setting to the A83T dtsi.
Since there is only one possible pinmux setting for RSB, just
set it in the dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 21
A83T has CPUS clock similar to A80's. currently, a80 cpus clock only
compiled for A80. So, Introduce MACH_SUN8I_A83T to compile it for
A83T as well.
Signed-off-by: Vishnu Patekar
---
arch/arm/mach-sunxi/Kconfig | 5 +
drivers/clk/sunxi/Makefile | 3 +++
2 files changed, 8 inser
A83T Boards BPI-m3 and Allwinner H8Homletv2 boards use PF6 as
Card Detect pin., so use PF6 as reference design CD pin in dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch
Hello Wens,
On Mon, Feb 29, 2016 at 1:29 AM, Chen-Yu Tsai wrote:
> On Sun, Feb 28, 2016 at 7:18 AM, Vishnu Patekar
> wrote:
>> This adds A83T system bus clocks, bus gates, and clock resets.
>>
>> Three ahb reset registers are combined into one node.
>>
&g
ET_Q8_A33 tablet, which these patches
were developed and tested with.
Vishnu Patekar (6):
ARM: sunxi: Add Machine support for A33
pinctrl: sunxi: add allwinner A33 PIO controller support
clk: sunxi: Add A33 clock for compilation
ARM: dts: sunxi: add common sun8i dtsi
ARM: dts: sunxi: Add All
Allwinnner A33 quad core cortex-a7 based SOC.
It is similar to A23.
Renamed cpu method to "allwinner,sun8i" for common sun8i smp.
smp code is generic for A23, A33 and hopefully H3.
Signed-off-by: Vishnu Patekar
---
Documentation/devicetree/bindings/arm/sunxi.txt | 1 +
arch/arm/
A33 PIO has 7 ports which starts from PB and has two interrupt ports.
Signed-off-by: Vishnu Patekar
---
.../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 2 +
drivers/pinctrl/sunxi/Kconfig | 5 +
drivers/pinctrl/sunxi/Makefile | 1 +
drivers
A33 clock control unit is similar to A23.
A33 specific clocks are not yet implemented, added CLK_OF_DECLARE
to get it compiled for A33.
Signed-off-by: VishnuPatekar
---
drivers/clk/sunxi/clk-sunxi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/
added the common sun8i.dtsi and "allwinner,sun8i" compatible for common
sun8i features, I've referred the h3 dtsi by Jens Kuske.
accordingly modified the sun8i-a23.dtsi and a23 dts.
I don't have a23 device, however, dts got compiled.
Signed-off-by: VishnuPatekar
---
arch/arm/boot/dts/sun8i-a23-
this is based on common sun8i.dtsi patch.
sun8i-a23.dtsi and sun8i-a33.dtsi are same, A33 specific features
e.g. clocks can be added in future.
Signed-off-by: VishnuPatekar
---
arch/arm/boot/dts/sun8i-a33.dtsi | 217 +++
1 file changed, 217 insertions(+)
crea
s.dtb \
sun9i-a80-cubieboard4.dtb
diff --git a/arch/arm/boot/dts/sun8i-a33-et-q8.dts
b/arch/arm/boot/dts/sun8i-a33-et-q8.dts
new file mode 100644
index 000..260d5a3
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-a33-et-q8.dts
@@ -0,0 +1,108 @@
+/*
+ * Copyright 2015 Vishnu Patekar
+ * Vishnu Pa
Hi,
On Sun, May 10, 2015 at 2:23 PM, Hans de Goede wrote:
> Hi,
>
> On 10-05-15 08:46, Vishnu Patekar wrote:
>>
>> this is based on common sun8i.dtsi patch.
>> sun8i-a23.dtsi and sun8i-a33.dtsi are same, A33 specific features
>> e.g. clocks can be add
Hi,
On Sun, May 10, 2015 at 4:03 PM, Maxime Ripard
wrote:
> Hi,
>
> On Sun, May 10, 2015 at 12:16:18PM +0530, Vishnu Patekar wrote:
>> Allwinnner A33 quad core cortex-a7 based SOC.
>
> There's one n to many in Allwinner, and having a verb in that sentence
> would
Hi,
On Sun, May 10, 2015 at 3:47 PM, Maxime Ripard
wrote:
> Hi,
>
> On Sun, May 10, 2015 at 12:16:20PM +0530, Vishnu Patekar wrote:
>> A33 clock control unit is similar to A23.
>>
>> A33 specific clocks are not yet implemented, added CLK_OF_DECLARE
>> to get it
Hi,
On Sun, May 10, 2015 at 4:11 PM, Maxime Ripard
wrote:
> Hi,
>
> On Sun, May 10, 2015 at 12:16:21PM +0530, Vishnu Patekar wrote:
>> added the common sun8i.dtsi and "allwinner,sun8i" compatible for common
>> sun8i features, I've referred the h3 dtsi by Jen
Sorry for delayed response.
Thanks, Chen-Yu.
So, I'll keep ps2 enabled for Lime2 board without any comment.
On Mon, Dec 15, 2014 at 9:11 PM, Chen-Yu Tsai wrote:
> Hi,
>
> On Mon, Dec 15, 2014 at 11:13 PM, Hans de Goede wrote:
>> Hi,
>>
>>
>> On 15-12-14 1
Hi,
On Sun, Dec 14, 2014 at 2:31 PM, Hans de Goede wrote:
> Hi,
>
> On 13-12-14 21:01, Vishnu Patekar wrote:
>>
>> Hello Hans,
>> Please find my comments inlined.
>>
>> On 12/13/14, Hans de Goede wrote:
>>>
>>> Hi VishnuPatekar,
>>
Hello,
On Wed, Jan 21, 2015 at 1:37 AM, Maxime Ripard
wrote:
>
> On Tue, Jan 20, 2015 at 05:02:06PM +, Iain Paton wrote:
> > On 16/01/15 14:03, Vishnu Patekar wrote:
> > > Signed-off-by: VishnuPatekar
> > > ---
> > > arch/arm/boot/d
On Wed, Jan 21, 2015 at 1:32 AM, Maxime Ripard
wrote:
> Hi Vishnu,
>
> On Fri, Jan 16, 2015 at 07:33:39PM +0530, Vishnu Patekar wrote:
>> Signed-off-by: VishnuPatekar
>> Signed-off-by: Hans de Goede
>
> Why is there Hans Signed-off here?
Hans has modified the A10
Hello Dmitry,
On Tue, Jan 20, 2015 at 6:05 AM, Dmitry Torokhov
wrote:
> On Mon, Jan 19, 2015 at 11:37:38AM +0530, Vishnu Patekar wrote:
>> Hello Dmitry,
>>
>> Thank you for review comments. Please see in-lined.
>>
>> On Sun, Jan 18, 2015 at 3:55 AM, Dmitry T
Hello Hans,
Please find my comments inlined.
On 12/13/14, Hans de Goede wrote:
> Hi VishnuPatekar,
>
> The patch mangling for this set seems to have gone a bit wrong I'm afraid
No, this time I've corrected it. Infact, last version of patch did not
used the status bit error macros.
> a lot of th
detect pin as reference design pin
patch 11: enables mmc0 support for h8homlet board, tested by LABBE Corentin.
patch 12: This patch adds support for Sinovoip BPI-M3 A83T based board, it has
2GB LPDDR3, u-boot support is added recently for this board.
patch 13: Adds kconfig for clocks(sun8i-apb0 an
This adds A83T PRCM related clocks, clock resets.
As a83t apb0 gates clock support is added earlier, this enables it.
Apart from apb0 gates, other added clocks are compatible with
earlier sun8i socs.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi
Hello Linus,
On Thu, Mar 17, 2016 at 10:51 PM, Linus Walleij
wrote:
> On Wed, Mar 16, 2016 at 5:04 PM, Vishnu Patekar
> wrote:
>
>> The A83T has R_PIO pin controller, it's same as A23, execpt A83T
>> interrupt bit is 6th and A83T has one extra pin PL12.
>>
mmc clocks are compatible with that of earlier sun8i socs.
This adds mmc0, mmc1, and mmc2 clock nodes for A83T.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch
This enables mmc0.
Signed-off-by: Vishnu Patekar
Tested-by: LABBE Corentin
---
arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
b/arch/arm/boot/dts/sun8i-a83t
This patch adds a device node for the Reduced Serial Bus (RSB)
controller and the defacto pinmux setting to the A83T dtsi.
Since there is only one possible pinmux setting for RSB, just
set it in the dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 21
This patch adds Kconfig for sunxi clocks.
Currently, only sun8i-apb0 and sun9i-cpus clocks are added.
It'll help to use common clocks across different SOCs.
We can switch to kconfig for other clocks in future.
Signed-off-by: Vishnu Patekar
---
drivers/clk/Kconfig| 1 +
drivers/clk/
AHB1 on A83T is similar to ahb1 on A31, except parents are different.
clock index 0b1x is PLL6.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/clk-sunxi.c | 76
Now that we have a driver for the R_PIO controller,
add the corresponding device node to the dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch/arm/boot/dts/sun8i
A83T mmc is compatible with earliers sunxi socs.
This adds mmc0, mmc1, and mmc2 controller nodes for A83T.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++
1 file changed, 57 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i
This adds A83T system bus clocks, bus gates, and clock resets.
Three ahb reset registers are combined into one node.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 114 +-
1 file changed, 112 insertions(+), 2 deletions(-)
diff --git a
The A83T has R_PIO pin controller, it's same as A23, execpt A83T
interrupt bit is 6th and A83T has one extra pin PL12.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
Acked-by: Rob Herring
---
.../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 +
drivers/pinctrl/sunxi/Kc
Hello Maxime,
On Fri, Apr 15, 2016 at 1:28 AM, Maxime Ripard
wrote:
> On Mon, Apr 04, 2016 at 11:07:29AM +0800, Vishnu Patekar wrote:
>> Hello Maxime,
>>
>> On Thu, Mar 17, 2016 at 6:40 PM, Maxime Ripard
>> wrote:
>> > On Thu, Mar 17, 2016 at 12:04:25AM +08
.
Signed-off-by: Vishnu Patekar
---
drivers/clk/sunxi/clk-factors.c | 31 +++
drivers/clk/sunxi/clk-factors.h | 10 +-
2 files changed, 24 insertions(+), 17 deletions(-)
diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
index
c was currently used only by a31 ahb1.
For getter, it differentiates parents with prediv, with non-zero prediv width.
I've tested this patch on a83t bpi-m3 board. I do not have a31 device.
a83t changes are not included in this patch, It'll be included in separate
patch.
Vishnu Patekar (2
For ahb1 clock, move mshift and mwidth to parent specific width and shift.
getter differentiates parents with prediv, with non-zero prediv width.
Also, removed unused ahb1 recalc function, it's now handled in generic
factors recalc.
Signed-off-by: Vishnu Patekar
---
drivers/clk/sunx
Hello Wens,
On Tue, Apr 19, 2016 at 10:16 PM, Chen-Yu Tsai wrote:
> On Tue, Apr 19, 2016 at 6:22 PM, Philip Li wrote:
>> On Sun, Apr 17, 2016 at 11:53:47AM +0800, Vishnu Patekar wrote:
>>> Both of these patches in series has to be applied at the same time.
>>> I t
. Also, adds prediv table for a31.
Signed-off-by: Vishnu Patekar
---
drivers/clk/sunxi/clk-factors.c | 31 +++
drivers/clk/sunxi/clk-factors.h | 10 +-
drivers/clk/sunxi/clk-sunxi.c | 31 +--
3 files changed, 33 insertions(+), 39
be included in separate patch.
v1->v2 Changes:
1. As 'kbuild test robot' reported build failure due to dependency on patches,
Combined two patches in v1 into single patch.
Vishnu Patekar (1):
clk: sunxi: predivider handling for factors clock
drivers/
Hello Wens,
On Mon, Apr 25, 2016 at 10:51 PM, Chen-Yu Tsai wrote:
> Hi,
>
> On Wed, Apr 20, 2016 at 12:47 AM, Vishnu Patekar
> wrote:
>> For A31 ahb1 and a83t ahb1 clocks have predivider for certain parent.
>> To handle this, this patch adds predivider table with paren
Hello Maxime,
On Thu, Mar 17, 2016 at 6:40 PM, Maxime Ripard
wrote:
> On Thu, Mar 17, 2016 at 12:04:25AM +0800, Vishnu Patekar wrote:
>> AHB1 on A83T is similar to ahb1 on A31, except parents are different.
>> clock index 0b1x is PLL6.
>>
>> Signed-off-by: Vishnu Pa
Hello Linus,
On Wed, Mar 9, 2016 at 10:55 AM, Linus Walleij wrote:
> On Sat, Mar 5, 2016 at 10:42 PM, Vishnu Patekar
> wrote:
>
>> The A83T has R_PIO pin controller, it's same as A23, execpt A83T
>> interrupt bit is 6th and A83T has one extra pin PL12.
>>
The A83T has R_PIO pin controller, it's same as A23, execpt A83T
interrupt bit is 6th and A83T has one extra pin PL12.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
Acked-by: Rob Herring
---
.../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 +
drivers/pinctrl/sunxi/Kc
-boot support is added recently for this board.
patch 13: Adds kconfig for clocks(sun8i-apb0 and sun9i-cpus).
Vishnu Patekar (13):
pinctrl: sunxi: Add A83T R_PIO controller support
clk: sunxi: add ahb1 clock for A83T
clk: sunxi: Add APB1 clock for A83T
ARM: dts: sun8i-a83t: Add basic cloc
APB1 is similar to sun4i-a10-apb0-clk, except different dividers.
This adds support for apb1 on A83T.
Signed-off-by: Vishnu Patekar
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/clk-sunxi.c | 13 +
2 files
This adds A83T system bus clocks, bus gates, and clock resets.
Three ahb reset registers are combined into one node.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 114 +-
1 file changed, 112 insertions(+), 2 deletions(-)
diff --git a
mmc clocks are compatible with that of earlier sun8i socs.
This adds mmc0, mmc1, and mmc2 clock nodes for A83T.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch
AHB1 on A83T is similar to ahb1 on A31, except parents are different.
clock index 0b1x is PLL6.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/clk-sunxi.c | 76
This patch adds support for Sinovoip BPI-M3 A83T based board.
It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI,
mic, AP6212 Wifi, etc on it.
It is paired with AXP813 PMIC which is almost same as AXP818.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/Makefile
Now that we have a driver for the R_PIO controller,
add the corresponding device node to the dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch/arm/boot/dts/sun8i
This patch adds Kconfig for sunxi clocks.
Currently, only sun8i-apb0 and sun9i-cpus clocks are added.
It'll help to use common clocks across different SOCs.
We can switch to kconfig for other clocks in future.
Signed-off-by: Vishnu Patekar
---
drivers/clk/Kconfig| 1 +
drivers/clk/
This patch adds a device node for the Reduced Serial Bus (RSB)
controller and the defacto pinmux setting to the A83T dtsi.
Since there is only one possible pinmux setting for RSB, just
set it in the dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 21
This enables mmc0.
Signed-off-by: Vishnu Patekar
Tested-by: LABBE Corentin
---
arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
b/arch/arm/boot/dts/sun8i-a83t
This adds A83T PRCM related clocks, clock resets.
As a83t apb0 gates clock support is added earlier, this enables it.
Apart from apb0 gates, other added clocks are compatible with
earlier sun8i socs.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi
A83T mmc is compatible with earliers sunxi socs.
This adds mmc0, mmc1, and mmc2 controller nodes for A83T.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++
1 file changed, 57 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i
A83T Boards BPI-m3 and Allwinner H8Homletv2 boards use PF6 as
Card Detect pin., so use PF6 as reference design CD pin in dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch
Hello,
On Sat, Mar 5, 2016 at 11:43 PM, Vishnu Patekar
wrote:
> This patch adds Kconfig for sunxi clocks.
> Currently, only sun8i-apb0 and sun9i-cpus clocks are added.
> It'll help to use common clocks across different SOCs.
> We can switch to kconfig for other clocks in futur
This patch adds support for Sinovoip BPI-M3 A83T based board.
It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI,
mic, AP6212 Wifi, etc on it.
It is paired with AXP813 PMIC which is almost same as AXP818.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/Makefile
A83T Boards BPI-m3 and Allwinner H8Homletv2 boards use PF6 as
Card Detect pin., so use PF6 as reference design CD pin in dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch
APB1 is similar to sun4i-a10-apb0-clk, except different dividers.
This adds support for apb1 on A83T.
Signed-off-by: Vishnu Patekar
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/clk-sunxi.c | 13 +
2 files
Hello Maxime,
On Thu, Feb 4, 2016 at 4:01 PM, Maxime Ripard
wrote:
> On Thu, Feb 04, 2016 at 02:06:45PM +0800, Vishnu Patekar wrote:
>> Hello Maxime,
>>
>>
>> On Tue, Feb 2, 2016 at 9:17 PM, Maxime Ripard
>> wrote:
>> > Hi,
>> >
>> &
Hello Wens,
On Tue, Feb 2, 2016 at 2:44 PM, Chen-Yu Tsai wrote:
> On Sun, Jan 31, 2016 at 9:21 AM, Vishnu Patekar
> wrote:
>> This adds A83T PRCM related clocks, clock resets.
>>
>> As a83t apb0 gates clock support is added earlier, this enables it.
>> Apart from
Hello Maxime,
On Tue, Mar 1, 2016 at 3:12 PM, Maxime Ripard
wrote:
> Hi,
>
> On Sun, Feb 28, 2016 at 11:18:58PM +0800, Vishnu Patekar wrote:
>> A83T has CPUS clock similar to A80's. currently, a80 cpus clock only
>> compiled for A80. So, Introduce MACH_SUN8I_A83T to
Hello,
On Tue, Sep 22, 2015 at 11:47 PM, Chen-Yu Tsai wrote:
> On Tue, Sep 22, 2015 at 11:38 PM, Vishnu Patekar
> wrote:
>> Allwinner A83T is octa-core cortex-a7 based SoC.
>> It's clock control unit and prcm, pinmux are different from previous sun8i
>> serie
Hello,
On Tue, Sep 22, 2015 at 11:51 PM, Maxime Ripard
wrote:
> Hi,
>
> On Tue, Sep 22, 2015 at 11:38:54PM +0800, Vishnu Patekar wrote:
>> Allwinner A83T is octa-core cortex-a7 based SoC.
>> It's clock control unit and prcm, pinmux are different from previous sun8i
&
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