+ /* Synchronization notification */
+ spinlock_t lock;
Why the lock? The core has per-adapter locks anyhow.
I'm using it to lock the rk3x_i2c struct during interrupts. It's needed there
because an operation can timeout, which means the interrupt can occur at any
time and
On Tue, Jun 03, 2014 at 10:49:52AM +0200, Boris BREZILLON wrote:
The P2WI looks like an SMBus controller which only supports byte data
transfers. But, it differs from standard SMBus protocol on several
aspects:
- it supports only one slave device, and thus drop the address field
- it adds a
Hi,
On Sat, Jun 07, 2014 at 07:36:19PM +0200, Max Schwarz wrote:
Driver for the native I2C adapter found in Rockchip RK3xxx SoCs.
Configuration is only possible through devicetree. The driver is
interrupt driven and supports the I2C_M_IGNORE_NAK mangling bit.
Signed-off-by: Max Schwarz
Hi,
compiling this driver gives me:
drivers/i2c/busses/i2c-sun6i-p2wi.c: In function 'p2wi_probe':
drivers/i2c/busses/i2c-sun6i-p2wi.c:272:2: error: implicit declaration of
function 'devm_reset_control_get' [-Werror=implicit-function-declaration]
drivers/i2c/busses/i2c-sun6i-p2wi.c:272:13:
+MODULE_LICENSE(GPL);
GPL v2
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On Wed, Jun 11, 2014 at 10:34:37PM +0200, Max Schwarz wrote:
Driver for the native I2C adapter found in Rockchip RK3xxx SoCs.
Configuration is only possible through devicetree. The driver is
interrupt driven and supports the I2C_M_IGNORE_NAK mangling bit.
Signed-off-by: Max Schwarz
On Wed, Jun 11, 2014 at 11:17:28AM +0200, Boris BREZILLON wrote:
Hello,
This series adds support for the P2WI block used by some Allwinner boards
to interface with the AXP221 PMIC.
The P2WI controller looks like an SMBus controller which only supports byte
data transfers. But, it differs
On Mon, May 19, 2014 at 06:22:58PM +0100, Lee Jones wrote:
Code looks good, so
Reviewed-by: Wolfram Sang w...@the-dreams.de
I don't mind how it gets upstream. I can take it, but you can also keep
it in this series.
Let's keep the series together. Are you happy with me just
On Fri, Apr 04, 2014 at 07:40:11PM +0200, Wolfram Sang wrote:
The ugly is my work or even the ability but not the attitude, I think.
Explaining which tests were done is what I wanted to request more often
from submitters anyhow. Your leftover (yes, this can happen) just
reminded me
dev_err(dev-dev, controller timed out\n);
davinci_i2c_recover_bus(dev);
i2c_davinci_init(dev);
@@ -384,7 +384,6 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct
i2c_msg *msg, int stop)
if (dev-buf_len) {
/* This should be
On Fri, Apr 04, 2014 at 02:56:10PM +0200, Kaushal Butala wrote:
The smbus block read is not currently supported for imx i2c devices.
This patchset adds the support to imx i2c bus so that blocks of data
can be read using SMbus block reads.(using i2c_smbus_read_block_data()
function from the
On Fri, Apr 11, 2014 at 01:44:44PM +0200, Richard Leitner wrote:
Fixed most checkpatch.pl issues
Signed-off-by: Richard Leitner m...@g0hl1n.net
Reviewed-by: Jean Delvare jdelv...@suse.de
Applied to for-next, thanks!
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On Fri, May 09, 2014 at 03:54:25PM +0100, Mark Brown wrote:
On Fri, May 09, 2014 at 08:12:47PM +0530, Naveen Krishna Ch wrote:
On 9 May 2014 19:21, Mark Brown broo...@kernel.org wrote:
On Fri, May 09, 2014 at 05:50:00PM +0530, Naveen Krishna Ch wrote:
DRM related drivers like DP, FIMD,
On Thu, Apr 24, 2014 at 08:35:22PM +0530, Naveen Krishna Chatradhi wrote:
From: Doug Anderson diand...@chromium.org
Since many drivers rely on FETs that live behind this arbitrator, they
can't successfully probe until after the arbitrator comes up. They
ought to handle things properly with
On Tue, Apr 29, 2014 at 10:30:51AM -0700, Doug Anderson wrote:
This adds some more warnings to the i2c-arb-gpio-challenge docs to
help encourage people not to use it in their designs unless they have
no choice.
Signed-off-by: Doug Anderson diand...@chromium.org
Woha, you forgot to add the
On Mon, Apr 28, 2014 at 02:29:58PM +0530, Naveen Krishna Chatradhi wrote:
HSI2C module on Exynos5260 differs from current modules in
following ways:
1. HSI2C on Exynos5260 has fifo_depth of 16bytes
2. Module needs to be reset as a part of init sequence.
Hence, Following changes are
On Wed, May 14, 2014 at 09:17:49PM +0200, Wolfram Sang wrote:
For the moment, I'd leave this up to Wan ZongShun. He has in the past
at least replied to emails about the platform, even though there hasn't
been any new development.
Agreed. Let's wait for his response. If there is none
You want me to send another version fixing these nits ?
No, did it locally here. Thanks.
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Kindly, suggest a workable approach for all the subsystems.
Keep this patch out-of-tree? I know that probe ordering causes problems,
and that it needs major efforts. Yet, I understood that adding more and
more subsys_initcall to mainline is not going to help the process unless
essential. Using
Hi,
thanks for the patch.
+/* capabilities */
+#define I2C_CAPABILITIES(I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | \
+ I2C_FUNC_SMBUS_READ_BLOCK_DATA)
I don't see the need for a seperate define.
+
struct davinci_i2c_dev {
struct device *dev;
: Fix pm_runtime_get_sync usage
Du, Wenkai (1):
i2c: designware: Mask all interrupts during i2c controller enable
Olof Johansson (1):
i2c: s3c2410: resume race fix
Ulf Hansson (1):
i2c: nomadik: Don't use IS_ERR for devm_ioremap
Wolfram Sang (1):
i2c: rcar: bail out on zero
On Mon, Apr 28, 2014 at 10:27:44PM +0800, Lan Tianyu wrote:
Add i2c_smbus_quick_write/read() helper function. These will be used
in the implementation of i2c ACPI address space handler.
Reviewed-by: Mika Westerberg mika.westerb...@linux.intel.com
Signed-off-by: Lan Tianyu
On Mon, Apr 28, 2014 at 10:27:45PM +0800, Lan Tianyu wrote:
Add i2c_smbus_word/block_proc_call() helper function. These will be used
in the implementation of i2c ACPI address space handler.
Reviewed-by: Mika Westerberg mika.westerb...@linux.intel.com
Signed-off-by: Lan Tianyu
2) It uses a parameter for the r/w bit. Make sense to me, since this bit
is the information we send to the device. quick_read doesn't make sense
to me. We don't receive a bit from the device.
Hi Wolfram:
Great thanks for your review. Ok. I will follow commit 67c2e665 to
bring
BTW what were your test scenarios for these functions and smbus quick?
From ACPI spec, Read/Write quick and Word/Block process call
protocol will be used by Bios ACPI code. But so far, I don't find
such machines. So these functions has not been tested.
Uh oh, I have some trouble adding
On Tue, Apr 29, 2014 at 11:16:09AM +0300, Mika Westerberg wrote:
On Mon, Apr 28, 2014 at 10:27:48PM +0800, Lan Tianyu wrote:
This patch is to add CONFIG_I2C_ACPI. Current there is a race between
removing I2C ACPI operation region and ACPI AML code accessing.
So make i2c core built-in if
looks good, so
Reviewed-by: Wolfram Sang w...@the-dreams.de
I don't mind how it gets upstream. I can take it, but you can also keep
it in this series.
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Hi Wolfram:
Since this version resolved all comments, it's ok for you?
Sorry, I misunderstood. I thought a V4 was needed, but it isn't. I'll
try to have a look this weekend.
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On Fri, May 30, 2014 at 01:26:36PM +0100, Lee Jones wrote:
Currently the I2C framework insists on devices supplying an I2C ID
table. Many of the devices which do so unnecessarily adding quite a
few wasted lines to kernel code. This patch allows drivers a means
to 'not' supply the
Hi Lee,
sorry for the delay.
Would you mind telling me what I have changed that affects drivers
registering via Sysfs?
Check Documentation/i2c/instantiating-devices, method 4. If a driver
does not have i2c_device_id, then this method won't work because the
newly created device has no of_node
Right, I read the function which provides the functionality, but my
point is; I don't think my patch changes the semantics in a way which
would adversely affect this option. If you think that it does, can you
specify how please?
Currently, if a driver would be DT only and does not provide a
Feel free to adap my patch or comments and commit. Or wait a few weeks for
when I have a sponsor to split and update the patch.
OK, I'll hope you can make it for 3.17. Thanks!
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On Sat, May 17, 2014 at 07:14:08PM +0200, Rickard Strandqvist wrote:
There is otherwise a risk of a possible null pointer dereference.
Was largely found by using a static code analysis program called cppcheck.
It is useful to put the output of the analyzer here.
Signed-off-by: Rickard
On Thu, Apr 10, 2014 at 11:03:19PM +, Du, Wenkai wrote:
Hi all,
Updated problem descriptions from Mika's feedback and new test data:
There have been i2c_designware 80860F41:00: controller timed out errors
on a number of Baytrail platforms. The issue is caused by incorrect value in
On Fri, Apr 11, 2014 at 03:19:41PM -0700, Doug Anderson wrote:
From: Olof Johansson o...@lixom.net
Don't unmark the device as suspended until after it's been re-setup.
The main race would be w.r.t. an i2c driver that gets resumed at the same
time (asyncronously), that is allowed to do a
On Fri, May 02, 2014 at 08:54:29PM -0500, Andy Gross wrote:
This patch corrects the error check on the call to pm_runtime_get_sync.
Signed-off-by: Andy Gross agr...@codeaurora.org
Applied to for-current, thanks!
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On Thu, May 08, 2014 at 04:56:22PM +0200, Arnd Bergmann wrote:
As far as I can tell, this driver must have produced this error
for as long as it has been merged into the mainline kernel, but
it was never part of the normal build tests:
drivers/i2c/busses/i2c-nuc900.c: In function
For the moment, I'd leave this up to Wan ZongShun. He has in the past
at least replied to emails about the platform, even though there hasn't
been any new development.
Agreed. Let's wait for his response. If there is none, I'll think about
removing the driver.
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Few of the I2C interfaces are [operated] with slave monitor mode, when
there is a requirement for
a particular slave may need to wait some time to get the ADDR before
sending an ACK.
Can you describe an existing scenario? Why can't the slave use clock
stretching?
This feature is an
Interface) controller support
i2c: sun6-p2wi: fix call to snprintf
Dan Carpenter (1):
i2c: rk3x: add NULL entry to the end of_device_id array
Max Schwarz (1):
i2c: rk3x: add driver for Rockchip RK3xxx SoC I2C adapter
Wolfram Sang (2):
i2c: sun6i-p2wi: use proper return
Hi Max,
here is the review:
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index c94db1c..f973632 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -663,6 +663,16 @@ config I2C_PXA_SLAVE
is necessary for systems where the PXA may be a
On Mon, Jun 02, 2014 at 02:16:59PM +0200, Linus Walleij wrote:
On Sat, May 31, 2014 at 3:48 PM, Wolfram Sang w...@the-dreams.de wrote:
Right, I read the function which provides the functionality, but my
point is; I don't think my patch changes the semantics in a way which
would adversely
On Thu, May 15, 2014 at 05:37:21PM +0300, Mika Westerberg wrote:
If the controller is already in desired state (enabled/disabled) there is
no point in setting its state again.
Signed-off-by: Mika Westerberg mika.westerb...@linux.intel.com
---
Does it have a side-effect when setting then
On Thu, May 15, 2014 at 05:37:20PM +0300, Mika Westerberg wrote:
Hi,
Patches 1-3 are needed in order to get runtime PM working properly on Intel
Baytrail based tablets, like on Asus T100. We need to re-initialize the
controller on resume.
Patch 4 adds Haswell PCI IDs to the driver. It is
On Fri, May 16, 2014 at 05:32:10PM +0200, Maxime COQUELIN wrote:
The i2c timing values specified in the driver are the minimun
values defined in the I2C specifications.
The I2C specification does not specify any default or maximum values.
Some I2C devices are out of spec, and might not work
nodes of respective SoC DT files.
Also handle saving and restoring of SYS_I2C_CFG register during
suspend and resume of i2c driver. This will help in removing soc
specific check from mach-exynos/pm.c.
CC: Rob Herring robh...@kernel.org
CC: Randy Dunlap rdun...@infradead.org
CC: Wolfram Sang w
On Mon, Jun 02, 2014 at 08:34:08PM +0300, Mika Westerberg wrote:
On Mon, Jun 02, 2014 at 06:12:34PM +0200, Wolfram Sang wrote:
On Thu, May 15, 2014 at 05:37:21PM +0300, Mika Westerberg wrote:
If the controller is already in desired state (enabled/disabled) there is
no point in setting its
Can you give names here? Would be interesting to know since a few
drivers implement the minimum timings.
I don't have the name actually.
The request to implement this change came from hw guys.
Can you ask? It feels better to have changes based on facts.
This patch adds a 10% margin on
Wolfram, I sent the last version of this series almost a month ago and had
no feedback from you.
Yes, because you didn't send the patches to the i2c list, so they don't
show up in patchwork which I rely on.
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On Tue, Feb 04, 2014 at 07:19:07AM -0500, Matt Porter wrote:
Voltage regulators are needed very early due to deferred probe
being incompatible with built-in USB gadget drivers.
What does it need to fix those instead?
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: s3c2410: fix quirk usage for 64-bit
Vasanth Ananthan (1):
i2c: s3c2410: Add polling mode support
Wolfram Sang (3):
i2c: riic: add driver
i2c: imx: propagate irq error code in probe
i2c: viperboard: remove superfluous assignment
jean-jacques hiblot (1):
i2c: at91: add
mika.westerb...@linux.intel.com
Signed-off-by: Wolfram Sang w...@the-dreams.de
---
drivers/i2c/i2c-core.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index d74c0b3..dd3a4db 100644
--- a/drivers/i2c/i2c-core.c
+++ b
On Thu, Jan 09, 2014 at 09:49:54PM +, David Howells wrote:
Add tracepoints into the I2C message transfer function to retrieve the message
sent or received. The following config options must be turned on to make use
of the facility:
CONFIG_FTRACE
that code. It doesn't have a + at the beginning. He used
the whole driver as context, which is highly unusual. A context of 3
lines is usually good enough.
MODULE_DESCRIPTION(Driver for most I2C EEPROMs);
MODULE_AUTHOR(David Brownell and Wolfram Sang);
I would personally put your name in here
Well, it is not the Copyrights section, or you are saying the same
people should go to MODULE_AUTHOR as in the Copyrights section, even
if it is potentially several names? I thought this would be the name
of the person who put the file together even if from existing sources.
You may be right
to the next.
Cc: Wolfram Sang w...@the-dreams.de
Cc: Jean Delvare kh...@linux-fr.org
Cc: linux-...@vger.kernel.org
Signed-off-by: Paul Gortmaker paul.gortma...@windriver.com
Applied to for-current, thanks!
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to be missing from the driver, so
it is questionable whether it would actually work for a removal
and reload cycle if it was configured for a modular build.
Cc: Wolfram Sang w...@the-dreams.de
Cc: linux-...@vger.kernel.org
Signed-off-by: Paul Gortmaker paul.gortma...@windriver.com
Applied to for-current
On Tue, Jan 21, 2014 at 05:48:34PM +0100, Wolfram Sang wrote:
Commit 0998d0631001 (device-core: Ensure drvdata = NULL when no driver
is bound) modified the driver core to always clear .driver and .drvdata
on remove or probe error. No need for the I2C core to do it.
Reported-by: Linus
On Wed, Jan 15, 2014 at 11:59:24AM +0100, Nicolas Ferre wrote:
On 15/01/2014 11:24, Jean-Jacques Hiblot :
Signed-off-by: Jean-Jacques Hiblot jjhib...@traphandler.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
Thanks Jean-Jacques.
Side note: do not forget i2c maintainer and ml.
Linus,
please pull this bugfix for the i2c subsystem for 3.13.
Thanks,
Wolfram
The following changes since commit 7e22e91102c6b9df7c4ae2168910e19d2bb14cd6:
Linux 3.13-rc8 (2014-01-12 17:04:18 +0700)
are available in the git repository at:
On Wed, Jan 15, 2014 at 02:17:13PM +0100, Jean-Jacques Hiblot wrote:
Signed-off-by: Jean-Jacques Hiblot jjhib...@traphandler.com
Applied to for-next, thanks!
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diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index d74c0b3..c4c5588 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -104,6 +104,11 @@ static int i2c_device_match(struct device *dev, struct
device_driver *drv)
static int i2c_device_uevent(struct device
I do see this in for-current, but it looks like that branch isn't part
of linux-next. Should it be, or perhaps for-current should be merged
into for-next?
It is upstream already.
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assume I'm OK with it.
Ditto
Acked-by: Wolfram Sang w...@the-dreams.de
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On Tue, Oct 08, 2013 at 05:00:55PM +0200, Romain Baeriswyl wrote:
Some legacy devices support ony I2C standard mode at 100kHz.
This patch allows to select the standard mode through the DTS
with the use of the existing clock-frequency parameter.
When clock-frequency parameter is not set,
You can also use the gcc-ism, which is a bit more concise:
sda_falling_time = dev-sda_falling_time ?: 300;
+1
ditto
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Our devices and our platforms have some other requirements which
turned me away from using i2c_register_board_info.
Okay, so I'll drop these patches.
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Hi,
+#define _P_DATA(bank, pin, name, sfx)
\
+ PINMUX_DATA(name##_DATA, name##_PMC_0, name##_PIPC_0, \
+ name##_PIBC_1, name##_PBDC_1)
+
+#define _P_FN(n, fn, pfcae, pfce, pfc)
\
+
+#define _P_DATA(bank, pin, name, sfx)
\
+ PINMUX_DATA(name##_DATA, name##_PMC_0, name##_PIPC_0, \
+ name##_PIBC_1, name##_PBDC_1)
+
+#define _P_FN(n, fn, pfcae, pfce, pfc)
\
On Tue, Jan 28, 2014 at 01:48:28PM +0800, xinhui.pan wrote:
From: xinhui.pan xinhuix@intel.com
i2c_dw_pci_runtime_idle should return -EBUSY rather than zero if it do
success.
I don't understand...
Otherwise rpm_idle will call pm_suspend again and that may cause
pm_schedule_suspend
for AMD Auxiliary SMBus Controller
Wolfram Sang (1):
i2c: rely on driver core when sanitizing devices
Documentation/i2c/busses/i2c-piix4 | 2 +-
drivers/i2c/algos/i2c-algo-bit.c | 1 -
drivers/i2c/algos/i2c-algo-pca.c | 1 -
drivers/i2c/algos/i2c-algo-pcf.c
Linus,
here are two simple but wanted fixes for the i2c subsystem. Please pull.
Thanks,
Wolfram
The following changes since commit 374b105797c3d4f29c685f3be535c35f5689b30e:
Linux 3.13-rc3 (2013-12-06 09:34:04 -0800)
are available in the git repository at:
On Tue, Nov 26, 2013 at 02:09:59PM +0100, Wolfram Sang wrote:
On Tue, Nov 19, 2013 at 06:14:18PM -0800, Benson Leung wrote:
Hi Wolfram,
On Thu, Nov 14, 2013 at 10:05 AM, Wolfram Sang w...@the-dreams.de wrote:
In the chromeos_laptop driver, I do by-name matching of i2c busses to
find
On Tue, Nov 26, 2013 at 09:52:46AM +0530, Naveen Krishna Chatradhi wrote:
For Exynos4 and Exynos5 SoCs from Samsung the i2c clock is based
on a fixed 66 MHz peripheral clock, and therefore is completely
independent of the cpu frequency.
Thus, registering for a CPU freq notifier is very
On Tue, Dec 17, 2013 at 04:54:04PM +0100, Boris BREZILLON wrote:
Document the clock properties required by the at91 i2c bus driver.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
Applied to for-next, thanks!
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On Thu, Dec 19, 2013 at 04:05:04PM +0100, Michal Simek wrote:
From: Kedareswara rao Appana appana.durga@xilinx.com
Code changes to fix checkpatch warnings listed below.
- WARNING: please, no space before tabs
- WARNING: quoted string split across lines
Signed-off-by: Kedareswara rao
On Thu, Aug 08, 2013 at 10:13:16AM +0900, Nguyen Viet Dung wrote:
Difference between H2 and H1 in hardware is only CDF bit of ICCCR register.
No IP version register? Sigh...
If this method is not a common method, please tell me about common method.
Use a new platform_device_id and populate
Linus,
here are some driver bugfixes for the I2C subsystem. Please pull.
Thanks,
Wolfram
The following changes since commit c095ba7224d8edc71dcef0d655911399a8bd4a3f:
Linux 3.11-rc4 (2013-08-04 13:46:46 -0700)
are available in the git repository at:
Every driver would thus have to implement its own defaults in case the
properties are not defined.
Placing the defaults at driver level sounds fine to me.
Thanks!
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
Looping linux-next into the CC since this is the cause of the failure
in orion5x_defconfig there, and no point in anyone else re-doing the
same bisect.
I sent a fix for this that hasn't been picked up yet:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-March/239069.html
diff --git a/drivers/i2c/busses/i2c-davinci.c
b/drivers/i2c/busses/i2c-davinci.c
index af0b583..254d897 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -372,9 +372,9 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct
i2c_msg *msg, int stop)
Kleine-König u.kleine-koe...@pengutronix.de
Wolfram please, next time. No need to resend, though.
Acked-by: Wolfram Sang w...@the-dreams.de
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Linus,
the build fix from my last request unveiled another build problem which
is fixed with this patch. Please pull.
Thanks,
Wolfram
The following changes since commit dcb99fd9b08cfe1afe426af4d8d3cbc429190f15:
Linux 3.14-rc7 (2014-03-16 18:51:24 -0700)
are available in the git
On Thu, Mar 27, 2014 at 11:18:33AM -0500, Nishanth Menon wrote:
we use IS_ERR_VALUE to check for error values of pm_runtime_get_sync,
when the value can only be 0 in the case of err. Replace the
check with a simpler 0 check.
This fixes the coccicheck warnings:
I think there is something wrong with an interface that makes you use
IS_ERR_OR_NULL(). If you are calling reset_control_get_optional(), that'
should not return an error when there is no reset controller listed
in the device tree. We should still have a way to propagate -EPROBE_DEFER,
On Mon, Mar 10, 2014 at 12:12:10PM +0100, Maxime Ripard wrote:
The reset framework recently gained optional stubs when
CONFIG_RESET_CONTROLLER
is not selected. It also introduced a function reset_get_optional, that is
also
dummy-defined whenever the framework isn't enabled, for drivers that
On Mon, Feb 10, 2014 at 11:03:54AM +0100, Wolfram Sang wrote:
With I2C, class based instantiation means if a master driver has e.g.
I2C_CLASS_HWMON set, all slave drivers with this class will try to probe a
device using an array of possible addresses and some heuristics. That creates
traffic
On Thu, Mar 13, 2014 at 07:07:42PM -0700, Bjorn Andersson wrote:
From: Ivan T. Ivanov iiva...@mm-sol.com
The Qualcomm Universal Peripherial (QUP) wraps I2C mini-core and
provide input and output FIFO's for it. I2C controller can operate
as master with supported bus speeds of 100Kbps and
On Thu, Mar 13, 2014 at 07:07:43PM -0700, Bjorn Andersson wrote:
This bus driver supports the QUP i2c hardware controller in the Qualcomm SOCs.
The Qualcomm Universal Peripheral Engine (QUP) is a general purpose data path
engine with input/output FIFOs and an embedded i2c mini-core. The driver
General i2c question: is there a reason why the core isn't responsible
for ensuring a device is not suspended before invoking -master_xfer
(and smbus_xfer)?
Can't think of one right now.
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The rest has been queued up for 3.16.
I also aim for 3.16, yet it may take 1 or 2 weeks more until I'll be
able to review the I2C part of those patches.
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Hi,
just a basic review to keep things rolling...
On the original Samsung ARM Chromebook these devices were on an I2C
bus that was shared between the AP and the EC and arbitrated using
some extranal GPIOs (see i2c-arb-gpio-challenge).
The original arbitration scheme worked well enough but
On Thu, Apr 03, 2014 at 10:59:26AM -0700, Soren Brinkmann wrote:
Add a driver for the Cadence I2C controller. This controller is for
example found in Xilinx Zynq.
Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
Tested-by: Michal Simek michal.si...@xilinx.com
Reviewed-by: Harini
On Fri, Apr 04, 2014 at 04:28:55PM +0200, Marek Vasut wrote:
On Friday, April 04, 2014 at 04:41:11 AM, Yuan Yao wrote:
Add dma support for i2c. This function depend on DMA driver.
You can turn on it by write both the dmas and dma-name properties in dts
node.
Signed-off-by: Yuan Yao
The ugly is my work or even the ability but not the attitude, I think.
Explaining which tests were done is what I wanted to request more often
from submitters anyhow. Your leftover (yes, this can happen) just
reminded me to actually do that :)
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On Sun, Apr 06, 2014 at 04:54:24PM +0300, Kirill A. Shutemov wrote:
On Mon, Oct 21, 2013 at 07:14:28PM +0300, Mika Westerberg wrote:
On Mon, Oct 21, 2013 at 08:05:42AM -0700, Benson Leung wrote:
Fixed 25Mhz clock instead of 100Mhz clock in 1/2 and a warning in 2/2.
[PATCH v2 1/2]
On Fri, Apr 04, 2014 at 02:27:55PM -0700, Soren Brinkmann wrote:
Add a driver for the Cadence I2C controller. This controller is for
example found in Xilinx Zynq.
Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
Tested-by: Michal Simek michal.si...@xilinx.com
Reviewed-by: Harini
On Fri, Apr 04, 2014 at 02:27:54PM -0700, Soren Brinkmann wrote:
Add device tree binding documentation for the Cadence I2C controller.
Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
Applied to for-next, thanks!
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: efm32: new bus driver
i2c: efm32: fix binding doc
Wolfram Sang (25):
i2c: rcar: add compatible entry for r8a7791
i2c: add deprecation warning for class based instantiation
i2c: i2c-omap: deprecate class based instantiation
i2c: i2c-at91: deprecate class based
On Sun, Apr 27, 2014 at 02:29:46AM +0200, Javier Martinez Canillas wrote:
Using the BIT() macro instead of manually shifting bits
makes the code less error prone and also more readable.
Does it? It is a taste thing, yet I don't think it makes the code that
much more readable that it is worth
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