irq callback will before cmdq flush ddp register
into hardware, that will cause the display frame page
flip event before it realy display out time
Yongqiang Niu (1):
CHROMIUM: drm/mediatek: move page flip handle into cmdq cb
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 33
move page flip handle into cmdq cb
irq callback will before cmdq flush ddp register
into hardware, that will cause the display frame page
flip event before it realy display out time
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 33
On Fri, 2021-01-29 at 14:24 +0800, Hsin-Yi Wang wrote:
> On Fri, Jan 29, 2021 at 9:33 AM CK Hu wrote:
> >
> > Hi, Hsin-Yi:
> >
> > On Thu, 2021-01-28 at 19:23 +0800, Hsin-Yi Wang wrote:
> > > From: Yongqiang Niu
> > >
> > > for 5 or 6 bpc
On Fri, 2021-01-29 at 14:46 +0800, Hsin-Yi Wang wrote:
> On Fri, Jan 29, 2021 at 2:30 PM Yongqiang Niu
> wrote:
> >
> > On Fri, 2021-01-29 at 14:24 +0800, Hsin-Yi Wang wrote:
> > > On Fri, Jan 29, 2021 at 9:33 AM CK Hu wrote:
> > > >
> > > > Hi
fix ccorr size config
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 1d8dc6a..0c81253 100644
--- a
add ovl bypass shadow register function
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index 03eaadb..fb0fe59 100644
This patch add component POSTMASK
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 31 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
include/linux/soc/mediatek/mtk-mmsys.h | 1 +
3 files changed, 33 insertions(+)
diff
This patch add component OVL_2L2
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
include/linux/soc/mediatek/mtk-mmsys.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek
add ccorr bypass shadow register function
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index b4a6df5
add rdma bypass shadow register function
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
index 0683bef
add aal bypass shadow register function
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index
fix aal size config
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index c90d2ee..fe76387
enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index 8cf9f3b..427fe7f 100644
description
Yongqiang Niu (21):
drm/mediatek: add component OVL_2L2
drm/mediatek: add component POSTMASK
drm/mediatek: add component RDMA4
mtk-mmsys: add mt8192 mmsys support
mtk-mmsys: add ovl mout on support
drm/mediatek: add disp config and mm 26mhz clock into mutex device
drm
add support for mediatek SOC MT8192
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_color.c | 7 +
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 20 +
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 7 +
drivers/gpu/drm/mediatek/mtk_drm_ddp.c| 35
the shadow register for mt8192 ddp component is enable,
we need disable it before enable ddp component
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 3 +++
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 7 +++
2 files changed, 10 insertions(+)
diff --git a
add mt8192 mmsys support
Signed-off-by: Yongqiang Niu
---
drivers/soc/mediatek/mmsys/Makefile | 1 +
drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 159 ++
2 files changed, 160 insertions(+)
create mode 100644 drivers/soc/mediatek/mmsys/mt8192-mmsys.c
diff
This patch add component RDMA4
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
include/linux/soc/mediatek/mtk-mmsys.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek
add dither bypass shadow register function
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 0c81253
It's possible that state->base.fb is null. Add a check before access its
format.
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
b/drivers/gpu/drm/
add ovl mout on support
Signed-off-by: Yongqiang Niu
---
drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 23 +++
drivers/soc/mediatek/mtk-mmsys.c | 8
include/linux/soc/mediatek/mtk-mmsys.h| 3 +++
3 files changed, 34 insertions(+)
diff --git a/drivers
add display node
Signed-off-by: Yongqiang Niu
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 126 +++
1 file changed, 126 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 931e1ca..d2a814d 100644
fix gamma size config
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index becd72d..1d8dc6a 100644
--- a
there are 2 more clock need enable for display.
parser these clock when mutex device probe,
enable and disable when mutex on/off
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 49 --
1 file changed, 41 insertions(+), 8 deletions
add color bypass shadow register function
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_color.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_color.c
b/drivers/gpu/drm/mediatek/mtk_disp_color.c
index 31918fa..83b075a
fix dither size config
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index fe76387..becd72d 100644
--- a
rdma fifo size may be different even in same SOC, add this
property to the corresponding rdma
Change-Id: I67635ec7f3f59cf4cbc7737285e5e28ff0ab71c9
Signed-off-by: Yongqiang Niu
---
.../devicetree/bindings/display/mediatek/mediatek,disp.txt | 14 ++
1 file changed, 14 insertions
mmsys is the driver which control the routing of these ddp component,
so the definition of mtk_ddp_comp_id should be placed in mtk-mmsys.h
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 34 +
drivers/soc/mediatek/mtk-mmsys.c
This patch add display nodes for mt8183
Signed-off-by: Yongqiang Niu
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 98
1 file changed, 98 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index
Get the fifo size from device tree
because each rdma in the same SoC may have different fifo size
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek
if it is need.
Signed-off-by: Yongqiang Niu
---
drivers/soc/mediatek/Makefile | 1 +
drivers/soc/mediatek/mmsys/Makefile | 2 +
drivers/soc/mediatek/mmsys/mt2701-mmsys.c | 250 +++
drivers/soc/mediatek/mtk-mmsys.c | 271
add mt8183 mmsys support
Signed-off-by: Yongqiang Niu
---
drivers/soc/mediatek/mmsys/Makefile | 1 +
drivers/soc/mediatek/mmsys/mt8183-mmsys.c | 154 ++
drivers/soc/mediatek/mtk-mmsys.c | 1 +
3 files changed, 156 insertions(+)
create mode 100644
This patch add support for mediatek SOC MT8183
1. add ovl private data
2. add rdma private data
3. add mutes private data
4. add main and external path module for crtc create
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 18
drivers/gpu/drm/mediatek
mediatek drm in patch 25
Yongqiang Niu (7):
dt-bindings: mediatek: add rdma_fifo_size description for mt8183
display
drm/mediatek: move ddp component define into mtk_mmsys.h
mtk-mmsys: add mmsys private data
mtk-mmsys: add mt8183 mmsys support
drm/mediatek: add fifo_size into rdma private
add description for mt8192 display
Signed-off-by: Yongqiang Niu
Reviewed-by: Chun-Kuang Hu
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings
This series are based on 5.11-rc1 and SoC MT8183,
and provide 15 patch to support mediatek SOC MT8192
Changes since v2:
- fix review comment in v2
- add pm runtime for gamma and color
- move ddp path select patch to mmsys series
- remove some useless patch
Yongqiang Niu (15):
dt-bindings
This patch add component OVL_2L2
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 81ed076..a715127 100644
--- a
This patch add component POSTMASK,
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/Makefile| 1 +
drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 160 +++
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +
drivers/gpu/drm/mediatek
add display node
Signed-off-by: Yongqiang Niu
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 134 +++
1 file changed, 134 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index e12e024..dcf9fdf 100644
This patch add component RDMA4
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index bc6b10a..fc01fea 100644
--- a/drivers
color power domain need controled in the device.
Signed-off-by: Yongqiang Niu
Signed-off-by: Yidi Lin
---
drivers/gpu/drm/mediatek/mtk_disp_color.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_color.c
b/drivers/gpu/drm/mediatek/mtk_disp_color.c
the orginal setting is not correct, fix it follow hardware data sheet.
if keep this error setting, mt8173/mt8183 display ok
but mt8192 display abnormal.
Fixes: 0664d1392c26 (drm/mediatek: Add AAL engine basic function)
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek
gamma power domain need controled in the device.
Signed-off-by: Yongqiang Niu
Signed-off-by: Yidi Lin
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
ccorr ctm matrix bits will be different in mt8192
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/Makefile | 3 +-
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 222
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 92 +---
drivers/gpu
Add DDP support for MT8192 SoC.
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 35 ++
1 file changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 1308046..7aa7fc3
enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index b47c238..4934bee
It's possible that state->base.fb is null. Add a check before access its
format.
Fixes: b6b1bb980ec4 ( drm/mediatek: Turn off Alpha bit when plane format has no
alpha)
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 2 +-
1 file changed, 1 insertion(+), 1
add support for mediatek SOC MT8192
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c| 6
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 20 +
drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 1 +
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6
add description for postmask
postmask is used control round corner for display frame
Signed-off-by: Yongqiang Niu
---
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/display/mediatek
matrix bits of mt8183 is 12
matrix bits of mt8192 is 13
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
b/drivers/gpu/drm/mediatek
On Thu, 2020-12-10 at 23:40 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月10日 週四 下午5:22寫道:
> >
> > rdma fifo size may be different even in same SOC, add this
> > property to the corresponding rdma
> >
> > Signed-off-by: Yongqiang
On Thu, 2020-12-10 at 23:50 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月10日 週四 下午5:08寫道:
> >
> > This patch add RDMA fifo size error handle
> > rdma fifo size will not always bigger than the calculated threshold
> > if that case happe
mmsys support
- add ovl mount on support
- add 2 more clock into mutex device
- fix ovl smi_id_en and fb null software bug
- fix ddp compoent size config bug
- add mt8192 drm support
- add ddp bypass shadow register function
- add 8192 dts description
Yongqiang Niu (17):
dt-bindings: mediatek: add
add description for postmask
Signed-off-by: Yongqiang Niu
---
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
b/Documentation/devicetree/bindings
fix dither size config
Fixes: 450aa87c7353 (drm/mediatek: add component DITHER)
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm
fix ccorr size config
Fixes: cefb6abfcc1c (drm/mediatek: add ddp component CCORR)
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm
This patch add component POSTMASK
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 31 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
include/linux/soc/mediatek/mtk-mmsys.h | 1 +
3 files changed, 33 insertions(+)
diff
there are 2 more clock need enable for display.
parser these clock when mutex device probe,
enable and disable when mutex on/off
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 49 --
1 file changed, 41 insertions(+), 8 deletions
It's possible that state->base.fb is null. Add a check before access its
format.
Fixes: b6b1bb980ec4 ( drm/mediatek: Turn off Alpha bit when plane format has no
alpha)
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 2 +-
1 file changed, 1 insertion(+), 1
Use function call for setting mmsys ovl mout register
Signed-off-by: Yongqiang Niu
---
drivers/soc/mediatek/mmsys/mtk-mmsys.c | 18 ++
include/linux/soc/mediatek/mtk-mmsys.h | 3 +++
2 files changed, 21 insertions(+)
diff --git a/drivers/soc/mediatek/mmsys/mtk-mmsys.c
b
add CLK_MM_DISP_CONFIG control description for mt8192 displa
Signed-off-by: Yongqiang Niu
---
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
b
This patch add component OVL_2L2
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
include/linux/soc/mediatek/mtk-mmsys.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek
add description for mt8192 display
Signed-off-by: Yongqiang Niu
---
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
b/Documentation
This patch add component RDMA4
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
include/linux/soc/mediatek/mtk-mmsys.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek
fix aal size config
Fixes: 0664d1392c26 (drm/mediatek: Add AAL engine basic function)
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b
add mt8192 mmsys support
Signed-off-by: Yongqiang Niu
---
drivers/soc/mediatek/mmsys/Makefile | 1 +
drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 119 ++
include/linux/soc/mediatek/mtk-mmsys.h| 1 +
3 files changed, 121 insertions(+)
create mode 100644
add display node
Signed-off-by: Yongqiang Niu
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 130 +++
1 file changed, 130 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 7c0c233..da681b0 100644
add support for mediatek SOC MT8192
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_color.c | 6
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 20 +
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6
drivers/gpu/drm/mediatek/mtk_drm_ddp.c| 35
fix gamma size config
Fixes: e0a5d3370245 (drm/mediatek: Add GAMMA engine basic function)
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu
enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index 8cf9f3b..97f8380
On Sat, 2020-12-05 at 15:35 +0800, Nicolas Boichat wrote:
> On Sat, Dec 5, 2020 at 12:18 PM Yongqiang Niu
> wrote:
> >
> > add control_by_sw private data
>
> Can you describe in a bit more details what this means?
gce works well without this patch, and it will be
On Wed, 2020-12-09 at 23:16 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Nicolas Boichat 於 2020年12月5日 週六 下午3:30寫道:
> >
> > On Sat, Dec 5, 2020 at 12:16 PM Yongqiang Niu
> > wrote:
> > >
> > > Add address shift when compose jump instruction
> &
On Thu, 2020-12-17 at 14:04 +0800, Hsin-Yi Wang wrote:
> On Wed, Dec 9, 2020 at 9:32 AM Yongqiang Niu
> wrote:
> >
> > Actually, setting the registers for routing, use multiple 'if-else' for
> > different
> > routes, but this code would be more and more c
On Tue, 2020-12-15 at 22:49 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月12日 週六 下午12:12寫道:
> >
> > add description for postmask
>
> What is postmask? I google it and find a postmask ECO. So it is postmask ECO?
>
> Regards,
> Chun
On Wed, 2020-12-16 at 23:17 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月12日 週六 下午12:12寫道:
> >
> > add CLK_MM_DISP_CONFIG control description for mt8192 displa
>
> display
>
> >
> > Signed-off-by: Yongqiang Niu
> > --
On Sun, 2020-12-13 at 09:15 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月12日 週六 下午12:12寫道:
> >
> > This patch add component OVL_2L2
>
> Break drm part and soc part into different patches.
>
> Regards,
> Chun-Kuang.
will be fix
On Tue, 2020-12-15 at 21:37 +0800, Nicolas Boichat wrote:
> On Sat, Dec 12, 2020 at 12:12 PM Yongqiang Niu
> wrote:
> >
> > there are 2 more clock need enable for display.
> > parser these clock when mutex device probe,
> > enable and disable when mutex on/off
> &
On Wed, 2020-12-16 at 23:10 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月12日 週六 下午12:22寫道:
> >
> > fix aal size config
> >
> > Fixes: 0664d1392c26 (drm/mediatek: Add AAL engine basic function)
> > Signed-off-by: Yongqiang Niu
On Tue, 2020-12-15 at 07:40 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月12日 週六 下午12:13寫道:
> >
> > fix gamma size config
>
> I would like you to provide more information. The original code works
> in mt8173, why do you modify this? Th
On Tue, 2020-12-15 at 21:42 +0800, Nicolas Boichat wrote:
> On Sat, Dec 12, 2020 at 12:13 PM Yongqiang Niu
> wrote:
> >
> > Use function call for setting mmsys ovl mout register
> >
> > Signed-off-by: Yongqiang Niu
> > ---
> > d
Change since v1:
-move out from mt8192 seri series
Yongqiang Niu (1):
soc: mediatek: cmdq: add address shift in jump
drivers/mailbox/mtk-cmdq-mailbox.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--
1.8.1.1.dirty
Add address shift when compose jump instruction
to compatible with 35bit format.
Fixes: 0858fde496f8 ("mailbox: cmdq: variablize address shift in platform")
Signed-off-by: Yongqiang Niu
Reviewed-by: Nicolas Boichat
---
drivers/mailbox/mtk-cmdq-mailbox.c | 3 ++-
1 file changed, 2
On Wed, 2020-12-23 at 16:34 +0800, Yongqiang Niu wrote:
> Add address shift when compose jump instruction
> to compatible with 35bit format.
>
> Fixes: 0858fde496f8 ("mailbox: cmdq: variablize address shift in platform")
>
> Signed-off-by: Yongqiang Niu
&g
On Tue, 2020-12-29 at 00:38 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月28日 週一 下午4:38寫道:
> >
> > Use function call for setting mmsys ovl mout register
> >
> > Signed-off-by: Yongqiang Niu
> > ---
> >
On Tue, 2020-12-29 at 00:38 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月28日 週一 下午4:38寫道:
> >
> > Use function call for setting mmsys ovl mout register
> >
> > Signed-off-by: Yongqiang Niu
> > ---
> >
Change since v1:
- move out shit jump patch
- rmove usless patch
Yongqiang Niu (3):
dt-binding: gce: add gce header file for mt8192
arm64: dts: mt8192: add gce node
mailbox: cmdq: add mt8192 support
.../devicetree/bindings/mailbox/mtk-gce.txt| 7 +-
arch/arm64/boot/dts/mediatek
add gce node
Signed-off-by: Yongqiang Niu
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 69d45c7..e9684a6 100644
--- a/arch/arm64/boot/dts
add mt8192 support
Signed-off-by: Yongqiang Niu
---
drivers/mailbox/mtk-cmdq-mailbox.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
b/drivers/mailbox/mtk-cmdq-mailbox.c
index 75378e3..7f243e1 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b
Add documentation for the mt8192 gce.
Add gce header file defined the gce hardware event,
subsys number and constant for mt8192.
Signed-off-by: Yongqiang Niu
---
.../devicetree/bindings/mailbox/mtk-gce.txt| 7 +-
include/dt-bindings/gce/mt8192-gce.h | 419
On Thu, 2020-12-24 at 22:28 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月24日 週四 上午8:55寫道:
> >
> > add mt8192 support
> >
> > Signed-off-by: Yongqiang Niu
> > ---
> > drivers/mailbox/mtk-cmdq-mailbox.c | 1 +
> >
The following series are intended to prepare the mtk-mmsys driver to
allow different DDP (Data Display Path) function call per SoC.
base change:
https://patchwork.kernel.org/project/linux-mediatek/patch/20201006193320.405529-4-enric.balle...@collabora.com/
Change since v2:
- fix review issue in v
This patch add component OVL_2L2
Signed-off-by: Yongqiang Niu
---
include/linux/soc/mediatek/mtk-mmsys.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/soc/mediatek/mtk-mmsys.h
b/include/linux/soc/mediatek/mtk-mmsys.h
index 4b6c514..42476c2 100644
--- a/include/linux/soc
the mmsys will more and more complicated after support
more and more SoCs, add an independent folder will be
more clear
Signed-off-by: Yongqiang Niu
---
drivers/soc/mediatek/Makefile | 2 +-
drivers/soc/mediatek/mmsys/Makefile| 2 +
drivers/soc/mediatek/mmsys/mtk-mmsys.c | 380
This patch add component POSTMASK
Signed-off-by: Yongqiang Niu
---
include/linux/soc/mediatek/mtk-mmsys.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/soc/mediatek/mtk-mmsys.h
b/include/linux/soc/mediatek/mtk-mmsys.h
index 42476c2..09ee424 100644
--- a/include/linux/soc
Actually, setting the registers for routing, use multiple 'if-else' for
different
routes, but this code would be more and more complicated while we
support more and more SoCs. Change that and use a function call per SoC so the
code will be more portable and clear.
Signed-off-by: Yon
Use function call for setting mmsys ovl mout register
Signed-off-by: Yongqiang Niu
---
drivers/soc/mediatek/mmsys/mtk-mmsys.c | 20
include/linux/soc/mediatek/mtk-mmsys.h | 3 +++
2 files changed, 23 insertions(+)
diff --git a/drivers/soc/mediatek/mmsys/mtk-mmsys.c
b
add mt8192 mmsys support
Signed-off-by: Yongqiang Niu
---
drivers/soc/mediatek/mmsys/Makefile | 1 +
drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 119 ++
drivers/soc/mediatek/mmsys/mtk-mmsys.c| 9 +++
include/linux/soc/mediatek/mtk-mmsys.h| 1 +
4
This patch add component RDMA4
Signed-off-by: Yongqiang Niu
---
include/linux/soc/mediatek/mtk-mmsys.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/soc/mediatek/mtk-mmsys.h
b/include/linux/soc/mediatek/mtk-mmsys.h
index 09ee424..aa4f60e 100644
--- a/include/linux/soc
add mt8183 function call for setting the routing registers
Signed-off-by: Yongqiang Niu
---
drivers/soc/mediatek/mmsys/Makefile | 1 +
drivers/soc/mediatek/mmsys/mt8183-mmsys.c | 90 +++
drivers/soc/mediatek/mmsys/mtk-mmsys.c| 1 +
include/linux/soc
On Mon, 2021-04-12 at 16:28 +0800, CK Hu wrote:
> Hi, Yongqiang:
>
> On Mon, 2021-04-12 at 14:35 +0800, Yongqiang Niu wrote:
> > gamma lut set in vsync active will caused display flash issue
> > set gamma lut with cmdq
>
> In MT8173, it's ok to set gammma
1 - 100 of 198 matches
Mail list logo