On Wed, 20 Aug 2014, atull wrote:
>
>
> On Wed, 20 Aug 2014, Romain Baeriswyl wrote:
>
> > From: Romain Baeriswyl
> >
> > Some legacy devices support ony I2C standard mode at 100kHz.
> > This patch allows to select the standard mode through the DTS
&g
On Fri, 15 Aug 2014, Steffen Trumtrar wrote:
>
> Hi!
Hello
Thanks for the feedback...
>
> ttha...@opensource.altera.com writes:
>
> > From: Thor Thayer
> >
> > Add the Altera SDRAM EDAC bindings and device tree changes to the Altera
> > SoC project.
> >
> > Signed-off-by: Thor Thayer
> >
Hello,
I am interested in adding functionality to be able to gate power supplies
going through a ltc2978. I see that there is a hwmon driver already
existing (hwmon/pmbus/ltc2978.c). I see some of the other hwmon drivers
have MFD's. It looks like this ltc driver would need a MFD and a
regul
From: Alan Tull
This core exports methods of doing operations on FPGAs.
EXPORT_SYMBOL_GPL(fpga_mgr_write);
Write FPGA given a buffer and count.
EXPORT_SYMBOL_GPL(fpga_mgr_firmware_write);
Request firmware and write that to a fpga
EXPORT_SYMBOL_GPL(fpga_mgr_status_get);
Get a status strin
From: Alan Tull
[resend with fixed email settings]
The idea of the framework is to provide consistent ways of
programming raw images into FPGA's.
Programming from device tree overlays is supported.
The core (fpga-mgr.c) does not include a userspace interface
and just exports kernel functions.
From: Alan Tull
Add basic sysfs interface. Only exports two files:
/sys/class/fpga_manager/fpga0/name
Name of low level driver.
/sys/class/fpga_manager/fpga0/status
status of fpga framework as returned by core
fpga-mgr.c's fpga_mgr_ops_framework_status
function or by the low level
From: Alan Tull
This driver allows programming the fpga from
device tree overlays.
This code is dependent on Pantelis Antoniou's current
work on Device Tree overlays, a method of dynamically
altering the kerel's live Device Tree. This patchset
was tested with Pantelis's and Grant Likely's stuff
From: Alan Tull
Supports standard ops for low level FPGA drivers.
Various manufacturors' FPGAs can be supported by adding low
level drivers. Each driver needs to register its ops
using fpga_mgr_register().
Exports methods of doing operations to program FPGAs. These
should be sufficient for ind
From: Alan Tull
Followup to "Yet another stab at a fpga framework"
(https://lkml.org/lkml/2014/8/1/517)
One of the problems with writing this framework has been the
wide variety of use cases. My perspective has mostly been
for a fpga bolted to a SoC. Having said that, I really hope
this can be
From: Alan Tull
Support programming the fpga from device tree overlays.
This patch adds one exported function to the core
(fpga-mgr.c): of_fpga_mgr_dev_lookup
Get pointer to fpga manager struct given a phandle.
This code is dependent on Pantelis Antoniou's current work
on Device Tree overlays
From: Alan Tull
Add documentation for new fpga manager sysfs interface.
Signed-off-by: Alan Tull
---
Documentation/ABI/testing/sysfs-class-fpga-manager | 38
1 file changed, 38 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-class-fpga-manager
diff --g
On Wed, 22 Oct 2014, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Support programming the fpga from device tree overlays.
>
> This patch adds one exported function to the core
> (fpga-mgr.c): of_fpga_mgr_dev_lookup
> Get pointer to fpga manager struct given a phandle.
>
> This co
On Wed, 29 Oct 2014, Pavel Machek wrote:
> Hi!
>
> > > > +Optional properties:
> > > > + - label : name that you want this bridge to show up as under
> > > > +/sys/class/fpga-bridge. Default is br if
> > > > this is
> > > > +not specified.
> > >
On Wed, 29 Oct 2014, Steffen Trumtrar wrote:
> Hi!
>
> On Tue, Oct 28, 2014 at 04:19:03PM -0500, atull wrote:
> > On Fri, 24 Oct 2014, Steffen Trumtrar wrote:
> >
> > > Hi!
> > >
> >
> > Hi,
> >
> > I see that my documentati
On Fri, 24 Oct 2014, Steffen Trumtrar wrote:
> Hi!
>
Hi,
I see that my documentation sucks and needs cleanup. I'll try to
answer some of the flames and get a more coherent version out soon.
> On Thu, Oct 23, 2014 at 06:51:06PM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
>
On Tue, 28 Oct 2014, atull wrote:
> On Fri, 24 Oct 2014, Steffen Trumtrar wrote:
> >
> > > + - init-val : 0 if driver should disable bridge at startup
> > > +1 if driver should enable bridge at startup
> > > +driv
On Wed, 29 Oct 2014, Steffen Trumtrar wrote:
> On Wed, Oct 29, 2014 at 10:16:32AM +, Mark Brown wrote:
> > On Wed, Oct 29, 2014 at 08:57:01AM +0100, Steffen Trumtrar wrote:
> >
> > > So, that shouldn't be a problem though, as I already cooked up a driver
> > > for
> > > the L3 with all the r
On Fri, 10 Oct 2014, atull wrote:
> On Thu, 9 Oct 2014, Steffen Trumtrar wrote:
>
> Hi Steffen,
>
> > Hi!
> >
> > On Thu, Oct 09, 2014 at 09:57:49AM -0500, atull wrote:
> > > On Thu, 9 Oct 2014, Steffen Trumtrar wrote:
> > >
> > > >
From: Alan Tull
Use WFI when putting CPU1 to sleep. Don't hold CPU1 in reset
since that results in increased power consumption.
Reset CPU1 briefly during CPU1 bootup.
This has been tested for hotplug and suspend/resume and results
in no increased power consumption.
Signed-off-by: Alan Tull
C
From: Alan Tull
Add code that requests that the sdr controller go into
self-refresh mode. This code is run from ocram.
This patch assumes that u-boot has already configured sdr:
sdr.ctrlcfg.lowpwreq.selfrfshmask = 3
sdr.ctrlcfg.lowpwrtiming.clkdisablecycles = 8
sdr.ctrlcfg.dramtiming4.sel
From: Alan Tull
Patch 1: socfpga: hotplug: put cpu1 in wfi
Use WFI when putting CPU1 to sleep. Don't hold CPU1 in reset
since that results in increased power consumption. Only
briefly reset CPU1.
Patch 2: socfpga: support suspend to ram
* allocate space in ocram using sram driver
* A
From: Alan Tull
Add support for simple on/off control of each channel.
To add regulator support, the pmbus part driver needs to add
regulator_desc information and number of regulators to its
pmbus_driver_info struct.
regulator_desc can be declared using default macro for a
regulator (PMBUS_REGU
From: Alan Tull
Add two helper functions:
* pmbus_write_byte_data = paged byte write
* pmbus_update_byte_data = paged byte read/modify/write
Signed-off-by: Alan Tull
Cc: Guenter Roeck
Cc: Mark Brown
---
v2: add prototypes for the two new functions
---
drivers/hwmon/pmbus/pmbus.h |
From: Alan Tull
Add simple on/off regulator support for ltc2978 and
other pmbus parts supported by ltc2978.c
Signed-off-by: Alan Tull
Cc: Guenter Roeck
Cc: Mark Brown
---
v2: Remove '#include '
Only one regulator per pmbus device
Get regulator_init_data from pdata or device tree
v3:
From: Alan Tull
Each output has individual on/off control.
New in v6:
* Much cleanup of the bindings document
* s/vout_en/vout/g
Hopefully this is getting closer. We will still have the potential problem of
repeated node names on boards on boards that have many regulators of the same
kind.
From: Alan Tull
Add device tree bindings documentation for ltc2978.
Signed-off-by: Alan Tull
Cc: Guenter Roeck
Cc: Mark Rutland
Cc: Mark Brown
---
v2: clean whitespace
v3: list compatible strings in single column
add vendor as lltc
mention regulators.txt instead of documenting regul
On Wed, 15 Oct 2014, Pavel Machek wrote:
> On Tue 2014-10-14 14:33:39, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add code that requests that the sdr controller go into
> > self-refresh mode. This code is run from ocram.
> >
> > This patch assumes that u-boot has already co
On Tue, 7 Oct 2014, Pavel Machek wrote:
> Hi!
>
> > From: Alan Tull
> >
> > Add code that requests that the sdr controller go into
> > self-refresh mode. This code is run from ocram.
> >
> > This patch assumes that u-boot has already configured sdr:
> > sdr.ctrlcfg.lowpwreq.selfrfshmask = 3
On Tue, 7 Oct 2014, Pavel Machek wrote:
> On Wed 2014-10-01 14:38:23, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Use WFI when putting CPU1 to sleep. Don't hold CPU1 in reset
> > since that results in increased power consumption.
> >
> > Reset CPU1 briefly during CPU1 bootup
On Fri, 3 Oct 2014, Mark Brown wrote:
> On Thu, Oct 02, 2014 at 01:37:50PM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add support for simple on/off control of each channel.
> >
> > To add regulator support, the pmbus part driver needs to add
> > regulator_desc informa
On Wed, 1 Oct 2014, Pavel Machek wrote:
> Hi!
>
> > From: Alan Tull
> >
> > Use WFI when putting CPU1 to sleep. Don't hold CPU1 in reset
> > since that results in increased power consumption.
> >
> > Reset CPU1 briefly during CPU1 bootup.
> >
> > This has been tested for hotplug and suspend/
From: Alan Tull
Add device tree bindings documentation for ltc2978.
Signed-off-by: Alan Tull
---
.../devicetree/bindings/hwmon/ltc2978.txt | 42
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/ltc2978.txt
diff --git
From: Alan Tull
Add support for simple on/off control of each channel.
To add regulator support, the pmbus part driver needs to add
regulator_desc information, of_regulator_match information,
and number of regulators to its pmbus_driver_info struct.
regulator_desc can be declared using default
From: Alan Tull
Add two helper functions:
* pmbus_write_byte_data = paged byte write
* pmbus_update_byte_data = paged byte read/modify/write
Signed-off-by: Alan Tull
---
drivers/hwmon/pmbus/pmbus_core.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/d
From: Alan Tull
This set of patches adds regulator support for pmbus_core.c and ltc2978.c
Each output has individual on/off control.
>From PMBus_Specification_Part_II_Rev_1-3_20140318.pdf:
12.1.1. OPERATION Command Bit [7]
Bit [7] controls whether the PMBus device output is on or off.
If b
On Wed, 1 Oct 2014, Pavel Machek wrote:
> Hi!
>
> > Add code that requests that the sdr controller go into
> > self-refresh mode. This code is run from ocram.
> >
> > This patch assumes that u-boot has already configured sdr:
> > sdr.ctrlcfg.lowpwreq.selfrfshmask = 3
> > sdr.ctrlcfg.lowpwrt
From: Alan Tull
Use WFI when putting CPU1 to sleep. Don't hold CPU1 in reset
since that results in increased power consumption.
Reset CPU1 briefly during CPU1 bootup.
This has been tested for hotplug and suspend/resume and results
in no increased power consumption.
Signed-off-by: Alan Tull
From: Alan Tull
Add code that requests that the sdr controller go into
self-refresh mode. This code is run from ocram.
This patch assumes that u-boot has already configured sdr:
sdr.ctrlcfg.lowpwreq.selfrfshmask = 3
sdr.ctrlcfg.lowpwrtiming.clkdisablecycles = 8
sdr.ctrlcfg.dramtiming4.sel
From: Alan Tull
Patch 1: socfpga: hotplug: put cpu1 in wfi
Fix how cpu1 is hotplugged to prevent increased power
consumption.
v2: no need to flush the caches
clean up spacing in comments
replace a register offset with a macro
Patch 2: socfpga: support suspend to ram
* allocate spa
From: Alan Tull
Add simple on/off regulator support for ltc2978 and
other pmbus parts supported by ltc2978.c
Signed-off-by: Alan Tull
v2: Remove '#include '
Only one regulator per pmbus device
Get regulator_init_data from pdata or device tree
v3: Support multiple regulators for each c
On Wed, 1 Oct 2014, Guenter Roeck wrote:
> On Wed, Oct 01, 2014 at 02:05:46PM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > This set of patches adds regulator support for pmbus_core.c and ltc2978.c
> >
> > Each output has individual on/off control.
> >
> > From PMBus_Sp
On Wed, 1 Oct 2014, Guenter Roeck wrote:
> On Wed, Oct 01, 2014 at 03:18:20PM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add simple on/off regulator support for ltc2978 and
> > other pmbus parts supported by ltc2978.c
> >
> > Signed-off-by: Alan Tull
> >
> > v2: Rem
On Wed, 1 Oct 2014, Guenter Roeck wrote:
> On Wed, Oct 01, 2014 at 03:18:20PM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add simple on/off regulator support for ltc2978 and
> > other pmbus parts supported by ltc2978.c
> >
> > Signed-off-by: Alan Tull
> >
> > v2: Rem
From: Alan Tull
Add device tree bindings documentation for ltc2978.
Signed-off-by: Alan Tull
---
v2: clean whitespace
---
.../devicetree/bindings/hwmon/ltc2978.txt | 41
1 file changed, 41 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon
From: Alan Tull
Each output has individual on/off control.
>From PMBus_Specification_Part_II_Rev_1-3_20140318.pdf:
12.1.1. OPERATION Command Bit [7]
Bit [7] controls whether the PMBus device output is on or off.
If bit [7] is cleared (equals 0), then the output is off.
If bit [7] is set
From: Alan Tull
Add simple on/off regulator support for ltc2978 and
other pmbus parts supported by ltc2978.c
Signed-off-by: Alan Tull
---
v2: Remove '#include '
Only one regulator per pmbus device
Get regulator_init_data from pdata or device tree
v3: Support multiple regulators for eac
From: Alan Tull
Add two helper functions:
* pmbus_write_byte_data = paged byte write
* pmbus_update_byte_data = paged byte read/modify/write
Signed-off-by: Alan Tull
---
v2: add prototypes for the two new functions
---
drivers/hwmon/pmbus/pmbus.h |4
drivers/hwmon/pmbus/pmbus_
From: Alan Tull
Add support for simple on/off control of each channel.
To add regulator support, the pmbus part driver needs to add
regulator_desc information and number of regulators to its
pmbus_driver_info struct.
regulator_desc can be declared using default macro for a
regulator (PMBUS_REGU
On Thu, 2 Oct 2014, Guenter Roeck wrote:
> On 10/02/2014 04:20 AM, Mark Brown wrote:
> > On Wed, Oct 01, 2014 at 02:05:49PM -0500, at...@opensource.altera.com wrote:
> > > From: Alan Tull
> > >
> > > Add support for simple on/off control of each channel.
> >
> > This is basically fine but the r
On Thu, 2 Oct 2014, Arnd Bergmann wrote:
> On Thursday 02 October 2014 01:16:46 Pavel Machek wrote:
> > > >
> > > > struct socfpga_reset_manager {
> > > > u32 status;
> > > > u32 ctrl;
> > > > u32 counts;
> > > > u32 padding1;
> > > > u32
On Wed, 1 Oct 2014, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Add code that requests that the sdr controller go into
> self-refresh mode. This code is run from ocram.
>
> This patch assumes that u-boot has already configured sdr:
> sdr.ctrlcfg.lowpwreq.selfrfshmask = 3
> sdr
From: Alan Tull
Followup to bridge framework that was posted on 2013/10/3
This is a driver for enabling/disabling the fpga bridges under control
of a sys entry. It has a common framework and individual drivers for
the various bridges.
This framework uses the reset driver where appropriate.
Al
From: Alan Tull
Add sysfs document for fpga bridges.
Signed-off-by: Alan Tull
---
Documentation/ABI/testing/sysfs-class-fpga-bridge |5 +
1 file changed, 5 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-class-fpga-bridge
diff --git a/Documentation/ABI/testing/sysfs-
From: Alan Tull
Add DTS binding documentation for the Altera FPGA bridges.
Signed-off-by: Alan Tull
---
.../bindings/fpga/altera-fpga2sdram-bridge.txt | 57
.../bindings/fpga/altera-hps2fpga-bridge.txt | 53 ++
2 files changed, 110 insertions(
From: Alan Tull
Support for bringing bridges out of reset. Bridges show up in sysfs
under /sys/class/fpga-bridge and can be enabled/disabled from sysfs
or from the device tree.
Supports enabling the following hps/fpga bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Control from sy
On Thu, 23 Oct 2014, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Followup to bridge framework that was posted on 2013/10/3
>
> This is a driver for enabling/disabling the fpga bridges under control
> of a sys entry. It has a common framework and individual drivers for
> the variou
On Fri, 24 Oct 2014, Pantelis Antoniou wrote:
> Hi Pavel,
>
> > On Oct 24, 2014, at 1:52 PM, Pavel Machek wrote:
> >
> > Hi!
> >
> >> * /sys/class/fpga_manager//firmware
> >> Name of FPGA image file to load using firmware class.
> >> $ echo image.rbf > /sys/class/fpga_manager//firmware
> >
On Fri, 24 Oct 2014, Pavel Machek wrote:
> On Thu 2014-10-23 18:51:05, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add sysfs document for fpga bridges.
> >
> > Signed-off-by: Alan Tull
> > ---
> > Documentation/ABI/testing/sysfs-class-fpga-bridge |5 +
> > 1 file ch
On Fri, 17 Jul 2015, atull wrote:
> On Fri, 17 Jul 2015, Jason Gunthorpe wrote:
>
> > On Fri, Jul 17, 2015 at 10:51:10AM -0500, at...@opensource.altera.com wrote:
> > > From: Alan Tull
> > >
> > > This patchset adds two chunks plus documentation:
On Wed, 22 Jul 2015, Jason Gunthorpe wrote:
> On Wed, Jul 22, 2015 at 03:32:32PM -0500, atull wrote:
>
> > I looked some more; I don't see a simple way of deferring probing until
> > after the filesystem is loaded (so that the image file would be
> > available), la
On Wed, 22 Jul 2015, Moritz Fischer wrote:
Hi Miritz,
> Hi Alan,
>
> a couple of small things I found while reworking the Zynq version to
> match the v9 patchset:
>
> On Fri, Jul 17, 2015 at 8:51 AM, wrote:
> > From: Alan Tull
> >
...
> > + ret = mgr->mops->write_complete(mgr);
>
> Co
On Thu, 23 Jul 2015, Greg KH wrote:
> On Fri, Jul 17, 2015 at 10:51:10AM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > This patchset adds two chunks plus documentation:
> > * fpga manager core: exports ABI functions that write an image to a FPGA
> > * DT Overlay support
On Thu, 23 Jul 2015, Jason Gunthorpe wrote:
> On Thu, Jul 23, 2015 at 02:55:52PM -0700, Moritz Fischer wrote:
> > Hi Alan,
> >
> > I saw that your socfpga driver doesn't support the partial reconfig
> > use case (not a big deal).
> > What I currently do for Zynq is if I'm doing a non-partial reco
On Fri, 24 Jul 2015, Pavel Machek wrote:
Hi Pavel,
Thanks for your your feedback in cleaning up these docs.
> Hi!
>
> > +What: /sys/class/fpga_manager//state
> > +Date: July 2015
> > +KernelVersion: 4.2
> > +Contact: Alan Tull
> > +Description: Read fpga m
On Mon, 17 Aug 2015, Pavel Machek wrote:
> On Thu 2015-08-13 12:37:29, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add a document spelling out usage of the simple fpga bus.
> >
> > Signed-off-by: Alan Tull
>
> Acked-by: Pavel Machek
>
From: Alan Tull
This patch set adds two chunks plus documentation:
* FPGA manager core: exports API functions that write an image to a FPGA
* DT Overlay support: simple-fpga-bus to handle FPGA from a DT overlay
The FPGA manager core is mature enough to be in the regular kernel.
simple-fpga-bu
From: Alan Tull
Add a document spelling out usage of the simple fpga bus.
Signed-off-by: Alan Tull
---
v9: Initial version of this patch in patchset
v10: s/fpga/FPGA/g
improve formatting
some rewriting
move to staging/simple-fpga-bus
---
.../Documentation/simple-fpga-bus.txt
From: Alan Tull
Add simple fpga bus. This is a bus that configures an fpga and its
bridges before populating the devices below it. This is intended
for use with device tree overlays.
Note that FPGA bridges are seen as reset controllers so no special
framework for FPGA bridges will need to be a
From: Alan Tull
New bindings document for simple fpga bus.
Signed-off-by: Alan Tull
---
v9: initial version added to this patchset
v10: s/fpga/FPGA/g
replace DT overlay example with slightly more complicated example
move to staging/simple-fpga-bus
---
.../Documentation/bindings/sim
From: Alan Tull
Add a document on the new FPGA manager core.
Signed-off-by: Alan Tull
---
v9: initial version where this patch was added
v10: requested cleanups to formatting and otherwise
s/fpga/FPGA/g
rewrite implementation section to not reference socfpga.c by name
other rew
From: Alan Tull
Add driver to fpga manager framework to allow configuration
of FPGA in Altera SoCFPGA parts.
Signed-off-by: Alan Tull
Acked-by: Michal Simek
---
v2: fpga_manager struct now contains struct device
fpga_manager_register parameters now take device
v3: skip a version to align
From: Alan Tull
Add a TODO document for the simple fpga bus.
Signed-off-by: Alan Tull
---
v10: This patch added in v10 of the patch set
---
drivers/staging/simple-fpga-bus/TODO | 13 +
1 file changed, 13 insertions(+)
create mode 100644 drivers/staging/simple-fpga-bus/TODO
diff
From: Alan Tull
API to support programming FPGA.
The following functions are exported as GPL:
* fpga_mgr_buf_load
Load fpga from image in buffer
* fpga_mgr_firmware_load
Request firmware and load it to the FPGA.
* fpga_mgr_register
* fpga_mgr_unregister
FPGA device drivers can be adde
From: Alan Tull
This patchset adds two chunks plus documentation:
* fpga manager core: exports API functions that write an image to a FPGA
* DT Overlay support: simple-fpga-bus to handle FPGA from a DT overlay
The fpga manager core is mature enough to be in the regular kernel.
simple-fpga-bus
From: Alan Tull
Add documentation under drivers/staging for new fpga manager's
sysfs interface.
Signed-off-by: Alan Tull
---
v5 : (actually second version, but keeping version numbers
aligned with rest of patch series)
Move document to drivers/staging/fpga/Documentation/ABI
v6 :
On Fri, 14 Aug 2015, Moritz Fischer wrote:
> Hi Alan,
>
> I've updated my Zynq driver (it can be found in an older version
> against your v8 in the Xilinx tree, too)
>
> https://github.com/mfischer/linux/tree/alan-fpga-mgr-v10
Since we are both already using this and have been for a while now,
On Thu, 13 Aug 2015, Moritz Fischer wrote:
Hi Moritz,
Thanks for the review. Will include your two nits in v11.
> Hi Alan,
>
> thanks for continuing to work on this :) A couple of minor nits ...
>
> On Thu, Aug 13, 2015 at 10:37 AM, wrote:
> > From: Alan Tull
> >
> > Add a document on the
On Fri, 14 Aug 2015, atull wrote:
> On Fri, 14 Aug 2015, Moritz Fischer wrote:
>
> > Hi Alan,
> >
> > I've updated my Zynq driver (it can be found in an older version
> > against your v8 in the Xilinx tree, too)
> >
> > https://github.com/mfischer
From: Alan Tull
This patchset adds two chunks plus documentation:
* fpga manager core: exports ABI functions that write an image to a FPGA
* DT Overlay support: simple-fpga-bus to handle FPGA from a DT overlay
The core's ABI is minimal to start with: only 6 functions. This gives a
common inte
From: Alan Tull
Add simple fpga bus. This is a bus that configures an fpga and its
bridges before populating the devices below it. This is intended
for use with device tree overlays.
Note that FPGA bridges are seen as reset controllers so no special
framework for FPGA bridges will need to be a
From: Alan Tull
New bindings document for simple fpga bus.
Signed-off-by: Alan Tull
---
.../Documentation/bindings/simple-fpga-bus.txt | 61
1 file changed, 61 insertions(+)
create mode 100644
drivers/staging/fpga/Documentation/bindings/simple-fpga-bus.txt
diff --
From: Alan Tull
Add a document spelling out usage of the simple fpga bus.
Signed-off-by: Alan Tull
---
.../staging/fpga/Documentation/simple-fpga-bus.txt | 48
1 file changed, 48 insertions(+)
create mode 100644 drivers/staging/fpga/Documentation/simple-fpga-bus.txt
di
From: Alan Tull
API to support programming FPGA.
The following functions are exported as GPL:
* fpga_mgr_buf_load
Load fpga from image in buffer
* fpga_mgr_firmware_load
Request firmware and load it to the FPGA.
* fpga_mgr_register
* fpga_mgr_unregister
FPGA device drivers can be adde
From: Alan Tull
Add a document on the new FPGA manager core.
Signed-off-by: Alan Tull
---
drivers/staging/fpga/Documentation/fpga-mgr.txt | 117 +++
1 file changed, 117 insertions(+)
create mode 100644 drivers/staging/fpga/Documentation/fpga-mgr.txt
diff --git a/drivers/
From: Alan Tull
Add documentation under drivers/staging for new fpga manager's
sysfs interface.
Signed-off-by: Alan Tull
---
v5 : (actually second version, but keeping version numbers
aligned with rest of patch series)
Move document to drivers/staging/fpga/Documentation/ABI
v6 :
From: Alan Tull
Add driver to fpga manager framework to allow configuration
of FPGA in Altera SoCFPGA parts.
Signed-off-by: Alan Tull
Acked-by: Michal Simek
---
v2: fpga_manager struct now contains struct device
fpga_manager_register parameters now take device
v3: skip a version to align
On Fri, 17 Jul 2015, Jason Gunthorpe wrote:
> On Fri, Jul 17, 2015 at 10:51:10AM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > This patchset adds two chunks plus documentation:
> > * fpga manager core: exports ABI functions that write an image to a FPGA
> > * DT Overlay
On Fri, 17 Jul 2015, Randy Dunlap wrote:
> On 07/17/15 08:51, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > ---
> > drivers/staging/Kconfig |2 +
> > drivers/staging/Makefile|1 +
> > drivers/staging/fpga/Kconfig| 14 ++
> > drivers/staging/fpga/Ma
On Fri, 17 Jul 2015, Steffen Trumtrar wrote:
> Hi!
>
> On Fri, Jul 17, 2015 at 10:51:13AM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > New bindings document for simple fpga bus.
> >
> > Signed-off-by: Alan Tull
> > ---
> > .../Documentation/bindings/simple-fpga-bus.t
On Fri, 17 Jul 2015, Moritz Fischer wrote:
Hi Moritz,
> Alan,
>
> it looks pretty good so far. I have worked with Michal and developed a
> Zynq equivalent against your last
> patchset which can be found in the Xilinx tree now.
>
> I just briefly glanced the changes below just two nits that caug
On Sun, 22 May 2016, Geert Uytterhoeven wrote:
> Submitters of device tree binding documentation may forget to CC
> the subsystem maintainer if this is missing.
>
> Signed-off-by: Geert Uytterhoeven
> Cc: Alan Tull
> Cc: Moritz Fischer
> ---
> Please apply this patch directly if you want to be
On Wed, 18 Nov 2015, Tobias Klauser wrote:
> If fpga_mgr_buf_load() fails, the firmware resource previously allocated
> by request_firmware() is leaked. Fix it by calling release_firmware()
> regardless of the return value of fpga_mgr_buf_load().
>
> Found by the Coverity scanner (CID 1339653).
>
On Tue, 17 Nov 2015, Moritz Fischer wrote:
> > Body has nothing specific what it is available only for CONFIG_PM that's
> > why it should just work.
>
> You're right. I'll resubmit once other people took another look. Not
> high priority ;-)
>
> Cheers,
>
> Moritz
>
Hi Moritz,
Looks good t
From: Alan Tull
This framework adds API functions for enabling/
disabling FPGA bridges under kernel control.
This allows the Linux kernel to disable FPGA bridges
during FPGA reprogramming and to enable FPGA bridges
when FPGA reprogramming is done. This framework is
be manufacturer-agnostic, all
From: Alan Tull
Supports Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Allows enabling/disabling the bridges through the FPGA
Bridge Framework API functions.
The fpga2sdram driver only supports enabling and disabling
of the ports that been configured early on. Thi
From: Alan Tull
New bindings document for simple fpga bus.
Signed-off-by: Alan Tull
---
v9: initial version added to this patchset
v10: s/fpga/FPGA/g
replace DT overlay example with slightly more complicated example
move to staging/simple-fpga-bus
v11: No change in this patch for v11
From: Alan Tull
Add bindings documentation for Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Signed-off-by: Alan Tull
Signed-off-by: Dinh Nguyen
Signed-off-by: Matthew Gerlach
---
v2: separate into 2 documents for the 2 drivers
v12: bump version to line up with
From: Alan Tull
The Simple FPGA Bus provides a manufacturer-agnostic interface
for reprogramming FPGAs using Device Tree Overlays. It uses the
FPGA Bridge Framework and the upstreamed FPGA Manager Framework.
When a Device Tree Overlay is applied, the Simple FPGA Bus will
use information the ove
From: Alan Tull
Add a document spelling out usage of the simple fpga bus.
Signed-off-by: Alan Tull
---
v9: Initial version of this patch in patchset
v10: s/fpga/FPGA/g
improve formatting
some rewriting
move to staging/simple-fpga-bus
v11: No change in this patch for v11 of the p
From: Alan Tull
The Simple FPGA bus uses the FPGA Manager Framework and the
FPGA Bridge Framework to provide a manufactorer-agnostic
interface for reprogramming FPGAs that is Device Tree
Overlays-based.
When a Device Tree Overlay containing a Simple FPGA Bus is
applied, the Simple FPGA Bus will
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