From: Honghui Zhang
Replace custom code with generic helper to retrieve driver data.
Signed-off-by: Honghui Zhang
---
drivers/memory/mtk-smi.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
index
From: Honghui Zhang
This patch add larbid descritptions for mediatek's gen1 smi larb hardware.
Acked-by: Rob Herring
Signed-off-by: Honghui Zhang
---
.../bindings/memory-controllers/mediatek,smi-larb.txt | 15 +++
1 file changed, 15 insertions(+)
diff --git
From: Honghui Zhang
MediaTek's PCIe host controller has two generation HWs, the new
generation HW has two root ports, it shares most probing flow with the
legacy controller. But the read/write config space logical is different
from the legacy controller. The per-port register must be touched for
From: Ryder Lee
This is a transitional patch. We currently use platfarm_get_resource() for
retrieving the IOMEM resources, but there might be some chips don't have
subsys/shared registers part, which depends on platform design, and these
will be introduced in further patches.
Switch this
From: Ryder Lee
In order to accommodate other SoC generations, this patch updates filename
to make it more generic, regroups specific properties by SoCs, and removes
redundant descriptions.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
Acked-by: Rob Herring
---
From: Ryder Lee
MediaTek's PCIe host controller has two generation HWs, the new
generation HW has two root ports, it shares most probing flow with the
legacy controller. But the read/write config space logical is different
from the legacy controller. The per-port register must be touched for
From: Ryder Lee
Add support for MediaTek new generation controller and update related
properities.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
Acked-by: Rob Herring
---
.../devicetree/bindings/pci/mediatek-pcie.txt | 168 -
1 file changed, 161
From: Honghui Zhang
Introduce a structure "mtk_pcie_soc" to abstract the differences between
controller generations, and the .startup() hook is used to encapsulate
some SoC-dependent related setting. In doing so, the common code which
will be reused by future chips.
Signed-off-by: Ryder Lee
From: Ryder Lee
Wait Gen2 training by using readl_poll_timeout() calls, and simplify
the hardware assert logical by merge it into the new interface
mtk_pcie_startup_ports.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
---
drivers/pci/host/pcie-mediatek.c | 52
From: Honghui Zhang
MediaTek's PCIe host controller has two generation HWs, MT2712 and MT7622
using the new generation HW, which has two root ports. They share most
probing flow with MT2701/MT7623. But the read/write config space logical
is different. The per-port registers must be touched for
From: Honghui Zhang
Rename "port->index" to "port->slot" since the ports are hardwired at
PCI_SLOT. Also rename "mtk_pcie_parse_ports" to "mtk_pcie_parse_port"
since it parses one port each time.
No functional change in this patch.
Signed-off-by: Honghui Zhang
---
From: Ryder Lee
MT2712 and MT7622 using a new IP block of Gen2 controller which has two
root ports and shares the same probing flow with MT2701/MT7623.
Both MT2712 and MT7622 have the same per-port control registers, but
there are slight differences between them:
MT7622 has more clocks than
From: Ryder Lee
Add controller support for mt2712/mt7622 and update related
properities.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
Acked-by: Rob Herring
---
.../devicetree/bindings/pci/mediatek-pcie.txt | 168 -
1 file changed, 161 insertions(+), 7
From: Honghui Zhang
Introduce a structure "mtk_pcie_soc" to abstract the differences between
controller generations, and the .startup() hook is used to encapsulate
some SoC-dependent related setting. In doing so, the common code which
will be reused by future chips.
Signed-off-by: Ryder Lee
From: Ryder Lee
In order to accommodate other SoC generations, this patch updates filename
to make it more generic, regroups specific properties by SoCs, and removes
redundant descriptions.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
Acked-by: Rob Herring
---
From: Ryder Lee
This is a transitional patch. We currently use platfarm_get_resource() for
retrieving the IOMEM resources, but there might be some chips don't have
subsys/shared registers part, which depends on platform design, and these
will be introduced in further patches.
Switch this
From: Ryder Lee
Wait Gen2 training by using readl_poll_timeout() calls, and simplify
the hardware assert logical by merge it into the new interface
mtk_pcie_startup_port.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
---
drivers/pci/host/pcie-mediatek.c | 52
From: Honghui Zhang
Commit ae02a6dda285 ("PCI: mediatek: Add controller support for MT2712 and
MT7622") has put the mtk_pcie * into bus->sysdata, take advantage of that
to get the private data and simplify the code.
Signed-off-by: Honghui Zhang
---
drivers/pci/host/pcie-mediatek.c | 3 +--
1
From: Honghui Zhang
MT2712 and MT7622's PCIe host controller support MSI, but only 32bit MSI
address are supportted. It connect to GIC with the same IRQ number of INTx
IRQ, so it shares the same IRQ with INTx IRQ.
This patch add MSI support for MT2712 and MT7622.
Signed-off-by: Honghui Zhang
From: Honghui Zhang
MT2712 and MT7622's PCIe host controller support MSI, but only 32bit MSI
address are supportted. It connect to GIC with the same IRQ number of INTx
IRQ, so it shares the same IRQ with INTx IRQ.
This patchset add MSI support for MT2712 and MT7622.
Also do some code fixup and
From: Honghui Zhang
In commit ae02a6dda285 ("PCI: mediatek: Add controller support for MT2712
and MT7622"), the function 'mtk_pcie_init_irq_domain', the pattern used to
check and return error is:
if (!var) {
dev_err(...);
return PTR_ERR(var);
}
The return value in such case is
From: Honghui Zhang
Replace custom code with generic helper to retrieve driver data.
Signed-off-by: Honghui Zhang
---
drivers/memory/mtk-smi.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
index
From: Honghui Zhang
Replace custom code with generic helper to retrieve driver data.
Signed-off-by: Honghui Zhang
---
drivers/memory/mtk-smi.c | 18 --
1 file changed, 4 insertions(+), 14 deletions(-)
diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
index
From: Honghui Zhang
Replace custom code with generic helper to retrieve driver data.
Signed-off-by: Honghui Zhang
---
drivers/memory/mtk-smi.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
index
From: Honghui Zhang
This patch add larbid descritptions for mediatek's gen1 smi larb hardware.
Signed-off-by: Honghui Zhang
---
.../bindings/memory-controllers/mediatek,smi-larb.txt | 15 +++
1 file changed, 15 insertions(+)
diff --git
From: Honghui Zhang
Add mediatek's hardware id information for smi larb.
Signed-off-by: Honghui Zhang
---
arch/arm/boot/dts/mt2701.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index f1efdc6..2cddbec 100644
---
From: Honghui Zhang
In the commit 3c8f4ad85c4b ("memory/mediatek: add support for mt2701"),
the larb->larbid was added but not initialized.
Mediatek's gen1 smi need this hardware larbid information to get the
register offset which controls whether enable iommu for this larb.
This patch add the
From: Honghui Zhang
Mediatek's gen1 smi need the hardware larbid to identify the offset for
the register which controls whether enable iommu for this larb.
In the commit 3c8f4ad85c4b ("memory/mediatek: add support for mt2701"),
the larbid was used without properly initialized. This patchset
From: Honghui Zhang
MediaTek's PCIe host controller has two generation HWs, the new
generation HW has two root ports, it shares most probing flow with the
legacy controller. But the read/write config space logical is different
from the lagacy controller.
This patchset abstract the common probing
From: Ryder Lee
Introduce a structure "mtk_pcie_soc" to abstract the differences between
controller generations, and the .startup() hook is used to encapsulate
some SoC-dependent related setting. In doing so, the common code which
will be reused by future chips.
In addition, we change the
From: Ryder Lee
Add support for new Gen2 controller which has two root ports and shares
the probing flow with legacy controller. Currently this IP block can be
found on MT7622/MT2712.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
---
drivers/pci/host/Kconfig | 5 +-
From: Ryder Lee
In order to accommodate other SoC generations, this patch updates filename
to make it more generic, regroups specific properties by SoCs, and removes
redundant descriptions.
Signed-off-by: Ryder Lee
---
...{mediatek,mt7623-pcie.txt => mediatek-pcie.txt} | 29
From: Ryder Lee
Add support for MediaTek new generation controller and update related
properities.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
---
.../devicetree/bindings/pci/mediatek-pcie.txt | 168 -
1 file changed, 161 insertions(+), 7 deletions(-)
diff
From: Ryder Lee
This is a transitional patch. We currently use platfarm_get_resource() for
retrieving the IOMEM resources, but there might be some chips don't have
subsys/shared registers part, which depends on platform design, and these
will be introduced in further patches.
Switch this
From: Ryder Lee
Add support for MediaTek new generation controller and update related
properities.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
---
.../devicetree/bindings/pci/mediatek-pcie.txt | 168 -
1 file changed, 161 insertions(+), 7 deletions(-)
diff
From: Honghui Zhang
Mediatek's gen1 smi need the hardware larbid to identify the offset for
the register which controls whether enable iommu for this larb.
In the commit 3c8f4ad85c4b ("memory/mediatek: add support for mt2701"),
the larbid was used without properly initialized. This patchset
From: Honghui Zhang
Add mediatek's hardware id information for smi larb.
Signed-off-by: Honghui Zhang
---
arch/arm/boot/dts/mt2701.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index f1efdc6..2cddbec 100644
---
From: Honghui Zhang
This patch add larbid descritptions for mediatek's gen1 smi larb hardware.
Signed-off-by: Honghui Zhang
---
.../bindings/memory-controllers/mediatek,smi-larb.txt | 15 +++
1 file changed, 15 insertions(+)
diff --git
From: Honghui Zhang
In the commit 3c8f4ad85c4b ("memory/mediatek: add support for mt2701"),
the larb->larbid was added but not initialized.
Mediatek's gen1 smi need this hardware larbid information to get the
register offset which controls whether enable iommu for this larb.
This patch add the
From: Honghui Zhang
MT7622's hardware default value of vendor ID and class type is not correct,
fix that by setup the correct values before linkup with Endpoint.
Signed-off-by: Honghui Zhang
---
drivers/pci/host/pcie-mediatek.c | 30 +++---
include/linux/pci_ids.h
From: Honghui Zhang
Using irq_chip solution to setup IRQs for the consistent with IRQ framework.
Signed-off-by: Honghui Zhang
---
drivers/pci/host/pcie-mediatek.c | 192 +--
1 file changed, 105 insertions(+), 87 deletions(-)
diff --git
From: Honghui Zhang
Two fixups for mediatek's host bridge:
The first patch fixup class type and vendor ID for MT7622.
The second patch fixup the IRQ handle routine by using irq_chip solution
to avoid IRQ reentry which may exist for both MT2712 and MT7622.
Change since v5:
- Make the comments
From: Honghui Zhang
MediaTek's PCIe host controller has two generation HWs, the new
generation HW has two root ports, it shares most probing flow with the
legacy controller. But the read/write config space logical is different
from the lagacy controller.
This patchset abstract the common probing
From: Ryder Lee
In order to accommodate other SoC generations, this patch updates filename
to make it more generic, regroups specific properties by SoCs, and removes
redundant descriptions.
Signed-off-by: Ryder Lee
---
...{mediatek,mt7623-pcie.txt => mediatek-pcie.txt} | 29
From: Ryder Lee
Introduce a structure "mtk_pcie_soc" to abstract the differences between
controller generations, and the .startup() hook is used to encapsulate
some SoC-dependent related setting. In doing so, the common code which
will be reused by future chips.
In addition, we change the
From: Ryder Lee
Add support for new Gen2 controller which has two root ports and shares the
probing flow with legacy controller. Currently this IP block can be found
on MT7622/MT2712. More specifically, the newer (future) chips will be
developed based on this generation, thus we use a generic
From: Ryder Lee
This is a transitional patch. We currently use platfarm_get_resource() for
retrieving the IOMEM resources, but there might be some chips don't have
subsys/shared registers part, which depends on platform design, and these
will be introduced in further patches.
Switch this
From: Ryder Lee
Add support for MediaTek new generation controller and update related
properities.
Signed-off-by: Ryder Lee
Signed-off-by: Honghui Zhang
---
.../devicetree/bindings/pci/mediatek-pcie.txt | 84 --
1 file changed, 79 insertions(+), 5 deletions(-)
diff
From: Honghui Zhang
The Class Code for subtractive decode PCI-to-PCI bridge is 060401h,
add one entry to make portdrv support this type bridge.
Signed-off-by: Honghui Zhang
---
drivers/pci/pcie/portdrv_pci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pci/pcie/portdrv_pci.c
From: Honghui Zhang
Two patches:
patch 1 fix the complain of scripts/coccinelle/api/resource_size.cocci
patch 2 enlarge the PCIe2AHB window size to support fully access of 4GB DRAM
from EP DMA.
v2:
- Fix the checkpatch complains for patch 1.
- update the commit message and change title of
From: Honghui Zhang
scripts/coccinelle/api/resource_size.cocci complain about the
following warning:
pcie-mediatek.c:720:13-16: WARNING: Suspicious code. resource_size is maybe
missing with mem
Use resource_size(mem) instead of mem->end - mem->start to eliminate the
complain. Since the MMIO
From: Honghui Zhang
The PCIE_AXI_WINDOW0 defines the translate window size for the request
from EP side. Request outside of this window will be treated as
unsupported request.
Enlarge this window size from fls(0x) to 2^33 to support 8GB
translate address range then EP DMA is capable of
From: Honghui Zhang
The MTCMOS of PCIe Host for MT2712 will be off when system suspend, and all
the internal control register will be reset after system resume. The PCIe
link should be re-established and the related control register values
should be re-set after system resume.
Signed-off-by:
From: Honghui Zhang
This patchset includes misc patchs:
The first patch fixup the mtk_pcie_find_port logical which will cause system
could not touch the EP's configuration space which was connected to PCIe slot 1.
The second patch fixup the enable msi logical, the operation to enable msi
From: Honghui Zhang
The clocks was not enabled when enable MSI. This patch fix this
issue by calling mtk_pcie_enable_msi in mtk_pcie_startup_port_v2
since the clock was all enabled at that time.
The function of mtk_pcie_startup_port_v2's define location is
re-arranged to avoid
From: Honghui Zhang
The MTCMOS of PCIe Host for MT2712 and MT7622 will be off when system
suspend, and all the internal control register will be reset after system
resume. The PCIe link should be re-established and the related control
register values should be re-set after system resume.
From: Honghui Zhang
Implement remove callback function for Mediatek PCIe driver to add
loadable kernel module support.
Signed-off-by: Honghui Zhang
Reviewed-by: Ryder Lee
---
drivers/pci/controller/Kconfig | 2 +-
drivers/pci/controller/pcie-mediatek.c | 63
From: Honghui Zhang
Mediatek's host controller have two slots, each have it's own control
registers. The host driver need to identify which slot was connected
in order to access the device's configuration space. There's problem
for current host driver to find out which slot was connected to for
From: Honghui Zhang
The clocks was not enabled when enable MSI. This patch fix this
issue by calling mtk_pcie_enable_msi in mtk_pcie_startup_port_v2
since the clock was all enabled at that time.
The function of mtk_pcie_startup_port_v2's define location is
re-arranged to avoid
From: Honghui Zhang
The Mediatek's host controller has two slots, each with it's own control
registers. The host driver need to identify which slot was connected
in order to access the device's configuration space. There's problem
for current host driver to find out which slot was connected to
From: Honghui Zhang
Implement remove callback function for Mediatek PCIe driver to add
loadable kernel module support.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/Kconfig | 2 +-
drivers/pci/controller/pcie-mediatek.c | 60 +++---
2 files
From: Honghui Zhang
This patchset includes misc patchs:
The first patch fixup the mtk_pcie_find_port logical which will cause system
could not touch the EP's configuration space which was connected to PCIe slot 1.
The second patch fixup the enable msi logical, the operation to enable msi
From: Honghui Zhang
The MTCMOS of PCIe Host for MT2712 and MT7622 will be off when system
suspend, and all the internal control register will be reset after system
resume. The PCIe link should be re-established and the related control
register values should be re-set after system resume.
From: Honghui Zhang
Implement remove callback function for Mediatek PCIe driver to add
loadable kernel module support.
Signed-off-by: Honghui Zhang
Reviewed-by: Ryder Lee
---
drivers/pci/controller/Kconfig | 2 +-
drivers/pci/controller/pcie-mediatek.c | 60
From: Honghui Zhang
This patchset includes misc patchs:
The first patch fixup the mtk_pcie_find_port logical which will cause system
could not touch the EP's configuration space which was connected to PCIe slot 1.
The second patch fixup the enable msi logical, the operation to enable msi
From: Honghui Zhang
The Mediatek's host controller has two slots, each with it's own control
registers. The host driver need to identify which slot was connected
in order to access the device's configuration space. There's problem
for current host driver to find out which slot was connected to
From: Honghui Zhang
The MTCMOS of PCIe Host for MT2712 and MT7622 will be off when system
suspend, and all the internal control register will be reset after system
resume. The PCIe link should be re-established and the related control
register values should be re-set after system resume.
From: Honghui Zhang
The clocks was not enabled when enable MSI. This patch fix this
issue by calling mtk_pcie_enable_msi in mtk_pcie_startup_port_v2
since the clock was all enabled at that time.
The function of mtk_pcie_startup_port_v2's define location is
re-arranged to avoid
From: Honghui Zhang
Use the devm_of_pci_get_host_bridge_resources() API in place of the PCI OF
DT parser.
Signed-off-by: Honghui Zhang
Acked-by: Ryder Lee
---
drivers/pci/controller/pcie-mediatek.c | 101 +
1 file changed, 27 insertions(+), 74 deletions(-)
From: Honghui Zhang
The "num-lanes" property for PCIe is not used, remove it.
Signed-off-by: Honghui Zhang
---
arch/arm/boot/dts/mt7623.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 1cdc346..4ca56d8 100644
---
From: Honghui Zhang
The "num-lanes" property in MediaTek's PCIe device node is not used by
its driver or anyone else, cleanup those related code.
Honghui Zhang (4):
PCI: mediatek: Remove un-used variant in struct mtk_pcie_port
dt-bindings: PCI: MediaTek: Remove un-used property
arm: dts:
From: Honghui Zhang
The "num-lanes" property for PCIe is not used, remove it.
Signed-off-by: Honghui Zhang
---
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
From: Honghui Zhang
The "lane" variant in struct mtk_pcie_port is not used, remove it.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
From: Honghui Zhang
The "num-lanes" property is not used, remove it.
Signed-off-by: Honghui Zhang
---
Documentation/devicetree/bindings/pci/mediatek-pcie.txt | 8
1 file changed, 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt
From: Honghui Zhang
The Class Code for subtractive decode PCI-to-PCI bridge is 060401h,
change the class_mask values to make portdrv support this type bridge.
Signed-off-by: Honghui Zhang
---
drivers/pci/pcie/portdrv_pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Honghui Zhang
Use the devm_of_pci_get_host_bridge_resources() API in place of the PCI OF
DT parser.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 109 +
1 file changed, 29 insertions(+), 80 deletions(-)
diff --git
From: Honghui Zhang
In order to reduce the PCIe power consuming while system suspend,
the physical layer should be gated. And the PCIe link should be
re-established and the related control register values should be
re-initialized after system resume.
Register suspend_noirq & resume_noirq
From: Honghui Zhang
This patchset includes misc patchs:
The patch 1 fixup the mtk_pcie_find_port logic which will cause system
could not touch the EP's configuration space that connected to PCIe slot 1.
The patch 2 fixup the class type for MT7622.
The patch 6 fixup the enable msi logic, the
From: Honghui Zhang
Part of mtk_pcie_register_host is an open-coded version of
pci_host_probe(). So instead of duplicating this code, use
pci_host_probe() directly and remove mtk_pcie_register_host.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 37
From: Honghui Zhang
The Mediatek's host controller has two slots, each with it's own control
registers. The host driver need to identify which slot was connected
in order to access the device's configuration space. There's problem
for current host driver to find out which slot was connected to
From: Honghui Zhang
This is a prepare patch to fix enable MSI logic, move the function's
define later to avoid forward declaration of mtk_pcie_enable_msi in
the future. No functional changed.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 138
From: Honghui Zhang
The commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class
type for MT7622") have set the class type for MT7622 as un-properly
value of PCI_CLASS_BRIDGE_HOST.
The PCIe controller of MT7622 is complexed with Root Port and PCI-to-PCI
bridge, the bridge has type 1
From: Honghui Zhang
Implement remove callback function for Mediatek PCIe driver to add
loadable kernel module support.
Signed-off-by: Honghui Zhang
Reviewed-by: Ryder Lee
---
drivers/pci/controller/Kconfig | 2 +-
drivers/pci/controller/pcie-mediatek.c | 51
From: Honghui Zhang
Need to save the PCIe's GIC IRQ for dispose_irq, this is a prepare
patch for add mediatek PCIe module support to tear down the IRQ, no
functional changed.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 9 ++---
1 file changed, 6
From: Honghui Zhang
The commit 43e6409db64d ("PCI: mediatek: Add MSI support for MT2712 and
MT7622") added MSI support but enable MSI in wrong place, clocks was not
enabled when enable MSI. This patch fix this issue by calling
mtk_pcie_enable_msi in mtk_pcie_startup_port_v2 since the clock was
From: Honghui Zhang
It's no needed to check whether device have pm_domain attached before
calling the pm_runtime_XXX interface, remove it.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
diff
From: Honghui Zhang
Part of mtk_pcie_register_host is an open-coded version of
pci_host_probe(). So instead of duplicating this code, use
pci_host_probe() directly and remove mtk_pcie_register_host.
Signed-off-by: Honghui Zhang
Acked-by: Ryder Lee
---
drivers/pci/controller/pcie-mediatek.c |
From: Honghui Zhang
This patchset includes misc patchs:
The patch 1 fixup the mtk_pcie_find_port logic which will cause system
could not touch the EP's configuration space that connected to PCIe slot 1.
The patch 2 fixup the class type for MT7622.
The patch 6 fixup the enable msi logic, the
From: Honghui Zhang
Implement remove callback function for Mediatek PCIe driver to add
loadable kernel module support.
Signed-off-by: Honghui Zhang
Reviewed-by: Ryder Lee
---
drivers/pci/controller/Kconfig | 2 +-
drivers/pci/controller/pcie-mediatek.c | 51
From: Honghui Zhang
It's no needed to check whether device have pm_domain attached before
calling the pm_runtime_XXX interface, remove it.
Signed-off-by: Honghui Zhang
Acked-by: Ryder Lee
---
drivers/pci/controller/pcie-mediatek.c | 18 ++
1 file changed, 6 insertions(+), 12
From: Honghui Zhang
This is a prepare patch to fix enable MSI logic, move the function's
define later to avoid forward declaration of mtk_pcie_enable_msi in
the future. No functional changed.
Signed-off-by: Honghui Zhang
Acked-by: Ryder Lee
---
drivers/pci/controller/pcie-mediatek.c | 138
From: Honghui Zhang
The commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class
type for MT7622") have set the class type for MT7622 as un-properly
value of PCI_CLASS_BRIDGE_HOST.
The PCIe controller of MT7622 is complexed with Root Port and PCI-to-PCI
bridge, the bridge has type 1
From: Honghui Zhang
The Mediatek's host controller has two slots, each with it's own control
registers. The host driver need to identify which slot was connected
in order to access the device's configuration space. There's problem
for current host driver to find out which slot was connected to
From: Honghui Zhang
In order to reduce the PCIe power consuming while system suspend,
the physical layer should be gated. And the PCIe link should be
re-established and the related control register values should be
re-initialized after system resume.
Register suspend_noirq & resume_noirq
From: Honghui Zhang
Need to save the PCIe's GIC IRQ for dispose_irq, this is a prepare
patch for add mediatek PCIe module support to tear down the IRQ, no
functional changed.
Signed-off-by: Honghui Zhang
Acked-by: Ryder Lee
---
drivers/pci/controller/pcie-mediatek.c | 9 ++---
1 file
From: Honghui Zhang
The commit 43e6409db64d ("PCI: mediatek: Add MSI support for MT2712 and
MT7622") added MSI support but enable MSI in wrong place, clocks was not
enabled when enable MSI. This patch fix this issue by calling
mtk_pcie_enable_msi in mtk_pcie_startup_port_v2 since the clock was
From: Honghui Zhang
The commit 43e6409db64d ("PCI: mediatek: Add MSI support for MT2712 and
MT7622") added MSI support but enable MSI in wrong place, clocks was not
enabled when enable MSI. This patch fix this issue by calling
mtk_pcie_enable_msi in mtk_pcie_startup_port_v2 since the clock was
From: Honghui Zhang
Implement remove callback function for Mediatek PCIe driver to add
loadable kernel module support.
Signed-off-by: Honghui Zhang
Reviewed-by: Ryder Lee
---
drivers/pci/controller/Kconfig | 2 +-
drivers/pci/controller/pcie-mediatek.c | 51
From: Honghui Zhang
In order to reduce the PCIe power consuming while system suspend,
the physical layer should be gated. And the PCIe link should be
re-established and the related control register values should be
re-initialized after system resume.
Register suspend_noirq & resume_noirq
From: Honghui Zhang
This patchset includes misc patchs:
The patch 1 fixup the mtk_pcie_find_port logic which will cause system
could not touch the EP's configuration space that connected to PCIe slot 1.
The patch fixup the PCI core defect which assign resource base on device's class
type.
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