On Wed, Jan 02, 2008 at 07:59:15PM +, Paulo Marques wrote:
> Xiaofan Chen wrote:
>> On Dec 30, 2007 11:53 AM, mgross <[EMAIL PROTECTED]> wrote:
>>> [...]
>>> What is the linux-usb policies on new drivers that could be
>>> implemented in user space?
bits of a libusb driver that does some of
what this driver does.
What do you think?
--mgross
Singed-off-by: Mark Gross <[EMAIL PROTECTED]>
---
Index: linux-2.6.24-rc6/drivers/usb/misc/pic18bl.c
===
--- /dev/null 1970-
On Sat, Dec 29, 2007 at 05:15:30PM -0500, Alan Stern wrote:
> On Sat, 29 Dec 2007, mgross wrote:
>
> > I'm playing around with a PIC based project at home (not an Intel
> > activity) and found I needed a usb driver to talk to the boot loader
> > so I can program my U
On Sun, Dec 30, 2007 at 10:40:45AM +0800, Xiaofan Chen wrote:
> On Dec 30, 2007 6:15 AM, Alan Stern <[EMAIL PROTECTED]> wrote:
> > On Sat, 29 Dec 2007, mgross wrote:
> >
> > > I'm playing around with a PIC based project at home (not an Intel
> > > activ
From: Srikanth Thokala
Provide overview of XLink PCIe driver implementation
Cc: Jonathan Corbet
Cc: linux-...@vger.kernel.org
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
Documentation/vpu/index.rst | 1 +
Documentation/vpu/xlink-pcie.rst | 90
From: Paul Murphy
Add DT bindings documentation for the Keem Bay VPU IPC driver.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Reviewed-by: Mark Gross
Co-developed-by: Daniele Alessandrelli
Signed-off-by: Paul Murphy
Signed-off-by: Daniele Alessandrelli
Signed-off-by: Mark Gross
---
.../
From: mark gross
The Intel VPU needs a complicated SW stack to make it work. Add a
directory to hold VPU related documentation including an architectural
overview of the SW stack that the patches implement.
Cc: Jonathan Corbet
Signed-off-by: Mark Gross
---
Documentation/index.rst
From: Daniele Alessandrelli
Add DT binding documentation for the Intel Keem Bay IPC driver, which
enables communication between the Computing Sub-System (CSS) and the
Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem
Bay.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Review
From: Daniele Alessandrelli
Add bindings for the Intel VPU IPC mailbox driver.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: Daniele Alessandrelli
Signed-off-by: Mark Gross
---
.../mailbox/intel,vpu-ipc-mailbox.yaml| 69 +++
MAINTAINERS
From: Srikanth Thokala
Move logic that can be reused between local host and remote host to
common/ folder
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/{local_host => common}/core.h |
From: Srikanth Thokala
Add logic to establish communication with the local host which is through
ring buffer management and MSI/Doorbell interrupts
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xl
From: Paul Murphy
Intel Keem Bay SoC contains a Vision Processing Unit (VPU) to enable
machine vision and other applications.
Enable Linux to control the VPU processor and provides an interface to
the Keem Bay IPC for communicating with the VPU firmware.
Specifically the driver provides the fol
From: Daniele Alessandrelli
On the Intel Movidius SoC code named Keem Bay, communication between the
Application Processor(AP) and the VPU is enabled by the Keem Bay
Inter-Processor
Communication (IPC) mechanism.
Add the driver for using Keem Bay IPC from within the Linux Kernel.
The IPC uses t
From: Seamus Kelly
Add device tree bindings for the xLink IPC driver which enables xLink to
control and communicate with the VPU IP present on the Intel Keem Bay
SoC.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Seamus Kelly
From: "C, Udhayakumar"
Add hddl device management documentation
The HDDL client driver acts as an software RTC to sync with network time.
It abstracts xlink protocol to communicate with remote IA host.
This driver exports the details about sensors available in the platform
to remote IA host as x
From: Srikanth Thokala
Add PCIe Endpoint driver that configures PCIe BARs and MSIs on the
Remote Host
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
MAINTAINERS | 2 +-
driver
From: "C, Udhayakumar"
Add IA host hddl device management driver for Intel Edge.AI Computer Vision
platforms.
About Intel Edge.AI Computer Vision platforms:
-
The Intel Edge.AI Computer Vision platforms are vision processing systems
targeting machine v
From: Srikanth Thokala
Add PCIe EPF driver for local host (lh) to configure BAR's and other
HW resources. Underlying PCIe HW controller is a Synopsys DWC PCIe core.
Cc: Derek Kiernan
Cc: Dragan Cvetic
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
From: Srikanth Thokala
Add Synopsys PCIe DWC core embedded-DMA functionality for local host
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/local_host/Makefile | 1 +
drivers/misc/xlink
From: Srikanth Thokala
Provide interface for XLink layer to interact with XLink PCIe transport
layer on both local host and remote host.
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/co
From: Mark Gross
The Intel Vision Processing Unit (VPU) is an IP block that is showing up for
the first time as part of the Keem Bay SOC. Keem Bay is a quad core A53 Arm
SOC. It is designed to be used as a stand alone SOC as well as in an PCIe
Vision Processing accelerator add in card.
This 6t
From: "Li, Tingqian"
Add DT binding schema for VPU on Keem Bay ASoC platform
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: Li Tingqian
Signed-off-by: Mark Gross
---
.../bindings/misc/intel,keembay-vpu-mgr.yaml | 48 +++
1 file changed, 48 insertions(+)
cre
From: Seamus Kelly
Enable VPU management including, enumeration, boot and runtime control.
Add APIs:
write control data:
used to transmit small, local data
start vpu:
calls boot_device API ( soon to be deprecated )
stop vpu
From: Seamus Kelly
Enable host system access to the VPU over the xlink protocol over PCIe by
enabling channel multiplexing and dispatching. This allows for remote host
communication channels across pcie links.
add dispatcher
update multiplexer to utilise dispatcher
xlink-core:
From: Seamus Kelly
Enable asynchronous channel and event communication.
Add APIs:
data ready callback:
The xLink Data Ready Callback function is used to
register a callback function that is invoked when data
From: "C, Udhayakumar"
Add keembey_thermal driver to expose on chip temperature
sensors, and register call back functions for periodic sampling.
This driver does following:
* Reads temperature data from on chip sensors present in Keem Bay
platform.
* Registers callback function to intel tsens
From: "C, Udhayakumar"
Add tsens ARM host thermal driver for Intel Edge.AI Computer Vision
platforms.
About Intel Edge.AI Computer Vision platforms:
-
The Intel Edge.AI Computer Vision platforms are vision processing systems
targeting machine vision ap
From: Seamus Kelly
Add device tree bindings for keembay-xlink.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Seamus Kelly
---
.../bindings/misc/intel,keembay-xlink.yaml| 29 +++
1 file changed, 29 insertio
From: "Li, Tingqian"
VPU IP on Keem Bay SOC is a vision acceleration IP complex
under the control of a RTOS-based firmware (running on RISC
MCU inside the VPU IP) serving user-space application
running on CPU side for HW accelerated computer vision tasks.
This module is kernel counterpart of the
From: Daniele Alessandrelli
Add mailbox controller enabling inter-processor communication (IPC)
between the CPU (aka, the Application Processor - AP) and the VPU on
Intel Movidius SoCs like Keem Bay.
The controller uses HW FIFOs to enable such communication. Specifically,
there are two FIFOs, on
From: Srikanth Thokala
Add logic to establish communication with the remote host which is through
ring buffer management and MSI/Doorbell interrupts
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/x
From: "C, Udhayakumar"
Add Intel tsens i2c slave driver for Intel Edge.AI Computer Vision
platforms.
The tsens i2c slave driver enables reading of on chip sensors present
in the Intel Edge.AI Computer Vision platforms. In the tsens i2c module
various junction and SoC temperatures are reported us
From: "C, Udhayakumar"
Add Intel tsens IA host driver for Intel Edge.AI Computer Vision
platforms.
About Intel Edge.AI Computer Vision platforms:
-
The Intel Edge.AI Computer Vision platforms are vision processing systems
targeting machine vision appli
From: Seamus Kelly
Add xLink driver, which interfaces the xLink Core driver with the Keem
Bay VPU IPC driver, thus enabling xLink to control and communicate with
the VPU IP present on the Intel Keem Bay SoC.
Specifically the driver enables xLink Core to:
* Boot / Reset the VPU IP
* Register to
From: Ramya P Karanth
Adds XLink SMBus driver for Intel Keem Bay SoC.
Xlink-smbus driver is a logical SMBus adapter which uses Xlink
(xlink-pcie) protocol as an interface. Keem Bay(s) vision accelerators
are connected to the server via PCI interface. The Server needs to know
the temperature of
From: "C, Udhayakumar"
Add device tree bindings for local host thermal sensors
Intel Edge.AI Computer Vision platforms.
The tsens module enables reading of on chip sensors present
in the Intel Bay series SoC. In the tsens module various junction
temperature and SoC temperature are reported using
From: "C, Udhayakumar"
Add local host hddl device management for Intel Edge.AI Computer Vision
platforms.
About Intel Edge.AI Computer Vision platforms:
-
The Intel Edge.AI Computer Vision platforms are vision processing systems
targeting machine visio
From: Seamus Kelly
Add xLink driver, which provides an abstracted control and communication
subsystem based on channel identification.
It is intended to support VPU technology both at SoC level as well as at
IP level, over multiple interfaces. This initial patch enables local hos
From: Srikanth Thokala
Add support to notify XLink layer upon PCIe link UP/DOWN events
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/common/core.h | 3 ++
drivers/misc/xlink-pcie/
From: mark gross
The Intel VPU needs a complicated SW stack to make it work. Add a
directory to hold VPU related documentation including an architectural
overview of the SW stack that the patches implement.
Cc: Jonathan Corbet
Signed-off-by: Mark Gross
---
Documentation/index.rst
From: "C, Udhayakumar"
Add Intel tsens IA host driver for Intel Edge.AI Computer Vision
platforms.
About Intel Edge.AI Computer Vision platforms:
-
The Intel Edge.AI Computer Vision platforms are vision processing systems
targeting machine vision appli
From: "Li, Tingqian"
VPU IP on Keem Bay SOC is a vision acceleration IP complex
under the control of a RTOS-based firmware (running on RISC
MCU inside the VPU IP) serving user-space application
running on CPU side for HW accelerated computer vision tasks.
This module is kernel counterpart of the
From: Srikanth Thokala
Add Synopsys PCIe DWC core embedded-DMA functionality for local host
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/local_host/Makefile | 1 +
drivers/misc/xlink-pcie/local_host/dma.c|
From: Daniele Alessandrelli
Add mailbox controller enabling inter-processor communication (IPC)
between the CPU (aka, the Application Processor - AP) and the VPU on
Intel Movidius SoCs like Keem Bay.
The controller uses HW FIFOs to enable such communication. Specifically,
there are two FIFOs, on
From: "C, Udhayakumar"
Add keembey_thermal driver to expose on chip temperature
sensors, and register call back functions for periodic sampling.
This driver does following:
* Reads temperature data from on chip sensors present in Keem Bay
platform.
* Registers callback function to intel tsens
From: "C, Udhayakumar"
Add tsens ARM host thermal driver for Intel Edge.AI Computer Vision
platforms.
About Intel Edge.AI Computer Vision platforms:
-
The Intel Edge.AI Computer Vision platforms are vision processing systems
targeting machine vision ap
From: Srikanth Thokala
Add PCIe Endpoint driver that configures PCIe BARs and MSIs on the
Remote Host
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
MAINTAINERS | 2 +-
driver
From: Srikanth Thokala
Move logic that can be reused between local host and remote host to
common/ folder
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/{local_host => common}/core.h | 8 +++-
drivers/misc/xl
From: Paul Murphy
Intel Keem Bay SoC contains a Vision Processing Unit (VPU) to enable
machine vision and other applications.
Enable Linux to control the VPU processor and provides an interface to
the Keem Bay IPC for communicating with the VPU firmware.
Specifically the driver provides the fol
From: Srikanth Thokala
Add logic to establish communication with the local host which is through
ring buffer management and MSI/Doorbell interrupts
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xl
From: "Li, Tingqian"
Add DT binding schema for VPU on Keem Bay ASoC platform
Signed-off-by: Li, Tingqian
---
.../bindings/misc/intel,keembay-vpu-mgr.yaml | 48 +++
1 file changed, 48 insertions(+)
create mode 100644
Documentation/devicetree/bindings/misc/intel,keembay-vpu
From: "C, Udhayakumar"
Add local host hddl device management for Intel Edge.AI Computer Vision
platforms.
About Intel Edge.AI Computer Vision platforms:
-
The Intel Edge.AI Computer Vision platforms are vision processing systems
targeting machine visio
From: Seamus Kelly
Enable host system access to the VPU over the xlink protocol over PCIe by
enabling channel multiplexing and dispatching. This allows for remote host
communication channels across pcie links.
add dispatcher
update multiplexer to utilise dispatcher
xlink-core:
From: Srikanth Thokala
Add PCIe EPF driver for local host (lh) to configure BAR's and other
HW resources. Underlying PCIe HW controller is a Synopsys DWC PCIe core.
Cc: Derek Kiernan
Cc: Dragan Cvetic
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Srikanth T
From: Srikanth Thokala
Add logic to establish communication with the local host which is through
ring buffer management and MSI/Doorbell interrupts
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/common/core.h
From: Srikanth Thokala
Add Synopsys PCIe DWC core embedded-DMA functionality for local host
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/local_host/Makefile | 1 +
drivers/misc/xlink
From: Srikanth Thokala
Add logic to establish communication with the remote host which is through
ring buffer management and MSI/Doorbell interrupts
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/local_host/Makefi
From: Mark Gross
The Intel Vision Processing Unit (VPU) is an IP block that is showing up for
the first time as part of the Keem Bay SOC. Keem Bay is a quad core A53 Arm
SOC. It is designed to be used as a stand alone SOC as well as in an PCIe
Vision Processing accelerator add in card.
This th
From: "C, Udhayakumar"
Add Intel tsens IA host driver for Intel Edge.AI Computer Vision
platforms.
About Intel Edge.AI Computer Vision platforms:
-
The Intel Edge.AI Computer Vision platforms are vision processing systems
targeting machine vision appli
From: Daniele Alessandrelli
On the Intel Movidius SoC code named Keem Bay, communication between the
Application Processor(AP) and the VPU is enabled by the Keem Bay
Inter-Processor
Communication (IPC) mechanism.
Add the driver for using Keem Bay IPC from within the Linux Kernel.
The IPC uses t
From: Srikanth Thokala
Move logic that can be reused between local host and remote host to
common/ folder
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/{local_host => common}/core.h |
From: Seamus Kelly
Enable VPU management including, enumeration, boot and runtime control.
Add APIs:
write control data:
used to transmit small, local data
start vpu:
calls boot_device API ( soon to be deprecated )
stop vpu
From: "C, Udhayakumar"
Add local host hddl device management for Intel Edge.AI Computer Vision
platforms.
About Intel Edge.AI Computer Vision platforms:
-
The Intel Edge.AI Computer Vision platforms are vision processing systems
targeting machine visio
From: "C, Udhayakumar"
Add IA host hddl device management driver for Intel Edge.AI Computer Vision
platforms.
About Intel Edge.AI Computer Vision platforms:
-
The Intel Edge.AI Computer Vision platforms are vision processing systems
targeting machine v
From: Srikanth Thokala
Add support to notify XLink layer upon PCIe link UP/DOWN events
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/common/core.h | 3 ++
drivers/misc/xlink-pcie/
From: Daniele Alessandrelli
Add DT binding documentation for the Intel Keem Bay IPC driver, which
enables communication between the Computing Sub-System (CSS) and the
Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem
Bay.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Review
From: "C, Udhayakumar"
Add keembey_thermal driver to expose on chip temperature
sensors, and register call back functions for periodic sampling.
This driver does following:
* Reads temperature data from on chip sensors present in Keem Bay
platform.
* Registers callback function to intel tsens
From: Daniele Alessandrelli
Add bindings for the Intel VPU IPC mailbox driver.
Signed-off-by: Daniele Alessandrelli
---
.../mailbox/intel,vpu-ipc-mailbox.yaml| 69 +++
MAINTAINERS | 6 ++
2 files changed, 75 insertions(+)
create mode
From: Seamus Kelly
Add device tree bindings for keembay-xlink.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Reviewed-by: Mark Gross
Signed-off-by: Seamus Kelly
Signed-off-by: Ryan Carnaghi
---
.../bindings/misc/intel,keembay-xlink.yaml| 27 +++
1 file changed, 27 inser
From: Srikanth Thokala
Add PCIe EPF driver for local host (lh) to configure BAR's and other
HW resources. Underlying PCIe HW controller is a Synopsys DWC PCIe core.
Cc: Derek Kiernan
Cc: Dragan Cvetic
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
From: Seamus Kelly
Enable asynchronous channel and event communication.
Add APIs:
data ready callback:
The xLink Data Ready Callback function is used to
register a callback function that is invoked when data
From: Srikanth Thokala
Provide interface for XLink layer to interact with XLink PCIe transport
layer on both local host and remote host.
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/common/interface.c | 107 ++
From: Seamus Kelly
Add xLink driver, which provides an abstracted control and communication
subsystem based on channel identification.
It is intended to support VPU technology both at SoC level as well as at
IP level, over multiple interfaces. This initial patch enables local hos
From: "Li, Tingqian"
VPU IP on Keem Bay SOC is a vision acceleration IP complex
under the control of a RTOS-based firmware (running on RISC
MCU inside the VPU IP) serving user-space application
running on CPU side for HW accelerated computer vision tasks.
This module is kernel counterpart of the
From: Mark Gross
The Intel Vision Processing Unit (VPU) is an IP block that is showing up for
the first time as part of the Keem Bay SOC. Keem Bay is a quad core A53 Arm
SOC. It is designed to be used as a stand alone SOC as well as in an PCIe
Vision Processing accelerator add in card.
This fo
From: Daniele Alessandrelli
Add mailbox controller enabling inter-processor communication (IPC)
between the CPU (aka, the Application Processor - AP) and the VPU on
Intel Movidius SoCs like Keem Bay.
The controller uses HW FIFOs to enable such communication. Specifically,
there are two FIFOs, on
From: Ramya P Karanth
Adds XLink SMBus driver for Intel Keem Bay SoC.
Xlink-smbus driver is a logical smbus adapter which uses Xlink
(xlink-pcie) protocol as an interface. Keem Bay(s) vision accelerators
are connected to the server via PCI interface. The Server needs to know
the temperature of
From: Daniele Alessandrelli
On the Intel Movidius SoC code named Keem Bay, communication between the
Application Processor(AP) and the VPU is enabled by the Keem Bay
Inter-Processor
Communication (IPC) mechanism.
Add the driver for using Keem Bay IPC from within the Linux Kernel.
The IPC uses t
From: "C, Udhayakumar"
Add Intel tsens i2c slave driver for Intel Edge.AI Computer Vision
platforms.
The tsens i2c slave driver enables reading of on chip sensors present
in the Intel Edge.AI Computer Vision platforms. In the tsens i2c module
various junction and SoC temperatures are reported us
From: "C, Udhayakumar"
Add hddl device management documentation
The HDDL client driver acts as an software RTC to sync with network time.
It abstracts xlink protocol to communicate with remote IA host.
This driver exports the details about sensors available in the platform
to remote IA host as x
From: "C, Udhayakumar"
Add Intel tsens i2c slave driver for Intel Edge.AI Computer Vision
platforms.
The tsens i2c slave driver enables reading of on chip sensors present
in the Intel Edge.AI Computer Vision platforms. In the tsens i2c module
various junction and SoC temperatures are reported us
From: Srikanth Thokala
Add PCIe Endpoint driver that configures PCIe BARs and MSIs on the
Remote Host
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
MAINTAINERS | 2 +-
drivers/misc/xlink-pcie/Kconfig
From: Seamus Kelly
Add device tree bindings for the xLink IPC driver which enables xLink to
control and communicate with the VPU IP present on the Intel Keem Bay
SoC.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Seamus Kelly
From: Seamus Kelly
Enable host system access to the VPU over the xlink protocol over PCIe by
enabling channel multiplexing and dispatching. This allows for remote host
communication channels across pcie links.
add dispatcher
update multiplexer to utilise dispatcher
xlink-core:
From: Paul Murphy
Intel Keem Bay SoC contains a Vision Processing Unit (VPU) to enable
machine vision and other applications.
Enable Linux to control the VPU processor and provides an interface to
the Keem Bay IPC for communicating with the VPU firmware.
Specifically the driver provides the fol
From: "C, Udhayakumar"
Add hddl device management documentation
The HDDL client driver acts as an software RTC to sync with network time.
It abstracts xlink protocol to communicate with remote IA host.
This driver exports the details about sensors available in the platform
to remote IA host as x
From: mark gross
The Intel VPU needs a complicated SW stack to make it work. Add a
directory to hold VPU related documentation including an architectural
overview of the SW stack that the patches implement.
Cc: Jonathan Corbet
Signed-off-by: Mark Gross
---
Documentation/index.rst
From: "C, Udhayakumar"
Add device tree bindings for local host thermal sensors
Intel Edge.AI Computer Vision platforms.
The tsens module enables reading of on chip sensors present
in the Intel Bay series SoC. In the tsens module various junction
temperature and SoC temperature are reported using
From: Srikanth Thokala
Provide overview of XLink PCIe driver implementation
Cc: Jonathan Corbet
Cc: linux-...@vger.kernel.org
Reviewed-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
Documentation/vpu/index.rst | 1 +
Documentation/vpu/xlink-pcie.rst | 90 +++
From: Seamus Kelly
Enable VPU management including, enumeration, boot and runtime control.
Add APIs:
write control data:
used to transmit small, local data
start vpu:
calls boot_device API ( soon to be deprecated )
stop vpu
From: Paul Murphy
Add DT bindings documentation for the Keem Bay VPU IPC driver.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Reviewed-by: Mark Gross
Signed-off-by: Paul Murphy
Co-developed-by: Daniele Alessandrelli
Signed-off-by: Daniele Alessandrelli
---
.../soc/intel/intel,keembay-vpu
From: Paul Murphy
Add DT bindings documentation for the Keem Bay VPU IPC driver.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Reviewed-by: Mark Gross
Co-developed-by: Daniele Alessandrelli
Signed-off-by: Paul Murphy
Signed-off-by: Daniele Alessandrelli
Signed-off-by: Mark Gross
---
.../
From: Srikanth Thokala
Provide interface for XLink layer to interact with XLink PCIe transport
layer on both local host and remote host.
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/xlink-pcie/co
From: Srikanth Thokala
Add logic to establish communication with the remote host which is through
ring buffer management and MSI/Doorbell interrupts
Cc: Arnd Bergmann
Cc: Greg Kroah-Hartman
Reviewed-by: Mark Gross
Signed-off-by: Mark Gross
Signed-off-by: Srikanth Thokala
---
drivers/misc/x
From: "C, Udhayakumar"
Add IA host hddl device management driver for Intel Edge.AI Computer Vision
platforms.
About Intel Edge.AI Computer Vision platforms:
-
The Intel Edge.AI Computer Vision platforms are vision processing systems
targeting machine v
From: Seamus Kelly
Add xLink driver, which interfaces the xLink Core driver with the Keem
Bay VPU IPC driver, thus enabling xLink to control and communicate with
the VPU IP present on the Intel Keem Bay SoC.
Specifically the driver enables xLink Core to:
* Boot / Reset the VPU IP
* Register to
From: Ramya P Karanth
Adds XLink SMBus driver for Intel Keem Bay SoC.
Xlink-smbus driver is a logical SMBus adapter which uses Xlink
(xlink-pcie) protocol as an interface. Keem Bay(s) vision accelerators
are connected to the server via PCI interface. The Server needs to know
the temperature of
From: "Li, Tingqian"
Add DT binding schema for VPU on Keem Bay ASoC platform
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: Li Tingqian
Signed-off-by: Mark Gross
---
.../bindings/misc/intel,keembay-vpu-mgr.yaml | 48 +++
1 file changed, 48 insertions(+)
cre
From: Seamus Kelly
Add xLink driver, which provides an abstracted control and communication
subsystem based on channel identification.
It is intended to support VPU technology both at SoC level as well as at
IP level, over multiple interfaces. This initial patch enables local hos
From: Seamus Kelly
Add xLink driver, which interfaces the xLink Core driver with the Keem
Bay VPU IPC driver, thus enabling xLink to control and communicate with
the VPU IP present on the Intel Keem Bay SoC.
Specifically the driver enables xLink Core to:
* Boot / Reset the VPU IP
* Register to
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