Re: [PATCH v1 1/1] ubifs: only check replay with inode type to judge if inode linked
Hi Richard,
Gentle ping.
On Tue, 2021-03-16 at 16:52 +0800, guochun@mediatek.com wrote:
> From: Guochun Mao
>
> Conside the following case, it just write a big file into flash,
> when complete writing, delete the file, and then power off promptly.
> Next time power on, we'll get a replay list like:
> ...
> LEB 1105:211344 len 4144 deletion 0 sqnum 428783 key type 1 inode 80
> LEB 15:233544 len 160 deletion 1 sqnum 428785 key type 0 inode 80
> LEB 1105:215488 len 4144 deletion 0 sqnum 428787 key type 1 inode 80
> ...
> In the replay list, data nodes' deletion are 0, and the inode node's
> deletion is 1. In current logic, the file's dentry will be removed,
> but inode and the flash space it occupied will be reserved.
> User will see that much free space been disappeared.
>
> We only need to check the deletion value of the following inode type
> node of the replay entry.
>
> Signed-off-by: Guochun Mao
> ---
> fs/ubifs/replay.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/fs/ubifs/replay.c b/fs/ubifs/replay.c
> index 0f8a6a16421b..1929ec63a0cb 100644
> --- a/fs/ubifs/replay.c
> +++ b/fs/ubifs/replay.c
> @@ -223,7 +223,8 @@ static bool inode_still_linked(struct ubifs_info *c,
> struct replay_entry *rino)
>*/
> list_for_each_entry_reverse(r, >replay_list, list) {
> ubifs_assert(c, r->sqnum >= rino->sqnum);
> - if (key_inum(c, >key) == key_inum(c, >key))
> + if (key_inum(c, >key) == key_inum(c, >key) &&
> + key_type(c, >key) == UBIFS_INO_KEY)
> return r->deletion == 0;
>
> }
Re: [PATCH v1 2/3] mtd: spi-nor: mtk-quadspi: add SNOR_HWCAPS_READ for capcity setting
On Tue, 2019-01-15 at 06:59 +, tudor.amba...@microchip.com wrote:
> Hi, Ryder,
>
> On 01/14/2019 07:12 AM, Ryder Lee wrote:
> > From: Guochun Mao
> >
> > SNOR_HWCAPS_READ is a basic read mode for both flash and controller,
> > it should be supported, so add the capcity for mtk-quadspi.
>
> Since I couldn't find a datasheet for mt8173, I tend to share your assumption
> -
> SNOR_HWCAPS_READ should be supported by this controller. However, it's always
> better to test it and not rely on assumptions. You can test it by forcing the
> mask to have just SNOR_HWCAPS_READ | SNOR_HWCAPS_PP set. Or you already
> tested it?
Our IPs all support SNOR_HWCAPS_READ, Ryedr and I have test it.
>
> You have a typo in capcity. Maybe substitute it with capability or "add this
> flag to spi_nor_hwcaps mask"
Ok, we'll correct it next version.
Thanks.
Guochun
>
> >
> > Signed-off-by: Guochun Mao
>
> You should add your SoB tag, because you are sending a patch that is not
> yours.
>
> Cheers,
> ta
>
> > ---
> > Changes since v1: none.
> > ---
> > drivers/mtd/spi-nor/mtk-quadspi.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
> > b/drivers/mtd/spi-nor/mtk-quadspi.c
> > index 5442993..d9eed68 100644
> > --- a/drivers/mtd/spi-nor/mtk-quadspi.c
> > +++ b/drivers/mtd/spi-nor/mtk-quadspi.c
> > @@ -431,7 +431,8 @@ static int mtk_nor_init(struct mtk_nor *mtk_nor,
> > struct device_node *flash_node)
> > {
> > const struct spi_nor_hwcaps hwcaps = {
> > - .mask = SNOR_HWCAPS_READ_FAST |
> > + .mask = SNOR_HWCAPS_READ |
> > + SNOR_HWCAPS_READ_FAST |
> > SNOR_HWCAPS_READ_1_1_2 |
> > SNOR_HWCAPS_PP,
> > };
> >
Re: [RESEND PATCH 2/4] mtd: spi-nor: mtk-quadspi: use ofpart for parsing partitions
On Thu, 2018-12-06 at 15:36 +0100, Boris Brezillon wrote: > On Thu, 29 Nov 2018 14:29:54 +0800 > Ryder Lee wrote: > > > From: Guochun Mao > > > > Replace mtd_device_register with mtd_device_parse_register for > > parsing partitions and add ofpart support. > > What's the problem with the default partition parser table [1]? > > [1]https://elixir.bootlin.com/linux/latest/source/drivers/mtd/mtdpart.c#L793 No problem here. This patch can be dropped. Please help review others. Thanks.
Re: [RESEND PATCH 2/4] mtd: spi-nor: mtk-quadspi: use ofpart for parsing partitions
On Thu, 2018-12-06 at 15:36 +0100, Boris Brezillon wrote: > On Thu, 29 Nov 2018 14:29:54 +0800 > Ryder Lee wrote: > > > From: Guochun Mao > > > > Replace mtd_device_register with mtd_device_parse_register for > > parsing partitions and add ofpart support. > > What's the problem with the default partition parser table [1]? > > [1]https://elixir.bootlin.com/linux/latest/source/drivers/mtd/mtdpart.c#L793 No problem here. This patch can be dropped. Please help review others. Thanks.
Re: [PATCH] mtd: mtk-nor: modify functions' name more generally
Hi Cyrille, Thank you very much. BR, Guochun Mao On Sun, 2018-01-14 at 16:23 +0100, Cyrille Pitchen wrote: > Le 18/12/2017 à 02:47, Guochun Mao a écrit : > > Since more and more Mediatek's SoC can use this driver to > > control spi-nor flash, functions' name with "mt8173_" is > > no longer properly. Replacing "mt8173_" with "mtk_" will > > be more accurate to describe these functions' usable scope. > > > > Signed-off-by: Guochun Mao <guochun@mediatek.com> > > Applied to the spi-nor/next branch of linux-mtd > > Thanks! > > > --- > > drivers/mtd/spi-nor/mtk-quadspi.c | 240 > > ++--- > > 1 file changed, 120 insertions(+), 120 deletions(-) > >
Re: [PATCH] mtd: mtk-nor: modify functions' name more generally
Hi Cyrille, Thank you very much. BR, Guochun Mao On Sun, 2018-01-14 at 16:23 +0100, Cyrille Pitchen wrote: > Le 18/12/2017 à 02:47, Guochun Mao a écrit : > > Since more and more Mediatek's SoC can use this driver to > > control spi-nor flash, functions' name with "mt8173_" is > > no longer properly. Replacing "mt8173_" with "mtk_" will > > be more accurate to describe these functions' usable scope. > > > > Signed-off-by: Guochun Mao > > Applied to the spi-nor/next branch of linux-mtd > > Thanks! > > > --- > > drivers/mtd/spi-nor/mtk-quadspi.c | 240 > > ++--- > > 1 file changed, 120 insertions(+), 120 deletions(-) > >
Re: [PATCH] mtd: mtk-nor: modify functions' name more generally
Hi Cyrille,
Gentle ping...
BR,
Guochun
On Mon, 2017-12-18 at 09:47 +0800, Guochun Mao wrote:
> Since more and more Mediatek's SoC can use this driver to
> control spi-nor flash, functions' name with "mt8173_" is
> no longer properly. Replacing "mt8173_" with "mtk_" will
> be more accurate to describe these functions' usable scope.
>
> Signed-off-by: Guochun Mao <guochun@mediatek.com>
> ---
> drivers/mtd/spi-nor/mtk-quadspi.c | 240
> ++---
> 1 file changed, 120 insertions(+), 120 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
> b/drivers/mtd/spi-nor/mtk-quadspi.c
> index abe455c..5442993 100644
> --- a/drivers/mtd/spi-nor/mtk-quadspi.c
> +++ b/drivers/mtd/spi-nor/mtk-quadspi.c
> @@ -110,7 +110,7 @@
> #define MTK_NOR_PRG_REG(n) (MTK_NOR_PRGDATA0_REG + 4 * (n))
> #define MTK_NOR_SHREG(n) (MTK_NOR_SHREG0_REG + 4 * (n))
>
> -struct mt8173_nor {
> +struct mtk_nor {
> struct spi_nor nor;
> struct device *dev;
> void __iomem *base; /* nor flash base address */
> @@ -118,48 +118,48 @@ struct mt8173_nor {
> struct clk *nor_clk;
> };
>
> -static void mt8173_nor_set_read_mode(struct mt8173_nor *mt8173_nor)
> +static void mtk_nor_set_read_mode(struct mtk_nor *mtk_nor)
> {
> - struct spi_nor *nor = _nor->nor;
> + struct spi_nor *nor = _nor->nor;
>
> switch (nor->read_proto) {
> case SNOR_PROTO_1_1_1:
> - writeb(nor->read_opcode, mt8173_nor->base +
> + writeb(nor->read_opcode, mtk_nor->base +
> MTK_NOR_PRGDATA3_REG);
> - writeb(MTK_NOR_FAST_READ, mt8173_nor->base +
> + writeb(MTK_NOR_FAST_READ, mtk_nor->base +
> MTK_NOR_CFG1_REG);
> break;
> case SNOR_PROTO_1_1_2:
> - writeb(nor->read_opcode, mt8173_nor->base +
> + writeb(nor->read_opcode, mtk_nor->base +
> MTK_NOR_PRGDATA3_REG);
> - writeb(MTK_NOR_DUAL_READ_EN, mt8173_nor->base +
> + writeb(MTK_NOR_DUAL_READ_EN, mtk_nor->base +
> MTK_NOR_DUAL_REG);
> break;
> case SNOR_PROTO_1_1_4:
> - writeb(nor->read_opcode, mt8173_nor->base +
> + writeb(nor->read_opcode, mtk_nor->base +
> MTK_NOR_PRGDATA4_REG);
> - writeb(MTK_NOR_QUAD_READ_EN, mt8173_nor->base +
> + writeb(MTK_NOR_QUAD_READ_EN, mtk_nor->base +
> MTK_NOR_DUAL_REG);
> break;
> default:
> - writeb(MTK_NOR_DUAL_DISABLE, mt8173_nor->base +
> + writeb(MTK_NOR_DUAL_DISABLE, mtk_nor->base +
> MTK_NOR_DUAL_REG);
> break;
> }
> }
>
> -static int mt8173_nor_execute_cmd(struct mt8173_nor *mt8173_nor, u8 cmdval)
> +static int mtk_nor_execute_cmd(struct mtk_nor *mtk_nor, u8 cmdval)
> {
> int reg;
> u8 val = cmdval & 0x1f;
>
> - writeb(cmdval, mt8173_nor->base + MTK_NOR_CMD_REG);
> - return readl_poll_timeout(mt8173_nor->base + MTK_NOR_CMD_REG, reg,
> + writeb(cmdval, mtk_nor->base + MTK_NOR_CMD_REG);
> + return readl_poll_timeout(mtk_nor->base + MTK_NOR_CMD_REG, reg,
> !(reg & val), 100, 1);
> }
>
> -static int mt8173_nor_do_tx_rx(struct mt8173_nor *mt8173_nor, u8 op,
> -u8 *tx, int txlen, u8 *rx, int rxlen)
> +static int mtk_nor_do_tx_rx(struct mtk_nor *mtk_nor, u8 op,
> + u8 *tx, int txlen, u8 *rx, int rxlen)
> {
> int len = 1 + txlen + rxlen;
> int i, ret, idx;
> @@ -167,26 +167,26 @@ static int mt8173_nor_do_tx_rx(struct mt8173_nor
> *mt8173_nor, u8 op,
> if (len > MTK_NOR_MAX_SHIFT)
> return -EINVAL;
>
> - writeb(len * 8, mt8173_nor->base + MTK_NOR_CNT_REG);
> + writeb(len * 8, mtk_nor->base + MTK_NOR_CNT_REG);
>
> /* start at PRGDATA5, go down to PRGDATA0 */
> idx = MTK_NOR_MAX_RX_TX_SHIFT - 1;
>
> /* opcode */
> - writeb(op, mt8173_nor->base + MTK_NOR_PRG_REG(idx));
> + writeb(op, mtk_nor->base + MTK_NOR_PRG_REG(idx));
> idx--;
>
> /* program TX data */
> for (i = 0; i < txlen; i++, idx--)
> - writeb(tx[i], mt8173_nor->base + MTK_NOR_PRG_REG(idx));
> + writeb(tx[i], mtk_nor->base + MTK_NOR_PRG_REG(idx));
>
> /* clear out rest of TX registers */
> while (idx
Re: [PATCH] mtd: mtk-nor: modify functions' name more generally
Hi Cyrille,
Gentle ping...
BR,
Guochun
On Mon, 2017-12-18 at 09:47 +0800, Guochun Mao wrote:
> Since more and more Mediatek's SoC can use this driver to
> control spi-nor flash, functions' name with "mt8173_" is
> no longer properly. Replacing "mt8173_" with "mtk_" will
> be more accurate to describe these functions' usable scope.
>
> Signed-off-by: Guochun Mao
> ---
> drivers/mtd/spi-nor/mtk-quadspi.c | 240
> ++---
> 1 file changed, 120 insertions(+), 120 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
> b/drivers/mtd/spi-nor/mtk-quadspi.c
> index abe455c..5442993 100644
> --- a/drivers/mtd/spi-nor/mtk-quadspi.c
> +++ b/drivers/mtd/spi-nor/mtk-quadspi.c
> @@ -110,7 +110,7 @@
> #define MTK_NOR_PRG_REG(n) (MTK_NOR_PRGDATA0_REG + 4 * (n))
> #define MTK_NOR_SHREG(n) (MTK_NOR_SHREG0_REG + 4 * (n))
>
> -struct mt8173_nor {
> +struct mtk_nor {
> struct spi_nor nor;
> struct device *dev;
> void __iomem *base; /* nor flash base address */
> @@ -118,48 +118,48 @@ struct mt8173_nor {
> struct clk *nor_clk;
> };
>
> -static void mt8173_nor_set_read_mode(struct mt8173_nor *mt8173_nor)
> +static void mtk_nor_set_read_mode(struct mtk_nor *mtk_nor)
> {
> - struct spi_nor *nor = _nor->nor;
> + struct spi_nor *nor = _nor->nor;
>
> switch (nor->read_proto) {
> case SNOR_PROTO_1_1_1:
> - writeb(nor->read_opcode, mt8173_nor->base +
> + writeb(nor->read_opcode, mtk_nor->base +
> MTK_NOR_PRGDATA3_REG);
> - writeb(MTK_NOR_FAST_READ, mt8173_nor->base +
> + writeb(MTK_NOR_FAST_READ, mtk_nor->base +
> MTK_NOR_CFG1_REG);
> break;
> case SNOR_PROTO_1_1_2:
> - writeb(nor->read_opcode, mt8173_nor->base +
> + writeb(nor->read_opcode, mtk_nor->base +
> MTK_NOR_PRGDATA3_REG);
> - writeb(MTK_NOR_DUAL_READ_EN, mt8173_nor->base +
> + writeb(MTK_NOR_DUAL_READ_EN, mtk_nor->base +
> MTK_NOR_DUAL_REG);
> break;
> case SNOR_PROTO_1_1_4:
> - writeb(nor->read_opcode, mt8173_nor->base +
> + writeb(nor->read_opcode, mtk_nor->base +
> MTK_NOR_PRGDATA4_REG);
> - writeb(MTK_NOR_QUAD_READ_EN, mt8173_nor->base +
> + writeb(MTK_NOR_QUAD_READ_EN, mtk_nor->base +
> MTK_NOR_DUAL_REG);
> break;
> default:
> - writeb(MTK_NOR_DUAL_DISABLE, mt8173_nor->base +
> + writeb(MTK_NOR_DUAL_DISABLE, mtk_nor->base +
> MTK_NOR_DUAL_REG);
> break;
> }
> }
>
> -static int mt8173_nor_execute_cmd(struct mt8173_nor *mt8173_nor, u8 cmdval)
> +static int mtk_nor_execute_cmd(struct mtk_nor *mtk_nor, u8 cmdval)
> {
> int reg;
> u8 val = cmdval & 0x1f;
>
> - writeb(cmdval, mt8173_nor->base + MTK_NOR_CMD_REG);
> - return readl_poll_timeout(mt8173_nor->base + MTK_NOR_CMD_REG, reg,
> + writeb(cmdval, mtk_nor->base + MTK_NOR_CMD_REG);
> + return readl_poll_timeout(mtk_nor->base + MTK_NOR_CMD_REG, reg,
> !(reg & val), 100, 1);
> }
>
> -static int mt8173_nor_do_tx_rx(struct mt8173_nor *mt8173_nor, u8 op,
> -u8 *tx, int txlen, u8 *rx, int rxlen)
> +static int mtk_nor_do_tx_rx(struct mtk_nor *mtk_nor, u8 op,
> + u8 *tx, int txlen, u8 *rx, int rxlen)
> {
> int len = 1 + txlen + rxlen;
> int i, ret, idx;
> @@ -167,26 +167,26 @@ static int mt8173_nor_do_tx_rx(struct mt8173_nor
> *mt8173_nor, u8 op,
> if (len > MTK_NOR_MAX_SHIFT)
> return -EINVAL;
>
> - writeb(len * 8, mt8173_nor->base + MTK_NOR_CNT_REG);
> + writeb(len * 8, mtk_nor->base + MTK_NOR_CNT_REG);
>
> /* start at PRGDATA5, go down to PRGDATA0 */
> idx = MTK_NOR_MAX_RX_TX_SHIFT - 1;
>
> /* opcode */
> - writeb(op, mt8173_nor->base + MTK_NOR_PRG_REG(idx));
> + writeb(op, mtk_nor->base + MTK_NOR_PRG_REG(idx));
> idx--;
>
> /* program TX data */
> for (i = 0; i < txlen; i++, idx--)
> - writeb(tx[i], mt8173_nor->base + MTK_NOR_PRG_REG(idx));
> + writeb(tx[i], mtk_nor->base + MTK_NOR_PRG_REG(idx));
>
> /* clear out rest of TX registers */
> while (idx >= 0) {
> - writeb(0, mt
[PATCH] mtd: mtk-nor: modify functions' name more generally
Since more and more Mediatek's SoC can use this driver to
control spi-nor flash, functions' name with "mt8173_" is
no longer properly. Replacing "mt8173_" with "mtk_" will
be more accurate to describe these functions' usable scope.
Signed-off-by: Guochun Mao <guochun@mediatek.com>
---
drivers/mtd/spi-nor/mtk-quadspi.c | 240 ++---
1 file changed, 120 insertions(+), 120 deletions(-)
diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
b/drivers/mtd/spi-nor/mtk-quadspi.c
index abe455c..5442993 100644
--- a/drivers/mtd/spi-nor/mtk-quadspi.c
+++ b/drivers/mtd/spi-nor/mtk-quadspi.c
@@ -110,7 +110,7 @@
#define MTK_NOR_PRG_REG(n) (MTK_NOR_PRGDATA0_REG + 4 * (n))
#define MTK_NOR_SHREG(n) (MTK_NOR_SHREG0_REG + 4 * (n))
-struct mt8173_nor {
+struct mtk_nor {
struct spi_nor nor;
struct device *dev;
void __iomem *base; /* nor flash base address */
@@ -118,48 +118,48 @@ struct mt8173_nor {
struct clk *nor_clk;
};
-static void mt8173_nor_set_read_mode(struct mt8173_nor *mt8173_nor)
+static void mtk_nor_set_read_mode(struct mtk_nor *mtk_nor)
{
- struct spi_nor *nor = _nor->nor;
+ struct spi_nor *nor = _nor->nor;
switch (nor->read_proto) {
case SNOR_PROTO_1_1_1:
- writeb(nor->read_opcode, mt8173_nor->base +
+ writeb(nor->read_opcode, mtk_nor->base +
MTK_NOR_PRGDATA3_REG);
- writeb(MTK_NOR_FAST_READ, mt8173_nor->base +
+ writeb(MTK_NOR_FAST_READ, mtk_nor->base +
MTK_NOR_CFG1_REG);
break;
case SNOR_PROTO_1_1_2:
- writeb(nor->read_opcode, mt8173_nor->base +
+ writeb(nor->read_opcode, mtk_nor->base +
MTK_NOR_PRGDATA3_REG);
- writeb(MTK_NOR_DUAL_READ_EN, mt8173_nor->base +
+ writeb(MTK_NOR_DUAL_READ_EN, mtk_nor->base +
MTK_NOR_DUAL_REG);
break;
case SNOR_PROTO_1_1_4:
- writeb(nor->read_opcode, mt8173_nor->base +
+ writeb(nor->read_opcode, mtk_nor->base +
MTK_NOR_PRGDATA4_REG);
- writeb(MTK_NOR_QUAD_READ_EN, mt8173_nor->base +
+ writeb(MTK_NOR_QUAD_READ_EN, mtk_nor->base +
MTK_NOR_DUAL_REG);
break;
default:
- writeb(MTK_NOR_DUAL_DISABLE, mt8173_nor->base +
+ writeb(MTK_NOR_DUAL_DISABLE, mtk_nor->base +
MTK_NOR_DUAL_REG);
break;
}
}
-static int mt8173_nor_execute_cmd(struct mt8173_nor *mt8173_nor, u8 cmdval)
+static int mtk_nor_execute_cmd(struct mtk_nor *mtk_nor, u8 cmdval)
{
int reg;
u8 val = cmdval & 0x1f;
- writeb(cmdval, mt8173_nor->base + MTK_NOR_CMD_REG);
- return readl_poll_timeout(mt8173_nor->base + MTK_NOR_CMD_REG, reg,
+ writeb(cmdval, mtk_nor->base + MTK_NOR_CMD_REG);
+ return readl_poll_timeout(mtk_nor->base + MTK_NOR_CMD_REG, reg,
!(reg & val), 100, 1);
}
-static int mt8173_nor_do_tx_rx(struct mt8173_nor *mt8173_nor, u8 op,
- u8 *tx, int txlen, u8 *rx, int rxlen)
+static int mtk_nor_do_tx_rx(struct mtk_nor *mtk_nor, u8 op,
+ u8 *tx, int txlen, u8 *rx, int rxlen)
{
int len = 1 + txlen + rxlen;
int i, ret, idx;
@@ -167,26 +167,26 @@ static int mt8173_nor_do_tx_rx(struct mt8173_nor
*mt8173_nor, u8 op,
if (len > MTK_NOR_MAX_SHIFT)
return -EINVAL;
- writeb(len * 8, mt8173_nor->base + MTK_NOR_CNT_REG);
+ writeb(len * 8, mtk_nor->base + MTK_NOR_CNT_REG);
/* start at PRGDATA5, go down to PRGDATA0 */
idx = MTK_NOR_MAX_RX_TX_SHIFT - 1;
/* opcode */
- writeb(op, mt8173_nor->base + MTK_NOR_PRG_REG(idx));
+ writeb(op, mtk_nor->base + MTK_NOR_PRG_REG(idx));
idx--;
/* program TX data */
for (i = 0; i < txlen; i++, idx--)
- writeb(tx[i], mt8173_nor->base + MTK_NOR_PRG_REG(idx));
+ writeb(tx[i], mtk_nor->base + MTK_NOR_PRG_REG(idx));
/* clear out rest of TX registers */
while (idx >= 0) {
- writeb(0, mt8173_nor->base + MTK_NOR_PRG_REG(idx));
+ writeb(0, mtk_nor->base + MTK_NOR_PRG_REG(idx));
idx--;
}
- ret = mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_PRG_CMD);
+ ret = mtk_nor_execute_cmd(mtk_nor, MTK_NOR_PRG_CMD);
if (ret)
return ret;
@@ -195,20 +195,20 @@ static int mt8173_nor_do_tx_rx(struct mt8173_nor
*mt8173_nor, u8 op,
/* read out RX data */
for (i = 0; i < rxlen; i++, i
[PATCH] mtd: mtk-nor: modify functions' name more generally
Since more and more Mediatek's SoC can use this driver to
control spi-nor flash, functions' name with "mt8173_" is
no longer properly. Replacing "mt8173_" with "mtk_" will
be more accurate to describe these functions' usable scope.
Signed-off-by: Guochun Mao
---
drivers/mtd/spi-nor/mtk-quadspi.c | 240 ++---
1 file changed, 120 insertions(+), 120 deletions(-)
diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
b/drivers/mtd/spi-nor/mtk-quadspi.c
index abe455c..5442993 100644
--- a/drivers/mtd/spi-nor/mtk-quadspi.c
+++ b/drivers/mtd/spi-nor/mtk-quadspi.c
@@ -110,7 +110,7 @@
#define MTK_NOR_PRG_REG(n) (MTK_NOR_PRGDATA0_REG + 4 * (n))
#define MTK_NOR_SHREG(n) (MTK_NOR_SHREG0_REG + 4 * (n))
-struct mt8173_nor {
+struct mtk_nor {
struct spi_nor nor;
struct device *dev;
void __iomem *base; /* nor flash base address */
@@ -118,48 +118,48 @@ struct mt8173_nor {
struct clk *nor_clk;
};
-static void mt8173_nor_set_read_mode(struct mt8173_nor *mt8173_nor)
+static void mtk_nor_set_read_mode(struct mtk_nor *mtk_nor)
{
- struct spi_nor *nor = _nor->nor;
+ struct spi_nor *nor = _nor->nor;
switch (nor->read_proto) {
case SNOR_PROTO_1_1_1:
- writeb(nor->read_opcode, mt8173_nor->base +
+ writeb(nor->read_opcode, mtk_nor->base +
MTK_NOR_PRGDATA3_REG);
- writeb(MTK_NOR_FAST_READ, mt8173_nor->base +
+ writeb(MTK_NOR_FAST_READ, mtk_nor->base +
MTK_NOR_CFG1_REG);
break;
case SNOR_PROTO_1_1_2:
- writeb(nor->read_opcode, mt8173_nor->base +
+ writeb(nor->read_opcode, mtk_nor->base +
MTK_NOR_PRGDATA3_REG);
- writeb(MTK_NOR_DUAL_READ_EN, mt8173_nor->base +
+ writeb(MTK_NOR_DUAL_READ_EN, mtk_nor->base +
MTK_NOR_DUAL_REG);
break;
case SNOR_PROTO_1_1_4:
- writeb(nor->read_opcode, mt8173_nor->base +
+ writeb(nor->read_opcode, mtk_nor->base +
MTK_NOR_PRGDATA4_REG);
- writeb(MTK_NOR_QUAD_READ_EN, mt8173_nor->base +
+ writeb(MTK_NOR_QUAD_READ_EN, mtk_nor->base +
MTK_NOR_DUAL_REG);
break;
default:
- writeb(MTK_NOR_DUAL_DISABLE, mt8173_nor->base +
+ writeb(MTK_NOR_DUAL_DISABLE, mtk_nor->base +
MTK_NOR_DUAL_REG);
break;
}
}
-static int mt8173_nor_execute_cmd(struct mt8173_nor *mt8173_nor, u8 cmdval)
+static int mtk_nor_execute_cmd(struct mtk_nor *mtk_nor, u8 cmdval)
{
int reg;
u8 val = cmdval & 0x1f;
- writeb(cmdval, mt8173_nor->base + MTK_NOR_CMD_REG);
- return readl_poll_timeout(mt8173_nor->base + MTK_NOR_CMD_REG, reg,
+ writeb(cmdval, mtk_nor->base + MTK_NOR_CMD_REG);
+ return readl_poll_timeout(mtk_nor->base + MTK_NOR_CMD_REG, reg,
!(reg & val), 100, 1);
}
-static int mt8173_nor_do_tx_rx(struct mt8173_nor *mt8173_nor, u8 op,
- u8 *tx, int txlen, u8 *rx, int rxlen)
+static int mtk_nor_do_tx_rx(struct mtk_nor *mtk_nor, u8 op,
+ u8 *tx, int txlen, u8 *rx, int rxlen)
{
int len = 1 + txlen + rxlen;
int i, ret, idx;
@@ -167,26 +167,26 @@ static int mt8173_nor_do_tx_rx(struct mt8173_nor
*mt8173_nor, u8 op,
if (len > MTK_NOR_MAX_SHIFT)
return -EINVAL;
- writeb(len * 8, mt8173_nor->base + MTK_NOR_CNT_REG);
+ writeb(len * 8, mtk_nor->base + MTK_NOR_CNT_REG);
/* start at PRGDATA5, go down to PRGDATA0 */
idx = MTK_NOR_MAX_RX_TX_SHIFT - 1;
/* opcode */
- writeb(op, mt8173_nor->base + MTK_NOR_PRG_REG(idx));
+ writeb(op, mtk_nor->base + MTK_NOR_PRG_REG(idx));
idx--;
/* program TX data */
for (i = 0; i < txlen; i++, idx--)
- writeb(tx[i], mt8173_nor->base + MTK_NOR_PRG_REG(idx));
+ writeb(tx[i], mtk_nor->base + MTK_NOR_PRG_REG(idx));
/* clear out rest of TX registers */
while (idx >= 0) {
- writeb(0, mt8173_nor->base + MTK_NOR_PRG_REG(idx));
+ writeb(0, mtk_nor->base + MTK_NOR_PRG_REG(idx));
idx--;
}
- ret = mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_PRG_CMD);
+ ret = mtk_nor_execute_cmd(mtk_nor, MTK_NOR_PRG_CMD);
if (ret)
return ret;
@@ -195,20 +195,20 @@ static int mt8173_nor_do_tx_rx(struct mt8173_nor
*mt8173_nor, u8 op,
/* read out RX data */
for (i = 0; i < rxlen; i++, idx--)
- rx[i] = readb(mt81
[PATCH V1 1/1] mtd: mtk-nor: modify functions' name more generally
Since more and more Mediatek's SoC can use this driver to control spi-nor flash, functions' name with "mt8173_" is no longer properly. Replacing "mt8173_" with "mtk_" will be more accurate to describe these functions' usable scope. Guochun Mao (1): mtd: mtk-nor: modify functions' name more generally drivers/mtd/spi-nor/mtk-quadspi.c | 240 +++--- 1 file changed, 120 insertions(+), 120 deletions(-) -- 1.9.1
[PATCH V1 1/1] mtd: mtk-nor: modify functions' name more generally
Since more and more Mediatek's SoC can use this driver to control spi-nor flash, functions' name with "mt8173_" is no longer properly. Replacing "mt8173_" with "mtk_" will be more accurate to describe these functions' usable scope. Guochun Mao (1): mtd: mtk-nor: modify functions' name more generally drivers/mtd/spi-nor/mtk-quadspi.c | 240 +++--- 1 file changed, 120 insertions(+), 120 deletions(-) -- 1.9.1
Re: [PATCH v1 1/2] dt-bindings: mtd: add new compatible strings and improve description
Hi Cyrille, Marek, Gentle ping... On Wed, 2017-10-11 at 11:15 +0800, Guochun Mao wrote: > gentle ping... > > On Thu, 2017-09-21 at 20:45 +0800, Guochun Mao wrote: > > Add "mediatak,mt2712-nor" and "mediatek,mt7622-nor" > > for nor flash node's compatible strings. > > Explicate the fallback compatible. > > > > Acked-by: Rob Herring <r...@kernel.org> > > Signed-off-by: Guochun Mao <guochun@mediatek.com> > > --- > > .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +-- > > 1 file changed, 9 insertions(+), 6 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > index 840f940..56d3668 100644 > > --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > @@ -1,13 +1,16 @@ > > * Serial NOR flash controller for MTK MT81xx (and similar) > > > > Required properties: > > -- compatible:The possible values are: > > - "mediatek,mt2701-nor" > > - "mediatek,mt7623-nor" > > +- compatible:For mt8173, compatible should be > > "mediatek,mt8173-nor", > > + and it's the fallback compatible for other Soc. > > + For every other SoC, should contain both the SoC-specific > > compatible > > + string and "mediatek,mt8173-nor". > > + The possible values are: > > + "mediatek,mt2701-nor", "mediatek,mt8173-nor" > > + "mediatek,mt2712-nor", "mediatek,mt8173-nor" > > + "mediatek,mt7622-nor", "mediatek,mt8173-nor" > > + "mediatek,mt7623-nor", "mediatek,mt8173-nor" > > "mediatek,mt8173-nor" > > - For mt8173, compatible should be "mediatek,mt8173-nor". > > - For every other SoC, should contain both the SoC-specific > > compatible string > > - and "mediatek,mt8173-nor". > > - reg: physical base address and length of the controller's > > register > > - clocks:the phandle of the clocks needed by the nor controller > > - clock-names: the names of the clocks >
Re: [PATCH v1 1/2] dt-bindings: mtd: add new compatible strings and improve description
Hi Cyrille, Marek, Gentle ping... On Wed, 2017-10-11 at 11:15 +0800, Guochun Mao wrote: > gentle ping... > > On Thu, 2017-09-21 at 20:45 +0800, Guochun Mao wrote: > > Add "mediatak,mt2712-nor" and "mediatek,mt7622-nor" > > for nor flash node's compatible strings. > > Explicate the fallback compatible. > > > > Acked-by: Rob Herring > > Signed-off-by: Guochun Mao > > --- > > .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +-- > > 1 file changed, 9 insertions(+), 6 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > index 840f940..56d3668 100644 > > --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > @@ -1,13 +1,16 @@ > > * Serial NOR flash controller for MTK MT81xx (and similar) > > > > Required properties: > > -- compatible:The possible values are: > > - "mediatek,mt2701-nor" > > - "mediatek,mt7623-nor" > > +- compatible:For mt8173, compatible should be > > "mediatek,mt8173-nor", > > + and it's the fallback compatible for other Soc. > > + For every other SoC, should contain both the SoC-specific > > compatible > > + string and "mediatek,mt8173-nor". > > + The possible values are: > > + "mediatek,mt2701-nor", "mediatek,mt8173-nor" > > + "mediatek,mt2712-nor", "mediatek,mt8173-nor" > > + "mediatek,mt7622-nor", "mediatek,mt8173-nor" > > + "mediatek,mt7623-nor", "mediatek,mt8173-nor" > > "mediatek,mt8173-nor" > > - For mt8173, compatible should be "mediatek,mt8173-nor". > > - For every other SoC, should contain both the SoC-specific > > compatible string > > - and "mediatek,mt8173-nor". > > - reg: physical base address and length of the controller's > > register > > - clocks:the phandle of the clocks needed by the nor controller > > - clock-names: the names of the clocks >
Re: [PATCH v1 2/2] mtd: mtk-nor: add suspend/resume support
gentle ping...
On Thu, 2017-09-21 at 20:45 +0800, Guochun Mao wrote:
> Abstract functions of clock setting, to avoid duplicated code,
> these functions been used in new feature.
> Implement suspend/resume functions.
>
> Signed-off-by: Guochun Mao <guochun@mediatek.com>
> ---
> drivers/mtd/spi-nor/mtk-quadspi.c | 70
> ++---
> 1 file changed, 58 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
> b/drivers/mtd/spi-nor/mtk-quadspi.c
> index c258c7a..abe455c 100644
> --- a/drivers/mtd/spi-nor/mtk-quadspi.c
> +++ b/drivers/mtd/spi-nor/mtk-quadspi.c
> @@ -404,6 +404,29 @@ static int mt8173_nor_write_reg(struct spi_nor *nor, u8
> opcode, u8 *buf,
> return ret;
> }
>
> +static void mt8173_nor_disable_clk(struct mt8173_nor *mt8173_nor)
> +{
> + clk_disable_unprepare(mt8173_nor->spi_clk);
> + clk_disable_unprepare(mt8173_nor->nor_clk);
> +}
> +
> +static int mt8173_nor_enable_clk(struct mt8173_nor *mt8173_nor)
> +{
> + int ret;
> +
> + ret = clk_prepare_enable(mt8173_nor->spi_clk);
> + if (ret)
> + return ret;
> +
> + ret = clk_prepare_enable(mt8173_nor->nor_clk);
> + if (ret) {
> + clk_disable_unprepare(mt8173_nor->spi_clk);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> static int mtk_nor_init(struct mt8173_nor *mt8173_nor,
> struct device_node *flash_node)
> {
> @@ -468,15 +491,11 @@ static int mtk_nor_drv_probe(struct platform_device
> *pdev)
> return PTR_ERR(mt8173_nor->nor_clk);
>
> mt8173_nor->dev = >dev;
> - ret = clk_prepare_enable(mt8173_nor->spi_clk);
> +
> + ret = mt8173_nor_enable_clk(mt8173_nor);
> if (ret)
> return ret;
>
> - ret = clk_prepare_enable(mt8173_nor->nor_clk);
> - if (ret) {
> - clk_disable_unprepare(mt8173_nor->spi_clk);
> - return ret;
> - }
> /* only support one attached flash */
> flash_np = of_get_next_available_child(pdev->dev.of_node, NULL);
> if (!flash_np) {
> @@ -487,10 +506,9 @@ static int mtk_nor_drv_probe(struct platform_device
> *pdev)
> ret = mtk_nor_init(mt8173_nor, flash_np);
>
> nor_free:
> - if (ret) {
> - clk_disable_unprepare(mt8173_nor->spi_clk);
> - clk_disable_unprepare(mt8173_nor->nor_clk);
> - }
> + if (ret)
> + mt8173_nor_disable_clk(mt8173_nor);
> +
> return ret;
> }
>
> @@ -498,11 +516,38 @@ static int mtk_nor_drv_remove(struct platform_device
> *pdev)
> {
> struct mt8173_nor *mt8173_nor = platform_get_drvdata(pdev);
>
> - clk_disable_unprepare(mt8173_nor->spi_clk);
> - clk_disable_unprepare(mt8173_nor->nor_clk);
> + mt8173_nor_disable_clk(mt8173_nor);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int mtk_nor_suspend(struct device *dev)
> +{
> + struct mt8173_nor *mt8173_nor = dev_get_drvdata(dev);
> +
> + mt8173_nor_disable_clk(mt8173_nor);
> +
> return 0;
> }
>
> +static int mtk_nor_resume(struct device *dev)
> +{
> + struct mt8173_nor *mt8173_nor = dev_get_drvdata(dev);
> +
> + return mt8173_nor_enable_clk(mt8173_nor);
> +}
> +
> +static const struct dev_pm_ops mtk_nor_dev_pm_ops = {
> + .suspend = mtk_nor_suspend,
> + .resume = mtk_nor_resume,
> +};
> +
> +#define MTK_NOR_DEV_PM_OPS (_nor_dev_pm_ops)
> +#else
> +#define MTK_NOR_DEV_PM_OPS NULL
> +#endif
> +
> static const struct of_device_id mtk_nor_of_ids[] = {
> { .compatible = "mediatek,mt8173-nor"},
> { /* sentinel */ }
> @@ -514,6 +559,7 @@ static int mtk_nor_drv_remove(struct platform_device
> *pdev)
> .remove = mtk_nor_drv_remove,
> .driver = {
> .name = "mtk-nor",
> + .pm = MTK_NOR_DEV_PM_OPS,
> .of_match_table = mtk_nor_of_ids,
> },
> };
Re: [PATCH v1 2/2] mtd: mtk-nor: add suspend/resume support
gentle ping...
On Thu, 2017-09-21 at 20:45 +0800, Guochun Mao wrote:
> Abstract functions of clock setting, to avoid duplicated code,
> these functions been used in new feature.
> Implement suspend/resume functions.
>
> Signed-off-by: Guochun Mao
> ---
> drivers/mtd/spi-nor/mtk-quadspi.c | 70
> ++---
> 1 file changed, 58 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
> b/drivers/mtd/spi-nor/mtk-quadspi.c
> index c258c7a..abe455c 100644
> --- a/drivers/mtd/spi-nor/mtk-quadspi.c
> +++ b/drivers/mtd/spi-nor/mtk-quadspi.c
> @@ -404,6 +404,29 @@ static int mt8173_nor_write_reg(struct spi_nor *nor, u8
> opcode, u8 *buf,
> return ret;
> }
>
> +static void mt8173_nor_disable_clk(struct mt8173_nor *mt8173_nor)
> +{
> + clk_disable_unprepare(mt8173_nor->spi_clk);
> + clk_disable_unprepare(mt8173_nor->nor_clk);
> +}
> +
> +static int mt8173_nor_enable_clk(struct mt8173_nor *mt8173_nor)
> +{
> + int ret;
> +
> + ret = clk_prepare_enable(mt8173_nor->spi_clk);
> + if (ret)
> + return ret;
> +
> + ret = clk_prepare_enable(mt8173_nor->nor_clk);
> + if (ret) {
> + clk_disable_unprepare(mt8173_nor->spi_clk);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> static int mtk_nor_init(struct mt8173_nor *mt8173_nor,
> struct device_node *flash_node)
> {
> @@ -468,15 +491,11 @@ static int mtk_nor_drv_probe(struct platform_device
> *pdev)
> return PTR_ERR(mt8173_nor->nor_clk);
>
> mt8173_nor->dev = >dev;
> - ret = clk_prepare_enable(mt8173_nor->spi_clk);
> +
> + ret = mt8173_nor_enable_clk(mt8173_nor);
> if (ret)
> return ret;
>
> - ret = clk_prepare_enable(mt8173_nor->nor_clk);
> - if (ret) {
> - clk_disable_unprepare(mt8173_nor->spi_clk);
> - return ret;
> - }
> /* only support one attached flash */
> flash_np = of_get_next_available_child(pdev->dev.of_node, NULL);
> if (!flash_np) {
> @@ -487,10 +506,9 @@ static int mtk_nor_drv_probe(struct platform_device
> *pdev)
> ret = mtk_nor_init(mt8173_nor, flash_np);
>
> nor_free:
> - if (ret) {
> - clk_disable_unprepare(mt8173_nor->spi_clk);
> - clk_disable_unprepare(mt8173_nor->nor_clk);
> - }
> + if (ret)
> + mt8173_nor_disable_clk(mt8173_nor);
> +
> return ret;
> }
>
> @@ -498,11 +516,38 @@ static int mtk_nor_drv_remove(struct platform_device
> *pdev)
> {
> struct mt8173_nor *mt8173_nor = platform_get_drvdata(pdev);
>
> - clk_disable_unprepare(mt8173_nor->spi_clk);
> - clk_disable_unprepare(mt8173_nor->nor_clk);
> + mt8173_nor_disable_clk(mt8173_nor);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int mtk_nor_suspend(struct device *dev)
> +{
> + struct mt8173_nor *mt8173_nor = dev_get_drvdata(dev);
> +
> + mt8173_nor_disable_clk(mt8173_nor);
> +
> return 0;
> }
>
> +static int mtk_nor_resume(struct device *dev)
> +{
> + struct mt8173_nor *mt8173_nor = dev_get_drvdata(dev);
> +
> + return mt8173_nor_enable_clk(mt8173_nor);
> +}
> +
> +static const struct dev_pm_ops mtk_nor_dev_pm_ops = {
> + .suspend = mtk_nor_suspend,
> + .resume = mtk_nor_resume,
> +};
> +
> +#define MTK_NOR_DEV_PM_OPS (_nor_dev_pm_ops)
> +#else
> +#define MTK_NOR_DEV_PM_OPS NULL
> +#endif
> +
> static const struct of_device_id mtk_nor_of_ids[] = {
> { .compatible = "mediatek,mt8173-nor"},
> { /* sentinel */ }
> @@ -514,6 +559,7 @@ static int mtk_nor_drv_remove(struct platform_device
> *pdev)
> .remove = mtk_nor_drv_remove,
> .driver = {
> .name = "mtk-nor",
> + .pm = MTK_NOR_DEV_PM_OPS,
> .of_match_table = mtk_nor_of_ids,
> },
> };
Re: [PATCH v1 1/2] dt-bindings: mtd: add new compatible strings and improve description
gentle ping... On Thu, 2017-09-21 at 20:45 +0800, Guochun Mao wrote: > Add "mediatak,mt2712-nor" and "mediatek,mt7622-nor" > for nor flash node's compatible strings. > Explicate the fallback compatible. > > Acked-by: Rob Herring <r...@kernel.org> > Signed-off-by: Guochun Mao <guochun@mediatek.com> > --- > .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +-- > 1 file changed, 9 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > index 840f940..56d3668 100644 > --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > @@ -1,13 +1,16 @@ > * Serial NOR flash controller for MTK MT81xx (and similar) > > Required properties: > -- compatible: The possible values are: > - "mediatek,mt2701-nor" > - "mediatek,mt7623-nor" > +- compatible: For mt8173, compatible should be > "mediatek,mt8173-nor", > + and it's the fallback compatible for other Soc. > + For every other SoC, should contain both the SoC-specific > compatible > + string and "mediatek,mt8173-nor". > + The possible values are: > + "mediatek,mt2701-nor", "mediatek,mt8173-nor" > + "mediatek,mt2712-nor", "mediatek,mt8173-nor" > + "mediatek,mt7622-nor", "mediatek,mt8173-nor" > + "mediatek,mt7623-nor", "mediatek,mt8173-nor" > "mediatek,mt8173-nor" > - For mt8173, compatible should be "mediatek,mt8173-nor". > - For every other SoC, should contain both the SoC-specific > compatible string > - and "mediatek,mt8173-nor". > - reg: physical base address and length of the controller's > register > - clocks: the phandle of the clocks needed by the nor controller > - clock-names: the names of the clocks
Re: [PATCH v1 1/2] dt-bindings: mtd: add new compatible strings and improve description
gentle ping... On Thu, 2017-09-21 at 20:45 +0800, Guochun Mao wrote: > Add "mediatak,mt2712-nor" and "mediatek,mt7622-nor" > for nor flash node's compatible strings. > Explicate the fallback compatible. > > Acked-by: Rob Herring > Signed-off-by: Guochun Mao > --- > .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +-- > 1 file changed, 9 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > index 840f940..56d3668 100644 > --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > @@ -1,13 +1,16 @@ > * Serial NOR flash controller for MTK MT81xx (and similar) > > Required properties: > -- compatible: The possible values are: > - "mediatek,mt2701-nor" > - "mediatek,mt7623-nor" > +- compatible: For mt8173, compatible should be > "mediatek,mt8173-nor", > + and it's the fallback compatible for other Soc. > + For every other SoC, should contain both the SoC-specific > compatible > + string and "mediatek,mt8173-nor". > + The possible values are: > + "mediatek,mt2701-nor", "mediatek,mt8173-nor" > + "mediatek,mt2712-nor", "mediatek,mt8173-nor" > + "mediatek,mt7622-nor", "mediatek,mt8173-nor" > + "mediatek,mt7623-nor", "mediatek,mt8173-nor" > "mediatek,mt8173-nor" > - For mt8173, compatible should be "mediatek,mt8173-nor". > - For every other SoC, should contain both the SoC-specific > compatible string > - and "mediatek,mt8173-nor". > - reg: physical base address and length of the controller's > register > - clocks: the phandle of the clocks needed by the nor controller > - clock-names: the names of the clocks
[PATCH v1] mtk-nor: update dt bindings and add suspend/resume support
These patches affect mtk-quadspi module in mtk/spi-nor. Add new compatible strings in dt bindings, add suspend/resume support in mtk-quadspi driver. Guochun Mao (2): dt-bindings: mtd: add new compatible strings and improve description mtd: mtk-nor: add suspend/resume support .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +++-- drivers/mtd/spi-nor/mtk-quadspi.c | 70 ++ 2 files changed, 67 insertions(+), 18 deletions(-) -- 1.9.1
[PATCH v1] mtk-nor: update dt bindings and add suspend/resume support
These patches affect mtk-quadspi module in mtk/spi-nor. Add new compatible strings in dt bindings, add suspend/resume support in mtk-quadspi driver. Guochun Mao (2): dt-bindings: mtd: add new compatible strings and improve description mtd: mtk-nor: add suspend/resume support .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +++-- drivers/mtd/spi-nor/mtk-quadspi.c | 70 ++ 2 files changed, 67 insertions(+), 18 deletions(-) -- 1.9.1
[PATCH v1 2/2] mtd: mtk-nor: add suspend/resume support
Abstract functions of clock setting, to avoid duplicated code,
these functions been used in new feature.
Implement suspend/resume functions.
Signed-off-by: Guochun Mao <guochun@mediatek.com>
---
drivers/mtd/spi-nor/mtk-quadspi.c | 70 ++---
1 file changed, 58 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
b/drivers/mtd/spi-nor/mtk-quadspi.c
index c258c7a..abe455c 100644
--- a/drivers/mtd/spi-nor/mtk-quadspi.c
+++ b/drivers/mtd/spi-nor/mtk-quadspi.c
@@ -404,6 +404,29 @@ static int mt8173_nor_write_reg(struct spi_nor *nor, u8
opcode, u8 *buf,
return ret;
}
+static void mt8173_nor_disable_clk(struct mt8173_nor *mt8173_nor)
+{
+ clk_disable_unprepare(mt8173_nor->spi_clk);
+ clk_disable_unprepare(mt8173_nor->nor_clk);
+}
+
+static int mt8173_nor_enable_clk(struct mt8173_nor *mt8173_nor)
+{
+ int ret;
+
+ ret = clk_prepare_enable(mt8173_nor->spi_clk);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(mt8173_nor->nor_clk);
+ if (ret) {
+ clk_disable_unprepare(mt8173_nor->spi_clk);
+ return ret;
+ }
+
+ return 0;
+}
+
static int mtk_nor_init(struct mt8173_nor *mt8173_nor,
struct device_node *flash_node)
{
@@ -468,15 +491,11 @@ static int mtk_nor_drv_probe(struct platform_device *pdev)
return PTR_ERR(mt8173_nor->nor_clk);
mt8173_nor->dev = >dev;
- ret = clk_prepare_enable(mt8173_nor->spi_clk);
+
+ ret = mt8173_nor_enable_clk(mt8173_nor);
if (ret)
return ret;
- ret = clk_prepare_enable(mt8173_nor->nor_clk);
- if (ret) {
- clk_disable_unprepare(mt8173_nor->spi_clk);
- return ret;
- }
/* only support one attached flash */
flash_np = of_get_next_available_child(pdev->dev.of_node, NULL);
if (!flash_np) {
@@ -487,10 +506,9 @@ static int mtk_nor_drv_probe(struct platform_device *pdev)
ret = mtk_nor_init(mt8173_nor, flash_np);
nor_free:
- if (ret) {
- clk_disable_unprepare(mt8173_nor->spi_clk);
- clk_disable_unprepare(mt8173_nor->nor_clk);
- }
+ if (ret)
+ mt8173_nor_disable_clk(mt8173_nor);
+
return ret;
}
@@ -498,11 +516,38 @@ static int mtk_nor_drv_remove(struct platform_device
*pdev)
{
struct mt8173_nor *mt8173_nor = platform_get_drvdata(pdev);
- clk_disable_unprepare(mt8173_nor->spi_clk);
- clk_disable_unprepare(mt8173_nor->nor_clk);
+ mt8173_nor_disable_clk(mt8173_nor);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int mtk_nor_suspend(struct device *dev)
+{
+ struct mt8173_nor *mt8173_nor = dev_get_drvdata(dev);
+
+ mt8173_nor_disable_clk(mt8173_nor);
+
return 0;
}
+static int mtk_nor_resume(struct device *dev)
+{
+ struct mt8173_nor *mt8173_nor = dev_get_drvdata(dev);
+
+ return mt8173_nor_enable_clk(mt8173_nor);
+}
+
+static const struct dev_pm_ops mtk_nor_dev_pm_ops = {
+ .suspend = mtk_nor_suspend,
+ .resume = mtk_nor_resume,
+};
+
+#define MTK_NOR_DEV_PM_OPS (_nor_dev_pm_ops)
+#else
+#define MTK_NOR_DEV_PM_OPS NULL
+#endif
+
static const struct of_device_id mtk_nor_of_ids[] = {
{ .compatible = "mediatek,mt8173-nor"},
{ /* sentinel */ }
@@ -514,6 +559,7 @@ static int mtk_nor_drv_remove(struct platform_device *pdev)
.remove = mtk_nor_drv_remove,
.driver = {
.name = "mtk-nor",
+ .pm = MTK_NOR_DEV_PM_OPS,
.of_match_table = mtk_nor_of_ids,
},
};
--
1.7.9.5
[PATCH v1 1/2] dt-bindings: mtd: add new compatible strings and improve description
Add "mediatak,mt2712-nor" and "mediatek,mt7622-nor" for nor flash node's compatible strings. Explicate the fallback compatible. Acked-by: Rob Herring <r...@kernel.org> Signed-off-by: Guochun Mao <guochun@mediatek.com> --- .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index 840f940..56d3668 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -1,13 +1,16 @@ * Serial NOR flash controller for MTK MT81xx (and similar) Required properties: -- compatible:The possible values are: - "mediatek,mt2701-nor" - "mediatek,mt7623-nor" +- compatible:For mt8173, compatible should be "mediatek,mt8173-nor", + and it's the fallback compatible for other Soc. + For every other SoC, should contain both the SoC-specific compatible + string and "mediatek,mt8173-nor". + The possible values are: + "mediatek,mt2701-nor", "mediatek,mt8173-nor" + "mediatek,mt2712-nor", "mediatek,mt8173-nor" + "mediatek,mt7622-nor", "mediatek,mt8173-nor" + "mediatek,mt7623-nor", "mediatek,mt8173-nor" "mediatek,mt8173-nor" - For mt8173, compatible should be "mediatek,mt8173-nor". - For every other SoC, should contain both the SoC-specific compatible string - and "mediatek,mt8173-nor". - reg: physical base address and length of the controller's register - clocks:the phandle of the clocks needed by the nor controller - clock-names: the names of the clocks -- 1.7.9.5
[PATCH v1 2/2] mtd: mtk-nor: add suspend/resume support
Abstract functions of clock setting, to avoid duplicated code,
these functions been used in new feature.
Implement suspend/resume functions.
Signed-off-by: Guochun Mao
---
drivers/mtd/spi-nor/mtk-quadspi.c | 70 ++---
1 file changed, 58 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
b/drivers/mtd/spi-nor/mtk-quadspi.c
index c258c7a..abe455c 100644
--- a/drivers/mtd/spi-nor/mtk-quadspi.c
+++ b/drivers/mtd/spi-nor/mtk-quadspi.c
@@ -404,6 +404,29 @@ static int mt8173_nor_write_reg(struct spi_nor *nor, u8
opcode, u8 *buf,
return ret;
}
+static void mt8173_nor_disable_clk(struct mt8173_nor *mt8173_nor)
+{
+ clk_disable_unprepare(mt8173_nor->spi_clk);
+ clk_disable_unprepare(mt8173_nor->nor_clk);
+}
+
+static int mt8173_nor_enable_clk(struct mt8173_nor *mt8173_nor)
+{
+ int ret;
+
+ ret = clk_prepare_enable(mt8173_nor->spi_clk);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(mt8173_nor->nor_clk);
+ if (ret) {
+ clk_disable_unprepare(mt8173_nor->spi_clk);
+ return ret;
+ }
+
+ return 0;
+}
+
static int mtk_nor_init(struct mt8173_nor *mt8173_nor,
struct device_node *flash_node)
{
@@ -468,15 +491,11 @@ static int mtk_nor_drv_probe(struct platform_device *pdev)
return PTR_ERR(mt8173_nor->nor_clk);
mt8173_nor->dev = >dev;
- ret = clk_prepare_enable(mt8173_nor->spi_clk);
+
+ ret = mt8173_nor_enable_clk(mt8173_nor);
if (ret)
return ret;
- ret = clk_prepare_enable(mt8173_nor->nor_clk);
- if (ret) {
- clk_disable_unprepare(mt8173_nor->spi_clk);
- return ret;
- }
/* only support one attached flash */
flash_np = of_get_next_available_child(pdev->dev.of_node, NULL);
if (!flash_np) {
@@ -487,10 +506,9 @@ static int mtk_nor_drv_probe(struct platform_device *pdev)
ret = mtk_nor_init(mt8173_nor, flash_np);
nor_free:
- if (ret) {
- clk_disable_unprepare(mt8173_nor->spi_clk);
- clk_disable_unprepare(mt8173_nor->nor_clk);
- }
+ if (ret)
+ mt8173_nor_disable_clk(mt8173_nor);
+
return ret;
}
@@ -498,11 +516,38 @@ static int mtk_nor_drv_remove(struct platform_device
*pdev)
{
struct mt8173_nor *mt8173_nor = platform_get_drvdata(pdev);
- clk_disable_unprepare(mt8173_nor->spi_clk);
- clk_disable_unprepare(mt8173_nor->nor_clk);
+ mt8173_nor_disable_clk(mt8173_nor);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int mtk_nor_suspend(struct device *dev)
+{
+ struct mt8173_nor *mt8173_nor = dev_get_drvdata(dev);
+
+ mt8173_nor_disable_clk(mt8173_nor);
+
return 0;
}
+static int mtk_nor_resume(struct device *dev)
+{
+ struct mt8173_nor *mt8173_nor = dev_get_drvdata(dev);
+
+ return mt8173_nor_enable_clk(mt8173_nor);
+}
+
+static const struct dev_pm_ops mtk_nor_dev_pm_ops = {
+ .suspend = mtk_nor_suspend,
+ .resume = mtk_nor_resume,
+};
+
+#define MTK_NOR_DEV_PM_OPS (_nor_dev_pm_ops)
+#else
+#define MTK_NOR_DEV_PM_OPS NULL
+#endif
+
static const struct of_device_id mtk_nor_of_ids[] = {
{ .compatible = "mediatek,mt8173-nor"},
{ /* sentinel */ }
@@ -514,6 +559,7 @@ static int mtk_nor_drv_remove(struct platform_device *pdev)
.remove = mtk_nor_drv_remove,
.driver = {
.name = "mtk-nor",
+ .pm = MTK_NOR_DEV_PM_OPS,
.of_match_table = mtk_nor_of_ids,
},
};
--
1.7.9.5
[PATCH v1 1/2] dt-bindings: mtd: add new compatible strings and improve description
Add "mediatak,mt2712-nor" and "mediatek,mt7622-nor" for nor flash node's compatible strings. Explicate the fallback compatible. Acked-by: Rob Herring Signed-off-by: Guochun Mao --- .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index 840f940..56d3668 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -1,13 +1,16 @@ * Serial NOR flash controller for MTK MT81xx (and similar) Required properties: -- compatible:The possible values are: - "mediatek,mt2701-nor" - "mediatek,mt7623-nor" +- compatible:For mt8173, compatible should be "mediatek,mt8173-nor", + and it's the fallback compatible for other Soc. + For every other SoC, should contain both the SoC-specific compatible + string and "mediatek,mt8173-nor". + The possible values are: + "mediatek,mt2701-nor", "mediatek,mt8173-nor" + "mediatek,mt2712-nor", "mediatek,mt8173-nor" + "mediatek,mt7622-nor", "mediatek,mt8173-nor" + "mediatek,mt7623-nor", "mediatek,mt8173-nor" "mediatek,mt8173-nor" - For mt8173, compatible should be "mediatek,mt8173-nor". - For every other SoC, should contain both the SoC-specific compatible string - and "mediatek,mt8173-nor". - reg: physical base address and length of the controller's register - clocks:the phandle of the clocks needed by the nor controller - clock-names: the names of the clocks -- 1.7.9.5
Re: [PATCH v5 1/1] dt-bindings: mtd: add new compatible strings and improve description
Hi Cyrille, It seems that I sent mail to wrong email-address ;) Please help to review this patch. Thanks a lot. Guochun On Thu, 2017-08-17 at 09:51 +0800, Guochun Mao wrote: > On Thu, 2017-08-10 at 13:21 -0500, Rob Herring wrote: > > On Fri, Aug 04, 2017 at 04:10:39PM +0800, Guochun Mao wrote: > > > Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" > > > for nor flash node's compatible strings. > > > Explicate the fallback compatible. > > > > > > Signed-off-by: Guochun Mao <guochun@mediatek.com> > > > --- > > > .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +-- > > > 1 file changed, 9 insertions(+), 6 deletions(-) > > > > Acked-by: Rob Herring <r...@kernel.org> > > Hi Rob, > Thank you very much! > > Hi Matthias, Cyrille, > Thanks a lot for your efforts in reviewing the patch. > > Is there any comment about the patch this version? > I appreciate your suggestion. > > BR, > Guochun
Re: [PATCH v5 1/1] dt-bindings: mtd: add new compatible strings and improve description
Hi Cyrille, It seems that I sent mail to wrong email-address ;) Please help to review this patch. Thanks a lot. Guochun On Thu, 2017-08-17 at 09:51 +0800, Guochun Mao wrote: > On Thu, 2017-08-10 at 13:21 -0500, Rob Herring wrote: > > On Fri, Aug 04, 2017 at 04:10:39PM +0800, Guochun Mao wrote: > > > Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" > > > for nor flash node's compatible strings. > > > Explicate the fallback compatible. > > > > > > Signed-off-by: Guochun Mao > > > --- > > > .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +-- > > > 1 file changed, 9 insertions(+), 6 deletions(-) > > > > Acked-by: Rob Herring > > Hi Rob, > Thank you very much! > > Hi Matthias, Cyrille, > Thanks a lot for your efforts in reviewing the patch. > > Is there any comment about the patch this version? > I appreciate your suggestion. > > BR, > Guochun
Re: [PATCH v5 1/1] dt-bindings: mtd: add new compatible strings and improve description
On Thu, 2017-08-10 at 13:21 -0500, Rob Herring wrote: > On Fri, Aug 04, 2017 at 04:10:39PM +0800, Guochun Mao wrote: > > Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" > > for nor flash node's compatible strings. > > Explicate the fallback compatible. > > > > Signed-off-by: Guochun Mao <guochun@mediatek.com> > > --- > > .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +-- > > 1 file changed, 9 insertions(+), 6 deletions(-) > > Acked-by: Rob Herring <r...@kernel.org> Hi Rob, Thank you very much! Hi Matthias, Cyrille, Thanks a lot for your efforts in reviewing the patch. Is there any comment about the patch this version? I appreciate your suggestion. BR, Guochun
Re: [PATCH v5 1/1] dt-bindings: mtd: add new compatible strings and improve description
On Thu, 2017-08-10 at 13:21 -0500, Rob Herring wrote: > On Fri, Aug 04, 2017 at 04:10:39PM +0800, Guochun Mao wrote: > > Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" > > for nor flash node's compatible strings. > > Explicate the fallback compatible. > > > > Signed-off-by: Guochun Mao > > --- > > .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +-- > > 1 file changed, 9 insertions(+), 6 deletions(-) > > Acked-by: Rob Herring Hi Rob, Thank you very much! Hi Matthias, Cyrille, Thanks a lot for your efforts in reviewing the patch. Is there any comment about the patch this version? I appreciate your suggestion. BR, Guochun
[PATCH v5] dt-bindings: mtd: add new compatible strings and improve description
Correct compatibles description and explicate fallback compatible. Guochun Mao (1): dt-bindings: mtd: add new compatible strings and improve description Documentation/devicetree/bindings/mtd/mtk-quadspi.txt | 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) -- 1.9.1
[PATCH v5] dt-bindings: mtd: add new compatible strings and improve description
Correct compatibles description and explicate fallback compatible. Guochun Mao (1): dt-bindings: mtd: add new compatible strings and improve description Documentation/devicetree/bindings/mtd/mtk-quadspi.txt | 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) -- 1.9.1
[PATCH v5 1/1] dt-bindings: mtd: add new compatible strings and improve description
Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" for nor flash node's compatible strings. Explicate the fallback compatible. Signed-off-by: Guochun Mao <guochun@mediatek.com> --- .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index 5ded66a..f97d601 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -1,13 +1,16 @@ * Serial NOR flash controller for MTK MT81xx (and similar) Required properties: -- compatible:The possible values are: - "mediatek,mt2701-nor" - "mediatek,mt7623-nor" +- compatible:For mt8173, compatible should be "mediatek,mt8173-nor", + and it's the fallback compatible for other Soc. + For every other SoC, should contain both the SoC-specific compatible + string and "mediatek,mt8173-nor". + The possible values are: + "mediatek,mt2701-nor", "mediatek,mt8173-nor" + "mediatek,mt2712-nor", "mediatek,mt8173-nor" + "mediatek,mt7622-nor", "mediatek,mt8173-nor" + "mediatek,mt7623-nor", "mediatek,mt8173-nor" "mediatek,mt8173-nor" - For mt8173, compatible should be "mediatek,mt8173-nor". - For every other SoC, should contain both the SoC-specific compatible string - and "mediatek,mt8173-nor". - reg: physical base address and length of the controller's register - clocks:the phandle of the clocks needed by the nor controller - clock-names: the names of the clocks -- 1.7.9.5
[PATCH v5 1/1] dt-bindings: mtd: add new compatible strings and improve description
Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" for nor flash node's compatible strings. Explicate the fallback compatible. Signed-off-by: Guochun Mao --- .../devicetree/bindings/mtd/mtk-quadspi.txt| 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index 5ded66a..f97d601 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -1,13 +1,16 @@ * Serial NOR flash controller for MTK MT81xx (and similar) Required properties: -- compatible:The possible values are: - "mediatek,mt2701-nor" - "mediatek,mt7623-nor" +- compatible:For mt8173, compatible should be "mediatek,mt8173-nor", + and it's the fallback compatible for other Soc. + For every other SoC, should contain both the SoC-specific compatible + string and "mediatek,mt8173-nor". + The possible values are: + "mediatek,mt2701-nor", "mediatek,mt8173-nor" + "mediatek,mt2712-nor", "mediatek,mt8173-nor" + "mediatek,mt7622-nor", "mediatek,mt8173-nor" + "mediatek,mt7623-nor", "mediatek,mt8173-nor" "mediatek,mt8173-nor" - For mt8173, compatible should be "mediatek,mt8173-nor". - For every other SoC, should contain both the SoC-specific compatible string - and "mediatek,mt8173-nor". - reg: physical base address and length of the controller's register - clocks:the phandle of the clocks needed by the nor controller - clock-names: the names of the clocks -- 1.7.9.5
Re: [PATCH] dt-bindings: mtd: add new compatible strings for mtk nor controller
On Thu, 2017-08-03 at 12:47 -0500, Rob Herring wrote: > On Thu, Aug 03, 2017 at 10:16:42AM +0800, Guochun Mao wrote: > > Hi Cyrille, > > > > On Wed, 2017-08-02 at 17:31 +0200, Cyrille Pitchen wrote: > > > Hi Guochun, > > > > > > Le 02/08/2017 à 10:36, Boris Brezillon a écrit : > > > > Hi Matthias, > > > > > > > > On Tue, 1 Aug 2017 14:33:22 +0200 > > > > Matthias Brugger <matthias@gmail.com> wrote: > > > > > > > >> On 07/25/2017 04:10 AM, Guochun Mao wrote: > > > >>> Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" > > > >>> for nor flash node's compatible strings. > > > >>> > > > >>> Reviewed-by: Matthias Brugger <matthias@gmail.com> > > > >>> Signed-off-by: Guochun Mao <guochun@mediatek.com> > > > >>> --- > > > >>> .../devicetree/bindings/mtd/mtk-quadspi.txt|2 ++ > > > >>> 1 file changed, 2 insertions(+) > > > >>> > > > >>> diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > > >>> b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > > >>> index 5ded66a..9845ff4 100644 > > > >>> --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > > >>> +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > > >>> @@ -3,6 +3,8 @@ > > > >>> Required properties: > > > >>> - compatible: The possible values are: > > > >>> "mediatek,mt2701-nor" > > > >>> + "mediatek,mt2712-nor" > > > >>> + "mediatek,mt7622-nor" > > > >>> "mediatek,mt7623-nor" > > > >>> "mediatek,mt8173-nor" > > > >>> For mt8173, compatible should be > > > >>> "mediatek,mt8173-nor". > > > >>> > > > > > > There should be another patch to update the mtk_nor_of_ids[] array in > > > the mtk-quadspi.c driver, shouldn't it? > > > > > > Currently, I only see the "mediatek,mt8173-nor" compatible string at the > > > driver side. The driver and its documentation should be aligned and both > > > patches should be applied at the same time. > > > > > Best regards, > > > > > > Cyrille > > > > > > From my designer's info, these IPs' nor controller could use same > > driver, and I had verified it. I think there's no need to update > > mtk_nor_of_ids[], unless we find difference between these IPs(exactly > > compared with mt8173). > > How do you think? > > That is perfectly fine, but then the documentation needs to be explicit > as to what are the fallback compatibles. It's one valid combination per > line, not 1 compatible string per line. OK, I'll corret the description in next version. Thanks a lot. Guochun > > Rob > > > > > And, we will add dts patches for new SOCs, are these patches should > > applied with this documentation? > > > > Best regards, > > Guochun > >
Re: [PATCH] dt-bindings: mtd: add new compatible strings for mtk nor controller
On Thu, 2017-08-03 at 12:47 -0500, Rob Herring wrote: > On Thu, Aug 03, 2017 at 10:16:42AM +0800, Guochun Mao wrote: > > Hi Cyrille, > > > > On Wed, 2017-08-02 at 17:31 +0200, Cyrille Pitchen wrote: > > > Hi Guochun, > > > > > > Le 02/08/2017 à 10:36, Boris Brezillon a écrit : > > > > Hi Matthias, > > > > > > > > On Tue, 1 Aug 2017 14:33:22 +0200 > > > > Matthias Brugger wrote: > > > > > > > >> On 07/25/2017 04:10 AM, Guochun Mao wrote: > > > >>> Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" > > > >>> for nor flash node's compatible strings. > > > >>> > > > >>> Reviewed-by: Matthias Brugger > > > >>> Signed-off-by: Guochun Mao > > > >>> --- > > > >>> .../devicetree/bindings/mtd/mtk-quadspi.txt|2 ++ > > > >>> 1 file changed, 2 insertions(+) > > > >>> > > > >>> diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > > >>> b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > > >>> index 5ded66a..9845ff4 100644 > > > >>> --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > > >>> +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > > > >>> @@ -3,6 +3,8 @@ > > > >>> Required properties: > > > >>> - compatible: The possible values are: > > > >>> "mediatek,mt2701-nor" > > > >>> + "mediatek,mt2712-nor" > > > >>> + "mediatek,mt7622-nor" > > > >>> "mediatek,mt7623-nor" > > > >>> "mediatek,mt8173-nor" > > > >>> For mt8173, compatible should be > > > >>> "mediatek,mt8173-nor". > > > >>> > > > > > > There should be another patch to update the mtk_nor_of_ids[] array in > > > the mtk-quadspi.c driver, shouldn't it? > > > > > > Currently, I only see the "mediatek,mt8173-nor" compatible string at the > > > driver side. The driver and its documentation should be aligned and both > > > patches should be applied at the same time. > > > > > Best regards, > > > > > > Cyrille > > > > > > From my designer's info, these IPs' nor controller could use same > > driver, and I had verified it. I think there's no need to update > > mtk_nor_of_ids[], unless we find difference between these IPs(exactly > > compared with mt8173). > > How do you think? > > That is perfectly fine, but then the documentation needs to be explicit > as to what are the fallback compatibles. It's one valid combination per > line, not 1 compatible string per line. OK, I'll corret the description in next version. Thanks a lot. Guochun > > Rob > > > > > And, we will add dts patches for new SOCs, are these patches should > > applied with this documentation? > > > > Best regards, > > Guochun > >
Re: [PATCH] dt-bindings: mtd: add new compatible strings for mtk nor controller
Hi Cyrille, On Wed, 2017-08-02 at 17:31 +0200, Cyrille Pitchen wrote: > Hi Guochun, > > Le 02/08/2017 à 10:36, Boris Brezillon a écrit : > > Hi Matthias, > > > > On Tue, 1 Aug 2017 14:33:22 +0200 > > Matthias Brugger <matthias@gmail.com> wrote: > > > >> On 07/25/2017 04:10 AM, Guochun Mao wrote: > >>> Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" > >>> for nor flash node's compatible strings. > >>> > >>> Reviewed-by: Matthias Brugger <matthias@gmail.com> > >>> Signed-off-by: Guochun Mao <guochun@mediatek.com> > >>> --- > >>> .../devicetree/bindings/mtd/mtk-quadspi.txt|2 ++ > >>> 1 file changed, 2 insertions(+) > >>> > >>> diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > >>> b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > >>> index 5ded66a..9845ff4 100644 > >>> --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > >>> +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > >>> @@ -3,6 +3,8 @@ > >>> Required properties: > >>> - compatible: The possible values are: > >>> "mediatek,mt2701-nor" > >>> + "mediatek,mt2712-nor" > >>> + "mediatek,mt7622-nor" > >>> "mediatek,mt7623-nor" > >>> "mediatek,mt8173-nor" > >>> For mt8173, compatible should be > >>> "mediatek,mt8173-nor". > >>> > > There should be another patch to update the mtk_nor_of_ids[] array in > the mtk-quadspi.c driver, shouldn't it? > > Currently, I only see the "mediatek,mt8173-nor" compatible string at the > driver side. The driver and its documentation should be aligned and both > patches should be applied at the same time. > Best regards, > > Cyrille >From my designer's info, these IPs' nor controller could use same driver, and I had verified it. I think there's no need to update mtk_nor_of_ids[], unless we find difference between these IPs(exactly compared with mt8173). How do you think? And, we will add dts patches for new SOCs, are these patches should applied with this documentation? Best regards, Guochun
Re: [PATCH] dt-bindings: mtd: add new compatible strings for mtk nor controller
Hi Cyrille, On Wed, 2017-08-02 at 17:31 +0200, Cyrille Pitchen wrote: > Hi Guochun, > > Le 02/08/2017 à 10:36, Boris Brezillon a écrit : > > Hi Matthias, > > > > On Tue, 1 Aug 2017 14:33:22 +0200 > > Matthias Brugger wrote: > > > >> On 07/25/2017 04:10 AM, Guochun Mao wrote: > >>> Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" > >>> for nor flash node's compatible strings. > >>> > >>> Reviewed-by: Matthias Brugger > >>> Signed-off-by: Guochun Mao > >>> --- > >>> .../devicetree/bindings/mtd/mtk-quadspi.txt|2 ++ > >>> 1 file changed, 2 insertions(+) > >>> > >>> diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > >>> b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > >>> index 5ded66a..9845ff4 100644 > >>> --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > >>> +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt > >>> @@ -3,6 +3,8 @@ > >>> Required properties: > >>> - compatible: The possible values are: > >>> "mediatek,mt2701-nor" > >>> + "mediatek,mt2712-nor" > >>> + "mediatek,mt7622-nor" > >>> "mediatek,mt7623-nor" > >>> "mediatek,mt8173-nor" > >>> For mt8173, compatible should be > >>> "mediatek,mt8173-nor". > >>> > > There should be another patch to update the mtk_nor_of_ids[] array in > the mtk-quadspi.c driver, shouldn't it? > > Currently, I only see the "mediatek,mt8173-nor" compatible string at the > driver side. The driver and its documentation should be aligned and both > patches should be applied at the same time. > Best regards, > > Cyrille >From my designer's info, these IPs' nor controller could use same driver, and I had verified it. I think there's no need to update mtk_nor_of_ids[], unless we find difference between these IPs(exactly compared with mt8173). How do you think? And, we will add dts patches for new SOCs, are these patches should applied with this documentation? Best regards, Guochun
[PATCH] dt-bindings: mtd: add new compatible strings for mtk nor controller
Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" for nor flash node's compatible strings. Reviewed-by: Matthias Brugger <matthias@gmail.com> Signed-off-by: Guochun Mao <guochun@mediatek.com> --- .../devicetree/bindings/mtd/mtk-quadspi.txt|2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index 5ded66a..9845ff4 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -3,6 +3,8 @@ Required properties: - compatible:The possible values are: "mediatek,mt2701-nor" + "mediatek,mt2712-nor" + "mediatek,mt7622-nor" "mediatek,mt7623-nor" "mediatek,mt8173-nor" For mt8173, compatible should be "mediatek,mt8173-nor". -- 1.7.9.5
[PATCH] dt-bindings: mtd: add new compatible strings for mtk nor controller
Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" for nor flash node's compatible strings. Reviewed-by: Matthias Brugger Signed-off-by: Guochun Mao --- .../devicetree/bindings/mtd/mtk-quadspi.txt|2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index 5ded66a..9845ff4 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -3,6 +3,8 @@ Required properties: - compatible:The possible values are: "mediatek,mt2701-nor" + "mediatek,mt2712-nor" + "mediatek,mt7622-nor" "mediatek,mt7623-nor" "mediatek,mt8173-nor" For mt8173, compatible should be "mediatek,mt8173-nor". -- 1.7.9.5
[PATCH v4 1/1] add new compatible strings for mtk nor controller
Improve subject. Guochun Mao (1): dt-bindings: mtd: add new compatible strings for mtk nor controller Documentation/devicetree/bindings/mtd/mtk-quadspi.txt | 2 ++ 1 file changed, 2 insertions(+) -- 1.9.1
[PATCH v4 1/1] add new compatible strings for mtk nor controller
Improve subject. Guochun Mao (1): dt-bindings: mtd: add new compatible strings for mtk nor controller Documentation/devicetree/bindings/mtd/mtk-quadspi.txt | 2 ++ 1 file changed, 2 insertions(+) -- 1.9.1
[PATCH] Documentation: mtk-quadspi: update DT bindings
Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" for nor flash node's compatible. Signed-off-by: Guochun Mao <guochun@mediatek.com> --- .../devicetree/bindings/mtd/mtk-quadspi.txt|2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index 5ded66a..9845ff4 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -3,6 +3,8 @@ Required properties: - compatible:The possible values are: "mediatek,mt2701-nor" + "mediatek,mt2712-nor" + "mediatek,mt7622-nor" "mediatek,mt7623-nor" "mediatek,mt8173-nor" For mt8173, compatible should be "mediatek,mt8173-nor". -- 1.7.9.5
[PATCH] Documentation: mtk-quadspi: update DT bindings
Add "mediatek,mt2712-nor" and "mediatek,mt7622-nor" for nor flash node's compatible. Signed-off-by: Guochun Mao --- .../devicetree/bindings/mtd/mtk-quadspi.txt|2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index 5ded66a..9845ff4 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -3,6 +3,8 @@ Required properties: - compatible:The possible values are: "mediatek,mt2701-nor" + "mediatek,mt2712-nor" + "mediatek,mt7622-nor" "mediatek,mt7623-nor" "mediatek,mt8173-nor" For mt8173, compatible should be "mediatek,mt8173-nor". -- 1.7.9.5
[PATCH v3 1/1] Documentation: mtk-quadspi: update DT bindings
Extra add "mediatek,mt7622-nor" compatible. Guochun Mao (1): Documentation: mtk-quadspi: update DT bindings Documentation/devicetree/bindings/mtd/mtk-quadspi.txt | 2 ++ 1 file changed, 2 insertions(+) -- 1.9.1
[PATCH v3 1/1] Documentation: mtk-quadspi: update DT bindings
Extra add "mediatek,mt7622-nor" compatible. Guochun Mao (1): Documentation: mtk-quadspi: update DT bindings Documentation/devicetree/bindings/mtd/mtk-quadspi.txt | 2 ++ 1 file changed, 2 insertions(+) -- 1.9.1
[PATCH v2 1/1] Documentation: mtk-quadspi: update DT bindings
Sort compatible strings in alphabetic order. Guochun Mao (1): Documentation: mtk-quadspi: update DT bindings Documentation/devicetree/bindings/mtd/mtk-quadspi.txt | 1 + 1 file changed, 1 insertion(+) -- 1.9.1
[PATCH] Documentation: mtk-quadspi: update DT bindings
Add "mediatek,mt2712-nor" for nor flash node's compatible. Signed-off-by: Guochun Mao <guochun@mediatek.com> --- .../devicetree/bindings/mtd/mtk-quadspi.txt|1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index 5ded66a..35974eb 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -3,6 +3,7 @@ Required properties: - compatible:The possible values are: "mediatek,mt2701-nor" + "mediatek,mt2712-nor" "mediatek,mt7623-nor" "mediatek,mt8173-nor" For mt8173, compatible should be "mediatek,mt8173-nor". -- 1.7.9.5
[PATCH v2 1/1] Documentation: mtk-quadspi: update DT bindings
Sort compatible strings in alphabetic order. Guochun Mao (1): Documentation: mtk-quadspi: update DT bindings Documentation/devicetree/bindings/mtd/mtk-quadspi.txt | 1 + 1 file changed, 1 insertion(+) -- 1.9.1
[PATCH] Documentation: mtk-quadspi: update DT bindings
Add "mediatek,mt2712-nor" for nor flash node's compatible. Signed-off-by: Guochun Mao --- .../devicetree/bindings/mtd/mtk-quadspi.txt|1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index 5ded66a..35974eb 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -3,6 +3,7 @@ Required properties: - compatible:The possible values are: "mediatek,mt2701-nor" + "mediatek,mt2712-nor" "mediatek,mt7623-nor" "mediatek,mt8173-nor" For mt8173, compatible should be "mediatek,mt8173-nor". -- 1.7.9.5
[PATCH] Documentation: mtk-quadspi: update DT bindings
Add "mediatek,mt2712-nor" for nor flash node's compatible. Signed-off-by: Guochun Mao <guochun@mediatek.com> --- .../devicetree/bindings/mtd/mtk-quadspi.txt|1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index 5ded66a..592bb71 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -2,6 +2,7 @@ Required properties: - compatible:The possible values are: + "mediatek,mt2712-nor" "mediatek,mt2701-nor" "mediatek,mt7623-nor" "mediatek,mt8173-nor" -- 1.7.9.5
[PATCH] Documentation: mtk-quadspi: update DT bindings
Add "mediatek,mt2712-nor" for nor flash node's compatible. Signed-off-by: Guochun Mao --- .../devicetree/bindings/mtd/mtk-quadspi.txt|1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index 5ded66a..592bb71 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -2,6 +2,7 @@ Required properties: - compatible:The possible values are: + "mediatek,mt2712-nor" "mediatek,mt2701-nor" "mediatek,mt7623-nor" "mediatek,mt8173-nor" -- 1.7.9.5
[PATCH v1 1/1] Documentation: mtk-quadspi: update DT bindings
Guochun Mao (1): Documentation: mtk-quadspi: update DT bindings Documentation/devicetree/bindings/mtd/mtk-quadspi.txt | 1 + 1 file changed, 1 insertion(+) -- 1.9.1
[PATCH v1 1/1] Documentation: mtk-quadspi: update DT bindings
Guochun Mao (1): Documentation: mtk-quadspi: update DT bindings Documentation/devicetree/bindings/mtd/mtk-quadspi.txt | 1 + 1 file changed, 1 insertion(+) -- 1.9.1
Re: [PATCH v2 2/2] arm: dts: mt2701: add nor flash node
On Wed, 2017-05-10 at 12:49 +0200, Matthias Brugger wrote:
>
> On 14/02/17 04:58, Guochun Mao wrote:
> > On Sun, 2017-02-12 at 07:35 +0800, Matthias Brugger wrote:
> >>
> >> On 02/06/2017 08:45 AM, Boris Brezillon wrote:
> >>> Hi Guochun,
> >>>
> >>> On Sun, 5 Feb 2017 12:00:49 +0800
> >>> Guochun Mao <guochun@mediatek.com> wrote:
> >>>
> >>>
> >>>>>
> >>>>> + nor_flash: spi@11014000 {
> >>>>> + compatible = "mediatek,mt2701-nor",
> >>>>> +"mediatek,mt8173-nor";
> >>>>> + reg = <0 0x11014000 0 0xe0>;
> >>>>> + clocks = < CLK_PERI_FLASH>,
> >>>>> +< CLK_TOP_FLASH_SEL>;
> >>>>> + clock-names = "spi", "sf";
> >>>>> + #address-cells = <1>;
> >>>>> + #size-cells = <0>;
> >>>>> + status = "disabled";
> >>>>> + };
> >>>>> +
> >>>>> mmsys: syscon@1400 {
> >>>>> compatible = "mediatek,mt2701-mmsys", "syscon";
> >>>>> reg = <0 0x1400 0 0x1000>;
> >>>>
> >>>> Hi,
> >>>> mtk-quadspi.txt had been updated as suggested.
> >>>> Is there suggestion about this patch?
> >>>
> >>> It should probably go through the Mediatek tree. Matthias, any opinion?
> >>>
> >>
> >> Yes, I will take this one through mine tree.
> >>
> >> Thanks,
> >> Matthias
> >
> > Thanks,
> > Guochun
> >
> >
>
> Queued now for v4.12-next/dts32
> Sorry for the delay.
>
> Matthias
Hi, Matthias,
It's OK. Thanks a lot.
Guochun
Re: [PATCH v2 2/2] arm: dts: mt2701: add nor flash node
On Wed, 2017-05-10 at 12:49 +0200, Matthias Brugger wrote:
>
> On 14/02/17 04:58, Guochun Mao wrote:
> > On Sun, 2017-02-12 at 07:35 +0800, Matthias Brugger wrote:
> >>
> >> On 02/06/2017 08:45 AM, Boris Brezillon wrote:
> >>> Hi Guochun,
> >>>
> >>> On Sun, 5 Feb 2017 12:00:49 +0800
> >>> Guochun Mao wrote:
> >>>
> >>>
> >>>>>
> >>>>> + nor_flash: spi@11014000 {
> >>>>> + compatible = "mediatek,mt2701-nor",
> >>>>> +"mediatek,mt8173-nor";
> >>>>> + reg = <0 0x11014000 0 0xe0>;
> >>>>> + clocks = < CLK_PERI_FLASH>,
> >>>>> +< CLK_TOP_FLASH_SEL>;
> >>>>> + clock-names = "spi", "sf";
> >>>>> + #address-cells = <1>;
> >>>>> + #size-cells = <0>;
> >>>>> + status = "disabled";
> >>>>> + };
> >>>>> +
> >>>>> mmsys: syscon@1400 {
> >>>>> compatible = "mediatek,mt2701-mmsys", "syscon";
> >>>>> reg = <0 0x1400 0 0x1000>;
> >>>>
> >>>> Hi,
> >>>> mtk-quadspi.txt had been updated as suggested.
> >>>> Is there suggestion about this patch?
> >>>
> >>> It should probably go through the Mediatek tree. Matthias, any opinion?
> >>>
> >>
> >> Yes, I will take this one through mine tree.
> >>
> >> Thanks,
> >> Matthias
> >
> > Thanks,
> > Guochun
> >
> >
>
> Queued now for v4.12-next/dts32
> Sorry for the delay.
>
> Matthias
Hi, Matthias,
It's OK. Thanks a lot.
Guochun
Re: [PATCH v1 1/1] mtd: mtk-nor: set controller's address width according to nor flash
Hi Cyrille, On Sun, 2017-04-16 at 19:18 +0200, Cyrille Pitchen wrote: > Le 13/04/2017 à 10:24, Cyrille Pitchen a écrit : > > Hi Guochun, > > > > Le 13/04/2017 à 04:40, Guochun Mao a écrit : > >> Hi Cyrille, > >> > >> On Wed, 2017-04-12 at 22:57 +0200, Cyrille Pitchen wrote: > >>> Hi Guochun, > >>> > >>> Le 05/04/2017 à 10:37, Guochun Mao a écrit : > >>>> When nor's size larger than 16MByte, nor's address width maybe > >>>> set to 3 or 4, and controller should change address width according > >>>> to nor's setting. > >>>> > >>>> Signed-off-by: Guochun Mao <guochun@mediatek.com>st > > > > Acked-by: Cyrille Pitchen <cyrille.pitc...@atmel.com> > > > > Applied to github/spi-nor Thank you very much! Best regards, Guochun
Re: [PATCH v1 1/1] mtd: mtk-nor: set controller's address width according to nor flash
Hi Cyrille, On Sun, 2017-04-16 at 19:18 +0200, Cyrille Pitchen wrote: > Le 13/04/2017 à 10:24, Cyrille Pitchen a écrit : > > Hi Guochun, > > > > Le 13/04/2017 à 04:40, Guochun Mao a écrit : > >> Hi Cyrille, > >> > >> On Wed, 2017-04-12 at 22:57 +0200, Cyrille Pitchen wrote: > >>> Hi Guochun, > >>> > >>> Le 05/04/2017 à 10:37, Guochun Mao a écrit : > >>>> When nor's size larger than 16MByte, nor's address width maybe > >>>> set to 3 or 4, and controller should change address width according > >>>> to nor's setting. > >>>> > >>>> Signed-off-by: Guochun Mao st > > > > Acked-by: Cyrille Pitchen > > > > Applied to github/spi-nor Thank you very much! Best regards, Guochun
Re: [PATCH v1 1/1] mtd: mtk-nor: set controller's address width according to nor flash
Hi Cyrille,
On Wed, 2017-04-12 at 22:57 +0200, Cyrille Pitchen wrote:
> Hi Guochun,
>
> Le 05/04/2017 à 10:37, Guochun Mao a écrit :
> > When nor's size larger than 16MByte, nor's address width maybe
> > set to 3 or 4, and controller should change address width according
> > to nor's setting.
> >
> > Signed-off-by: Guochun Mao <guochun@mediatek.com>st
> > ---
> > drivers/mtd/spi-nor/mtk-quadspi.c | 27 +++
> > 1 file changed, 27 insertions(+)
> >
> > diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
> > b/drivers/mtd/spi-nor/mtk-quadspi.c
> > index e661877..b637770 100644
> > --- a/drivers/mtd/spi-nor/mtk-quadspi.c
> > +++ b/drivers/mtd/spi-nor/mtk-quadspi.c
> > @@ -104,6 +104,8 @@
> > #define MTK_NOR_MAX_RX_TX_SHIFT6
> > /* can shift up to 56 bits (7 bytes) transfer by MTK_NOR_PRG_CMD */
> > #define MTK_NOR_MAX_SHIFT 7
> > +/* nor controller 4-byte address mode enable bit */
> > +#define MTK_NOR_4B_ADDR_EN BIT(4)
> >
> > /* Helpers for accessing the program data / shift data registers */
> > #define MTK_NOR_PRG_REG(n) (MTK_NOR_PRGDATA0_REG + 4 * (n))
> > @@ -230,10 +232,35 @@ static int mt8173_nor_write_buffer_disable(struct
> > mt8173_nor *mt8173_nor)
> > 1);
> > }
> >
> > +static void mt8173_nor_set_addr_width(struct mt8173_nor *mt8173_nor)
> > +{
> > + u8 val;
> > + struct spi_nor *nor = _nor->nor;
> > +
> > + val = readb(mt8173_nor->base + MTK_NOR_DUAL_REG);
> > +
> > + switch (nor->addr_width) {
> > + case 3:
> > + val &= ~MTK_NOR_4B_ADDR_EN;
> > + break;
> > + case 4:
> > + val |= MTK_NOR_4B_ADDR_EN;
> > + break;
> > + default:
> > + dev_warn(mt8173_nor->dev, "Unexpected address width %u.\n",
> > +nor->addr_width);
> > + break;
> > + }
> > +
> > + writeb(val, mt8173_nor->base + MTK_NOR_DUAL_REG);
> > +}
> > +
> > static void mt8173_nor_set_addr(struct mt8173_nor *mt8173_nor, u32 addr)
> > {
> > int i;
> >
> > + mt8173_nor_set_addr_width(mt8173_nor);
> > +
> > for (i = 0; i < 3; i++) {
>
> Should it be 'i < nor->addr_width' instead of 'i < 3' ?
> Does it work when accessing data after 128Mbit ?
Yes, it can work.
Let's see the whole function,
static void mt8173_nor_set_addr(struct mt8173_nor *mt8173_nor, u32 addr)
{
int i;
mt8173_nor_set_addr_width(mt8173_nor);
for (i = 0; i < 3; i++) {
writeb(addr & 0xff, mt8173_nor->base + MTK_NOR_RADR0_REG
+ i * 4);
addr >>= 8;
}
/* Last register is non-contiguous */
writeb(addr & 0xff, mt8173_nor->base + MTK_NOR_RADR3_REG);
}
The nor controller has 4 registers for address.
This '3' indicates the number of contiguous address' registers
base + MTK_NOR_RADR0_REG(0x10)
base + MTK_NOR_RADR1_REG(0x14)
base + MTK_NOR_RADR2_REG(0x18),
but the last address register is non-contiguous,
it's base + MTK_NOR_RADR3_REG(0xc8)
mt8173_nor_set_addr will set addr into these 4 registers by Byte.
The bit MTK_NOR_4B_ADDR_EN will decide whether 3-byte(0x10,0x14,0x18)
or 4-byte(0x10,0x14,x018,0xc8) been sent to nor device.
and, it can access data after 128Mbit when sent 4-byte address.
Best regards,
Guochun
>
> Best regards,
>
> Cyrille
>
> > writeb(addr & 0xff, mt8173_nor->base + MTK_NOR_RADR0_REG + i *
> > 4);
> > addr >>= 8;
> >
>
Re: [PATCH v1 1/1] mtd: mtk-nor: set controller's address width according to nor flash
Hi Cyrille,
On Wed, 2017-04-12 at 22:57 +0200, Cyrille Pitchen wrote:
> Hi Guochun,
>
> Le 05/04/2017 à 10:37, Guochun Mao a écrit :
> > When nor's size larger than 16MByte, nor's address width maybe
> > set to 3 or 4, and controller should change address width according
> > to nor's setting.
> >
> > Signed-off-by: Guochun Mao st
> > ---
> > drivers/mtd/spi-nor/mtk-quadspi.c | 27 +++
> > 1 file changed, 27 insertions(+)
> >
> > diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
> > b/drivers/mtd/spi-nor/mtk-quadspi.c
> > index e661877..b637770 100644
> > --- a/drivers/mtd/spi-nor/mtk-quadspi.c
> > +++ b/drivers/mtd/spi-nor/mtk-quadspi.c
> > @@ -104,6 +104,8 @@
> > #define MTK_NOR_MAX_RX_TX_SHIFT6
> > /* can shift up to 56 bits (7 bytes) transfer by MTK_NOR_PRG_CMD */
> > #define MTK_NOR_MAX_SHIFT 7
> > +/* nor controller 4-byte address mode enable bit */
> > +#define MTK_NOR_4B_ADDR_EN BIT(4)
> >
> > /* Helpers for accessing the program data / shift data registers */
> > #define MTK_NOR_PRG_REG(n) (MTK_NOR_PRGDATA0_REG + 4 * (n))
> > @@ -230,10 +232,35 @@ static int mt8173_nor_write_buffer_disable(struct
> > mt8173_nor *mt8173_nor)
> > 1);
> > }
> >
> > +static void mt8173_nor_set_addr_width(struct mt8173_nor *mt8173_nor)
> > +{
> > + u8 val;
> > + struct spi_nor *nor = _nor->nor;
> > +
> > + val = readb(mt8173_nor->base + MTK_NOR_DUAL_REG);
> > +
> > + switch (nor->addr_width) {
> > + case 3:
> > + val &= ~MTK_NOR_4B_ADDR_EN;
> > + break;
> > + case 4:
> > + val |= MTK_NOR_4B_ADDR_EN;
> > + break;
> > + default:
> > + dev_warn(mt8173_nor->dev, "Unexpected address width %u.\n",
> > +nor->addr_width);
> > + break;
> > + }
> > +
> > + writeb(val, mt8173_nor->base + MTK_NOR_DUAL_REG);
> > +}
> > +
> > static void mt8173_nor_set_addr(struct mt8173_nor *mt8173_nor, u32 addr)
> > {
> > int i;
> >
> > + mt8173_nor_set_addr_width(mt8173_nor);
> > +
> > for (i = 0; i < 3; i++) {
>
> Should it be 'i < nor->addr_width' instead of 'i < 3' ?
> Does it work when accessing data after 128Mbit ?
Yes, it can work.
Let's see the whole function,
static void mt8173_nor_set_addr(struct mt8173_nor *mt8173_nor, u32 addr)
{
int i;
mt8173_nor_set_addr_width(mt8173_nor);
for (i = 0; i < 3; i++) {
writeb(addr & 0xff, mt8173_nor->base + MTK_NOR_RADR0_REG
+ i * 4);
addr >>= 8;
}
/* Last register is non-contiguous */
writeb(addr & 0xff, mt8173_nor->base + MTK_NOR_RADR3_REG);
}
The nor controller has 4 registers for address.
This '3' indicates the number of contiguous address' registers
base + MTK_NOR_RADR0_REG(0x10)
base + MTK_NOR_RADR1_REG(0x14)
base + MTK_NOR_RADR2_REG(0x18),
but the last address register is non-contiguous,
it's base + MTK_NOR_RADR3_REG(0xc8)
mt8173_nor_set_addr will set addr into these 4 registers by Byte.
The bit MTK_NOR_4B_ADDR_EN will decide whether 3-byte(0x10,0x14,0x18)
or 4-byte(0x10,0x14,x018,0xc8) been sent to nor device.
and, it can access data after 128Mbit when sent 4-byte address.
Best regards,
Guochun
>
> Best regards,
>
> Cyrille
>
> > writeb(addr & 0xff, mt8173_nor->base + MTK_NOR_RADR0_REG + i *
> > 4);
> > addr >>= 8;
> >
>
[PATCH v1 1/1] mtd: mtk-nor: set controller's address width according to nor flash
When nor's size larger than 16MByte, nor's address width maybe
set to 3 or 4, and controller should change address width according
to nor's setting.
Signed-off-by: Guochun Mao <guochun@mediatek.com>
---
drivers/mtd/spi-nor/mtk-quadspi.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
b/drivers/mtd/spi-nor/mtk-quadspi.c
index e661877..b637770 100644
--- a/drivers/mtd/spi-nor/mtk-quadspi.c
+++ b/drivers/mtd/spi-nor/mtk-quadspi.c
@@ -104,6 +104,8 @@
#define MTK_NOR_MAX_RX_TX_SHIFT6
/* can shift up to 56 bits (7 bytes) transfer by MTK_NOR_PRG_CMD */
#define MTK_NOR_MAX_SHIFT 7
+/* nor controller 4-byte address mode enable bit */
+#define MTK_NOR_4B_ADDR_EN BIT(4)
/* Helpers for accessing the program data / shift data registers */
#define MTK_NOR_PRG_REG(n) (MTK_NOR_PRGDATA0_REG + 4 * (n))
@@ -230,10 +232,35 @@ static int mt8173_nor_write_buffer_disable(struct
mt8173_nor *mt8173_nor)
1);
}
+static void mt8173_nor_set_addr_width(struct mt8173_nor *mt8173_nor)
+{
+ u8 val;
+ struct spi_nor *nor = _nor->nor;
+
+ val = readb(mt8173_nor->base + MTK_NOR_DUAL_REG);
+
+ switch (nor->addr_width) {
+ case 3:
+ val &= ~MTK_NOR_4B_ADDR_EN;
+ break;
+ case 4:
+ val |= MTK_NOR_4B_ADDR_EN;
+ break;
+ default:
+ dev_warn(mt8173_nor->dev, "Unexpected address width %u.\n",
+nor->addr_width);
+ break;
+ }
+
+ writeb(val, mt8173_nor->base + MTK_NOR_DUAL_REG);
+}
+
static void mt8173_nor_set_addr(struct mt8173_nor *mt8173_nor, u32 addr)
{
int i;
+ mt8173_nor_set_addr_width(mt8173_nor);
+
for (i = 0; i < 3; i++) {
writeb(addr & 0xff, mt8173_nor->base + MTK_NOR_RADR0_REG + i *
4);
addr >>= 8;
--
1.7.9.5
[PATCH v1 1/1] mtd: mtk-nor: set controller's address width according to nor flash
When nor's size larger than 16MByte, nor's address width maybe
set to 3 or 4, and controller should change address width according
to nor's setting.
Signed-off-by: Guochun Mao
---
drivers/mtd/spi-nor/mtk-quadspi.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c
b/drivers/mtd/spi-nor/mtk-quadspi.c
index e661877..b637770 100644
--- a/drivers/mtd/spi-nor/mtk-quadspi.c
+++ b/drivers/mtd/spi-nor/mtk-quadspi.c
@@ -104,6 +104,8 @@
#define MTK_NOR_MAX_RX_TX_SHIFT6
/* can shift up to 56 bits (7 bytes) transfer by MTK_NOR_PRG_CMD */
#define MTK_NOR_MAX_SHIFT 7
+/* nor controller 4-byte address mode enable bit */
+#define MTK_NOR_4B_ADDR_EN BIT(4)
/* Helpers for accessing the program data / shift data registers */
#define MTK_NOR_PRG_REG(n) (MTK_NOR_PRGDATA0_REG + 4 * (n))
@@ -230,10 +232,35 @@ static int mt8173_nor_write_buffer_disable(struct
mt8173_nor *mt8173_nor)
1);
}
+static void mt8173_nor_set_addr_width(struct mt8173_nor *mt8173_nor)
+{
+ u8 val;
+ struct spi_nor *nor = _nor->nor;
+
+ val = readb(mt8173_nor->base + MTK_NOR_DUAL_REG);
+
+ switch (nor->addr_width) {
+ case 3:
+ val &= ~MTK_NOR_4B_ADDR_EN;
+ break;
+ case 4:
+ val |= MTK_NOR_4B_ADDR_EN;
+ break;
+ default:
+ dev_warn(mt8173_nor->dev, "Unexpected address width %u.\n",
+nor->addr_width);
+ break;
+ }
+
+ writeb(val, mt8173_nor->base + MTK_NOR_DUAL_REG);
+}
+
static void mt8173_nor_set_addr(struct mt8173_nor *mt8173_nor, u32 addr)
{
int i;
+ mt8173_nor_set_addr_width(mt8173_nor);
+
for (i = 0; i < 3; i++) {
writeb(addr & 0xff, mt8173_nor->base + MTK_NOR_RADR0_REG + i *
4);
addr >>= 8;
--
1.7.9.5
[PATCH v1] mtd: mtk-nor: set controller's address width according to nor flas
Guochun Mao (1): mtd: mtk-nor: set controller's address width according to nor flash drivers/mtd/spi-nor/mtk-quadspi.c | 27 +++ 1 file changed, 27 insertions(+) -- 1.9.1
[PATCH v1] mtd: mtk-nor: set controller's address width according to nor flas
Guochun Mao (1): mtd: mtk-nor: set controller's address width according to nor flash drivers/mtd/spi-nor/mtk-quadspi.c | 27 +++ 1 file changed, 27 insertions(+) -- 1.9.1
Re: [PATCH V1 1/1] mtd: mtk-nor: set controller to 4B mode with large capacity flash
Hi Cyrille, Thank you for so detailed explanation. I'll check nor->addr_width in both mt8173_nor_read() and mt8173_nor_write(). Best regards, Guochun On Fri, 2017-03-31 at 10:56 +0200, Cyrille Pitchen wrote: > Le 31/03/2017 à 04:26, Guochun Mao a écrit : > > Hi Cyrille, Marek, > > > > Thanks for your suggestions. > > > > On Thu, 2017-03-30 at 19:40 +0200, Cyrille Pitchen wrote: > >> Hi Guochun, > >> > >> Le 30/03/2017 à 10:23, Guochun Mao a écrit : > >>> when nor's size larger than 16MByte, nor and controller should > >>> enter 4Byte mode simultaneously. > >>> > >>> Signed-off-by: Guochun Mao <guochun@mediatek.com> > >>> --- > >>> drivers/mtd/spi-nor/mtk-quadspi.c |7 +++ > >>> 1 file changed, 7 insertions(+) > >>> > >>> diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c > >>> b/drivers/mtd/spi-nor/mtk-quadspi.c > >>> index e661877..05cd8a8 100644 > >>> --- a/drivers/mtd/spi-nor/mtk-quadspi.c > >>> +++ b/drivers/mtd/spi-nor/mtk-quadspi.c > >>> @@ -369,6 +369,13 @@ static int mt8173_nor_write_reg(struct spi_nor *nor, > >>> u8 opcode, u8 *buf, > >>> /* We only handle 1 byte */ > >>> ret = mt8173_nor_wr_sr(mt8173_nor, *buf); > >>> break; > >>> + case SPINOR_OP_EN4B: > >>> + /* Set nor controller to 4-byte address mode, > >>> + * and simultaneously set nor flash. > >>> + * This case should cooperate with default operation. > >>> + */ > >>> + writeb(readb(mt8173_nor->base + MTK_NOR_DUAL_REG) | 0x10, > >>> + mt8173_nor->base + MTK_NOR_DUAL_REG); > >> > >> This is not good: you should check in both mt8173_nor_read() and > >> mt8173_nor_write() whether nor->addr_width is either 3 or 4. > >> > >> from include/linux/mtd/spi-nor.h: > >> * @addr_width:number of address bytes > >> > >> Besides SPI commands using an op code from 4-byte address instruction > >> set always carry a 4-byte address. They can be used directly, without > >> sending the SPINOR_OP_EN4B before. So you cannot assume that addresses > >> will be 4-byte long only if your SPI controller driver has seen a > >> SPINOR_OP_EN4B command before. This assumption is wrong. > > Nor->addr_width is assigned in spi_nor_scan in spi-nor.c, and it's not > > modified in later process. > > Does it means that we will not switch nor between 3Byte address and > > 4Byte? > > So, is it better to check nor->addr_width when do nor initialization? > > > > Currently yes, nor->addr_width, nor->read_opcode, nor->read_dummy, and > nor->program_opcode are set once for all in spi_nor_scan(). > > However, nor->read() is likely to be called soon from spi_nor_scan() > with values of nor->addr_width, nor->read_opcode and nor->read_dummy > different from those selected when exiting spi_nor_scan(). > > So nor->read() / mt8173_nor_read should check nor->addr_width, > nor->read_opcode and nor->read_dummy at each call. > > More precisely, I plan to use nor->read() from spi_nor_scan() to read > SFDP (Serial Flash Discoverable Parameters) data. > > Whatever op code, numbers of address bytes and dummy cycles used for > (Fast) Read commands, the Read SFDP command uses fixed settings > standardized for all manufacturers and all memory parts: > - op code: 5Ah > - number of bytes for the address: 3 (even for memory > 128Mbits) > - number of dummy clock cycles: 8 clocks > > https://patchwork.ozlabs.org/patch/742380/ > > Please have a look at the spi_nor_read_sfdp(). > > spi_nor_read_sfdp() is likely to be called from and only from > spi_nor_scan(). > > Best regards, > > Cyrille > > >> > >> SPI controller driver should never check SPINOR_OP_* op codes like this. > > I agree that SPI controller driver should not check SPINOR_OP_* op codes > > like what I do. > > I will correct it next version. > > > > Best Regards, > > Guochun > >> > >> Then, testing SPINOR_OP_RDSR from mt8173_nor_read_reg() or > >> SPINOR_OP_WRSR from mt8173_nor_write_reg() is not a good practice too: > >> op codes may change depending on the memory manufacturer. So testing op > >> code values like you do can work with some memories but maybe not all. > >> > >> Finally, don't use 0x10, please define a macro instead. > >> > >> Best regards, > >> > >> Cyrille > >> > >>> default: > >>> ret = mt8173_nor_do_tx_rx(mt8173_nor, opcode, buf, len, NULL, > >>> 0); > >>> if (ret) > >>> > >> > > > > > > >
Re: [PATCH V1 1/1] mtd: mtk-nor: set controller to 4B mode with large capacity flash
Hi Cyrille, Thank you for so detailed explanation. I'll check nor->addr_width in both mt8173_nor_read() and mt8173_nor_write(). Best regards, Guochun On Fri, 2017-03-31 at 10:56 +0200, Cyrille Pitchen wrote: > Le 31/03/2017 à 04:26, Guochun Mao a écrit : > > Hi Cyrille, Marek, > > > > Thanks for your suggestions. > > > > On Thu, 2017-03-30 at 19:40 +0200, Cyrille Pitchen wrote: > >> Hi Guochun, > >> > >> Le 30/03/2017 à 10:23, Guochun Mao a écrit : > >>> when nor's size larger than 16MByte, nor and controller should > >>> enter 4Byte mode simultaneously. > >>> > >>> Signed-off-by: Guochun Mao > >>> --- > >>> drivers/mtd/spi-nor/mtk-quadspi.c |7 +++ > >>> 1 file changed, 7 insertions(+) > >>> > >>> diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c > >>> b/drivers/mtd/spi-nor/mtk-quadspi.c > >>> index e661877..05cd8a8 100644 > >>> --- a/drivers/mtd/spi-nor/mtk-quadspi.c > >>> +++ b/drivers/mtd/spi-nor/mtk-quadspi.c > >>> @@ -369,6 +369,13 @@ static int mt8173_nor_write_reg(struct spi_nor *nor, > >>> u8 opcode, u8 *buf, > >>> /* We only handle 1 byte */ > >>> ret = mt8173_nor_wr_sr(mt8173_nor, *buf); > >>> break; > >>> + case SPINOR_OP_EN4B: > >>> + /* Set nor controller to 4-byte address mode, > >>> + * and simultaneously set nor flash. > >>> + * This case should cooperate with default operation. > >>> + */ > >>> + writeb(readb(mt8173_nor->base + MTK_NOR_DUAL_REG) | 0x10, > >>> + mt8173_nor->base + MTK_NOR_DUAL_REG); > >> > >> This is not good: you should check in both mt8173_nor_read() and > >> mt8173_nor_write() whether nor->addr_width is either 3 or 4. > >> > >> from include/linux/mtd/spi-nor.h: > >> * @addr_width:number of address bytes > >> > >> Besides SPI commands using an op code from 4-byte address instruction > >> set always carry a 4-byte address. They can be used directly, without > >> sending the SPINOR_OP_EN4B before. So you cannot assume that addresses > >> will be 4-byte long only if your SPI controller driver has seen a > >> SPINOR_OP_EN4B command before. This assumption is wrong. > > Nor->addr_width is assigned in spi_nor_scan in spi-nor.c, and it's not > > modified in later process. > > Does it means that we will not switch nor between 3Byte address and > > 4Byte? > > So, is it better to check nor->addr_width when do nor initialization? > > > > Currently yes, nor->addr_width, nor->read_opcode, nor->read_dummy, and > nor->program_opcode are set once for all in spi_nor_scan(). > > However, nor->read() is likely to be called soon from spi_nor_scan() > with values of nor->addr_width, nor->read_opcode and nor->read_dummy > different from those selected when exiting spi_nor_scan(). > > So nor->read() / mt8173_nor_read should check nor->addr_width, > nor->read_opcode and nor->read_dummy at each call. > > More precisely, I plan to use nor->read() from spi_nor_scan() to read > SFDP (Serial Flash Discoverable Parameters) data. > > Whatever op code, numbers of address bytes and dummy cycles used for > (Fast) Read commands, the Read SFDP command uses fixed settings > standardized for all manufacturers and all memory parts: > - op code: 5Ah > - number of bytes for the address: 3 (even for memory > 128Mbits) > - number of dummy clock cycles: 8 clocks > > https://patchwork.ozlabs.org/patch/742380/ > > Please have a look at the spi_nor_read_sfdp(). > > spi_nor_read_sfdp() is likely to be called from and only from > spi_nor_scan(). > > Best regards, > > Cyrille > > >> > >> SPI controller driver should never check SPINOR_OP_* op codes like this. > > I agree that SPI controller driver should not check SPINOR_OP_* op codes > > like what I do. > > I will correct it next version. > > > > Best Regards, > > Guochun > >> > >> Then, testing SPINOR_OP_RDSR from mt8173_nor_read_reg() or > >> SPINOR_OP_WRSR from mt8173_nor_write_reg() is not a good practice too: > >> op codes may change depending on the memory manufacturer. So testing op > >> code values like you do can work with some memories but maybe not all. > >> > >> Finally, don't use 0x10, please define a macro instead. > >> > >> Best regards, > >> > >> Cyrille > >> > >>> default: > >>> ret = mt8173_nor_do_tx_rx(mt8173_nor, opcode, buf, len, NULL, > >>> 0); > >>> if (ret) > >>> > >> > > > > > > >
Re: [PATCH V1 1/1] mtd: mtk-nor: set controller to 4B mode with large capacity flash
Hi Cyrille, Marek, Thanks for your suggestions. On Thu, 2017-03-30 at 19:40 +0200, Cyrille Pitchen wrote: > Hi Guochun, > > Le 30/03/2017 à 10:23, Guochun Mao a écrit : > > when nor's size larger than 16MByte, nor and controller should > > enter 4Byte mode simultaneously. > > > > Signed-off-by: Guochun Mao <guochun@mediatek.com> > > --- > > drivers/mtd/spi-nor/mtk-quadspi.c |7 +++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c > > b/drivers/mtd/spi-nor/mtk-quadspi.c > > index e661877..05cd8a8 100644 > > --- a/drivers/mtd/spi-nor/mtk-quadspi.c > > +++ b/drivers/mtd/spi-nor/mtk-quadspi.c > > @@ -369,6 +369,13 @@ static int mt8173_nor_write_reg(struct spi_nor *nor, > > u8 opcode, u8 *buf, > > /* We only handle 1 byte */ > > ret = mt8173_nor_wr_sr(mt8173_nor, *buf); > > break; > > + case SPINOR_OP_EN4B: > > + /* Set nor controller to 4-byte address mode, > > +* and simultaneously set nor flash. > > +* This case should cooperate with default operation. > > +*/ > > + writeb(readb(mt8173_nor->base + MTK_NOR_DUAL_REG) | 0x10, > > + mt8173_nor->base + MTK_NOR_DUAL_REG); > > This is not good: you should check in both mt8173_nor_read() and > mt8173_nor_write() whether nor->addr_width is either 3 or 4. > > from include/linux/mtd/spi-nor.h: > * @addr_width: number of address bytes > > Besides SPI commands using an op code from 4-byte address instruction > set always carry a 4-byte address. They can be used directly, without > sending the SPINOR_OP_EN4B before. So you cannot assume that addresses > will be 4-byte long only if your SPI controller driver has seen a > SPINOR_OP_EN4B command before. This assumption is wrong. Nor->addr_width is assigned in spi_nor_scan in spi-nor.c, and it's not modified in later process. Does it means that we will not switch nor between 3Byte address and 4Byte? So, is it better to check nor->addr_width when do nor initialization? > > SPI controller driver should never check SPINOR_OP_* op codes like this. I agree that SPI controller driver should not check SPINOR_OP_* op codes like what I do. I will correct it next version. Best Regards, Guochun > > Then, testing SPINOR_OP_RDSR from mt8173_nor_read_reg() or > SPINOR_OP_WRSR from mt8173_nor_write_reg() is not a good practice too: > op codes may change depending on the memory manufacturer. So testing op > code values like you do can work with some memories but maybe not all. > > Finally, don't use 0x10, please define a macro instead. > > Best regards, > > Cyrille > > > default: > > ret = mt8173_nor_do_tx_rx(mt8173_nor, opcode, buf, len, NULL, > > 0); > > if (ret) > > >
Re: [PATCH V1 1/1] mtd: mtk-nor: set controller to 4B mode with large capacity flash
Hi Cyrille, Marek, Thanks for your suggestions. On Thu, 2017-03-30 at 19:40 +0200, Cyrille Pitchen wrote: > Hi Guochun, > > Le 30/03/2017 à 10:23, Guochun Mao a écrit : > > when nor's size larger than 16MByte, nor and controller should > > enter 4Byte mode simultaneously. > > > > Signed-off-by: Guochun Mao > > --- > > drivers/mtd/spi-nor/mtk-quadspi.c |7 +++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c > > b/drivers/mtd/spi-nor/mtk-quadspi.c > > index e661877..05cd8a8 100644 > > --- a/drivers/mtd/spi-nor/mtk-quadspi.c > > +++ b/drivers/mtd/spi-nor/mtk-quadspi.c > > @@ -369,6 +369,13 @@ static int mt8173_nor_write_reg(struct spi_nor *nor, > > u8 opcode, u8 *buf, > > /* We only handle 1 byte */ > > ret = mt8173_nor_wr_sr(mt8173_nor, *buf); > > break; > > + case SPINOR_OP_EN4B: > > + /* Set nor controller to 4-byte address mode, > > +* and simultaneously set nor flash. > > +* This case should cooperate with default operation. > > +*/ > > + writeb(readb(mt8173_nor->base + MTK_NOR_DUAL_REG) | 0x10, > > + mt8173_nor->base + MTK_NOR_DUAL_REG); > > This is not good: you should check in both mt8173_nor_read() and > mt8173_nor_write() whether nor->addr_width is either 3 or 4. > > from include/linux/mtd/spi-nor.h: > * @addr_width: number of address bytes > > Besides SPI commands using an op code from 4-byte address instruction > set always carry a 4-byte address. They can be used directly, without > sending the SPINOR_OP_EN4B before. So you cannot assume that addresses > will be 4-byte long only if your SPI controller driver has seen a > SPINOR_OP_EN4B command before. This assumption is wrong. Nor->addr_width is assigned in spi_nor_scan in spi-nor.c, and it's not modified in later process. Does it means that we will not switch nor between 3Byte address and 4Byte? So, is it better to check nor->addr_width when do nor initialization? > > SPI controller driver should never check SPINOR_OP_* op codes like this. I agree that SPI controller driver should not check SPINOR_OP_* op codes like what I do. I will correct it next version. Best Regards, Guochun > > Then, testing SPINOR_OP_RDSR from mt8173_nor_read_reg() or > SPINOR_OP_WRSR from mt8173_nor_write_reg() is not a good practice too: > op codes may change depending on the memory manufacturer. So testing op > code values like you do can work with some memories but maybe not all. > > Finally, don't use 0x10, please define a macro instead. > > Best regards, > > Cyrille > > > default: > > ret = mt8173_nor_do_tx_rx(mt8173_nor, opcode, buf, len, NULL, > > 0); > > if (ret) > > >
[PATCH V1 1/1] mtd: mtk-nor: set controller to 4B mode with large capacity flash
when nor's size larger than 16MByte, nor and controller should enter 4Byte mode simultaneously. Signed-off-by: Guochun Mao <guochun@mediatek.com> --- drivers/mtd/spi-nor/mtk-quadspi.c |7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c index e661877..05cd8a8 100644 --- a/drivers/mtd/spi-nor/mtk-quadspi.c +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -369,6 +369,13 @@ static int mt8173_nor_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, /* We only handle 1 byte */ ret = mt8173_nor_wr_sr(mt8173_nor, *buf); break; + case SPINOR_OP_EN4B: + /* Set nor controller to 4-byte address mode, +* and simultaneously set nor flash. +* This case should cooperate with default operation. +*/ + writeb(readb(mt8173_nor->base + MTK_NOR_DUAL_REG) | 0x10, + mt8173_nor->base + MTK_NOR_DUAL_REG); default: ret = mt8173_nor_do_tx_rx(mt8173_nor, opcode, buf, len, NULL, 0); if (ret) -- 1.7.9.5
[PATCH V1 1/1] mtd: mtk-nor: set controller to 4B mode with large capacity flash
when nor's size larger than 16MByte, nor and controller should enter 4Byte mode simultaneously. Signed-off-by: Guochun Mao --- drivers/mtd/spi-nor/mtk-quadspi.c |7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/mtd/spi-nor/mtk-quadspi.c b/drivers/mtd/spi-nor/mtk-quadspi.c index e661877..05cd8a8 100644 --- a/drivers/mtd/spi-nor/mtk-quadspi.c +++ b/drivers/mtd/spi-nor/mtk-quadspi.c @@ -369,6 +369,13 @@ static int mt8173_nor_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, /* We only handle 1 byte */ ret = mt8173_nor_wr_sr(mt8173_nor, *buf); break; + case SPINOR_OP_EN4B: + /* Set nor controller to 4-byte address mode, +* and simultaneously set nor flash. +* This case should cooperate with default operation. +*/ + writeb(readb(mt8173_nor->base + MTK_NOR_DUAL_REG) | 0x10, + mt8173_nor->base + MTK_NOR_DUAL_REG); default: ret = mt8173_nor_do_tx_rx(mt8173_nor, opcode, buf, len, NULL, 0); if (ret) -- 1.7.9.5
[PATCH V1] mtd: mtk-nor: set controller to 4B mode with large capacity flash
Guochun Mao (1): mtd: mtk-nor: set controller to 4B mode with large capacity flash drivers/mtd/spi-nor/mtk-quadspi.c | 7 +++ 1 file changed, 7 insertions(+) -- 1.9.1
[PATCH V1] mtd: mtk-nor: set controller to 4B mode with large capacity flash
Guochun Mao (1): mtd: mtk-nor: set controller to 4B mode with large capacity flash drivers/mtd/spi-nor/mtk-quadspi.c | 7 +++ 1 file changed, 7 insertions(+) -- 1.9.1
Re: [PATCH v2 2/2] arm: dts: mt2701: add nor flash node
On Sun, 2017-02-12 at 07:35 +0800, Matthias Brugger wrote:
>
> On 02/06/2017 08:45 AM, Boris Brezillon wrote:
> > Hi Guochun,
> >
> > On Sun, 5 Feb 2017 12:00:49 +0800
> > Guochun Mao <guochun@mediatek.com> wrote:
> >
> >
> >>>
> >>> + nor_flash: spi@11014000 {
> >>> + compatible = "mediatek,mt2701-nor",
> >>> +"mediatek,mt8173-nor";
> >>> + reg = <0 0x11014000 0 0xe0>;
> >>> + clocks = < CLK_PERI_FLASH>,
> >>> +< CLK_TOP_FLASH_SEL>;
> >>> + clock-names = "spi", "sf";
> >>> + #address-cells = <1>;
> >>> + #size-cells = <0>;
> >>> + status = "disabled";
> >>> + };
> >>> +
> >>> mmsys: syscon@1400 {
> >>> compatible = "mediatek,mt2701-mmsys", "syscon";
> >>> reg = <0 0x1400 0 0x1000>;
> >>
> >> Hi,
> >> mtk-quadspi.txt had been updated as suggested.
> >> Is there suggestion about this patch?
> >
> > It should probably go through the Mediatek tree. Matthias, any opinion?
> >
>
> Yes, I will take this one through mine tree.
>
> Thanks,
> Matthias
Thanks,
Guochun
Re: [PATCH v2 2/2] arm: dts: mt2701: add nor flash node
On Sun, 2017-02-12 at 07:35 +0800, Matthias Brugger wrote:
>
> On 02/06/2017 08:45 AM, Boris Brezillon wrote:
> > Hi Guochun,
> >
> > On Sun, 5 Feb 2017 12:00:49 +0800
> > Guochun Mao wrote:
> >
> >
> >>>
> >>> + nor_flash: spi@11014000 {
> >>> + compatible = "mediatek,mt2701-nor",
> >>> +"mediatek,mt8173-nor";
> >>> + reg = <0 0x11014000 0 0xe0>;
> >>> + clocks = < CLK_PERI_FLASH>,
> >>> +< CLK_TOP_FLASH_SEL>;
> >>> + clock-names = "spi", "sf";
> >>> + #address-cells = <1>;
> >>> + #size-cells = <0>;
> >>> + status = "disabled";
> >>> + };
> >>> +
> >>> mmsys: syscon@1400 {
> >>> compatible = "mediatek,mt2701-mmsys", "syscon";
> >>> reg = <0 0x1400 0 0x1000>;
> >>
> >> Hi,
> >> mtk-quadspi.txt had been updated as suggested.
> >> Is there suggestion about this patch?
> >
> > It should probably go through the Mediatek tree. Matthias, any opinion?
> >
>
> Yes, I will take this one through mine tree.
>
> Thanks,
> Matthias
Thanks,
Guochun
Re: [PATCH v2 2/2] arm: dts: mt2701: add nor flash node
On Wed, 2017-01-25 at 11:38 +0800, Guochun Mao wrote:
> Add Mediatek nor flash node.
>
> Signed-off-by: Guochun Mao <guochun@mediatek.com>
> ---
> arch/arm/boot/dts/mt2701-evb.dts | 25 +
> arch/arm/boot/dts/mt2701.dtsi| 12
> 2 files changed, 37 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt2701-evb.dts
> b/arch/arm/boot/dts/mt2701-evb.dts
> index 082ca88..85e5ae8 100644
> --- a/arch/arm/boot/dts/mt2701-evb.dts
> +++ b/arch/arm/boot/dts/mt2701-evb.dts
> @@ -24,6 +24,31 @@
> };
> };
>
> +_flash {
> + pinctrl-names = "default";
> + pinctrl-0 = <_pins_default>;
> + status = "okay";
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + };
> +};
> +
> + {
> + nor_pins_default: nor {
> + pins1 {
> + pinmux = ,
> + ,
> + ,
> + ,
> + ,
> + ;
> + drive-strength = ;
> + bias-pull-up;
> + };
> + };
> +};
> +
> {
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> index bdf8954..1eefce4 100644
> --- a/arch/arm/boot/dts/mt2701.dtsi
> +++ b/arch/arm/boot/dts/mt2701.dtsi
> @@ -227,6 +227,18 @@
> status = "disabled";
> };
>
> + nor_flash: spi@11014000 {
> + compatible = "mediatek,mt2701-nor",
> + "mediatek,mt8173-nor";
> + reg = <0 0x11014000 0 0xe0>;
> + clocks = < CLK_PERI_FLASH>,
> + < CLK_TOP_FLASH_SEL>;
> + clock-names = "spi", "sf";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> mmsys: syscon@1400 {
> compatible = "mediatek,mt2701-mmsys", "syscon";
> reg = <0 0x1400 0 0x1000>;
Hi,
mtk-quadspi.txt had been updated as suggested.
Is there suggestion about this patch?
Thanks.
BR,
Guochun
Re: [PATCH v2 2/2] arm: dts: mt2701: add nor flash node
On Wed, 2017-01-25 at 11:38 +0800, Guochun Mao wrote:
> Add Mediatek nor flash node.
>
> Signed-off-by: Guochun Mao
> ---
> arch/arm/boot/dts/mt2701-evb.dts | 25 +
> arch/arm/boot/dts/mt2701.dtsi| 12
> 2 files changed, 37 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt2701-evb.dts
> b/arch/arm/boot/dts/mt2701-evb.dts
> index 082ca88..85e5ae8 100644
> --- a/arch/arm/boot/dts/mt2701-evb.dts
> +++ b/arch/arm/boot/dts/mt2701-evb.dts
> @@ -24,6 +24,31 @@
> };
> };
>
> +_flash {
> + pinctrl-names = "default";
> + pinctrl-0 = <_pins_default>;
> + status = "okay";
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + };
> +};
> +
> + {
> + nor_pins_default: nor {
> + pins1 {
> + pinmux = ,
> + ,
> + ,
> + ,
> + ,
> + ;
> + drive-strength = ;
> + bias-pull-up;
> + };
> + };
> +};
> +
> {
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> index bdf8954..1eefce4 100644
> --- a/arch/arm/boot/dts/mt2701.dtsi
> +++ b/arch/arm/boot/dts/mt2701.dtsi
> @@ -227,6 +227,18 @@
> status = "disabled";
> };
>
> + nor_flash: spi@11014000 {
> + compatible = "mediatek,mt2701-nor",
> + "mediatek,mt8173-nor";
> + reg = <0 0x11014000 0 0xe0>;
> + clocks = < CLK_PERI_FLASH>,
> + < CLK_TOP_FLASH_SEL>;
> + clock-names = "spi", "sf";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> mmsys: syscon@1400 {
> compatible = "mediatek,mt2701-mmsys", "syscon";
> reg = <0 0x1400 0 0x1000>;
Hi,
mtk-quadspi.txt had been updated as suggested.
Is there suggestion about this patch?
Thanks.
BR,
Guochun
Re: [PATCH v2 1/2] Documentation: mtk-quadspi: update DT bindings
On Mon, 2017-01-30 at 13:49 +0100, Cyrille Pitchen wrote: > Le 27/01/2017 à 23:29, Rob Herring a écrit : > > On Wed, Jan 25, 2017 at 11:38:34AM +0800, Guochun Mao wrote: > >> Add "mediatek,mt2701-nor" for nor flash node's compatible. > >> > >> Signed-off-by: Guochun Mao <guochun@mediatek.com> > >> --- > >> .../devicetree/bindings/mtd/mtk-quadspi.txt|8 +++- > >> 1 file changed, 7 insertions(+), 1 deletion(-) > > > > Acked-by: Rob Herring <r...@kernel.org> > > > Applied to the github spi-nor tree. > > Thanks! Thank you very much!
Re: [PATCH v2 1/2] Documentation: mtk-quadspi: update DT bindings
On Mon, 2017-01-30 at 13:49 +0100, Cyrille Pitchen wrote: > Le 27/01/2017 à 23:29, Rob Herring a écrit : > > On Wed, Jan 25, 2017 at 11:38:34AM +0800, Guochun Mao wrote: > >> Add "mediatek,mt2701-nor" for nor flash node's compatible. > >> > >> Signed-off-by: Guochun Mao > >> --- > >> .../devicetree/bindings/mtd/mtk-quadspi.txt|8 +++- > >> 1 file changed, 7 insertions(+), 1 deletion(-) > > > > Acked-by: Rob Herring > > > Applied to the github spi-nor tree. > > Thanks! Thank you very much!
[PATCH v2 0/2] addr nor flash node for mt2701
Update DT bindings, clarify compatible strings that mt2701-nor node should contain. This patch series based on v4.10-rc2, include MT2701 spi nor node. Dependent on "Add clock and power domain DT nodes for Mediatek MT2701" [1] http://lists.infradead.org/pipermail/linux-mediatek/2016-December/007637.html Guochun Mao (2): Documentation: mtk-quadspi: update DT bindings arm: dts: mt2701: add nor flash node .../devicetree/bindings/mtd/mtk-quadspi.txt| 8 ++- arch/arm/boot/dts/mt2701-evb.dts | 25 ++ arch/arm/boot/dts/mt2701.dtsi | 12 +++ 3 files changed, 44 insertions(+), 1 deletion(-) -- 1.8.1.1.dirty
[PATCH v2 0/2] addr nor flash node for mt2701
Update DT bindings, clarify compatible strings that mt2701-nor node should contain. This patch series based on v4.10-rc2, include MT2701 spi nor node. Dependent on "Add clock and power domain DT nodes for Mediatek MT2701" [1] http://lists.infradead.org/pipermail/linux-mediatek/2016-December/007637.html Guochun Mao (2): Documentation: mtk-quadspi: update DT bindings arm: dts: mt2701: add nor flash node .../devicetree/bindings/mtd/mtk-quadspi.txt| 8 ++- arch/arm/boot/dts/mt2701-evb.dts | 25 ++ arch/arm/boot/dts/mt2701.dtsi | 12 +++ 3 files changed, 44 insertions(+), 1 deletion(-) -- 1.8.1.1.dirty
[PATCH v2 1/2] Documentation: mtk-quadspi: update DT bindings
Add "mediatek,mt2701-nor" for nor flash node's compatible. Signed-off-by: Guochun Mao <guochun@mediatek.com> --- .../devicetree/bindings/mtd/mtk-quadspi.txt|8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index fb314f0..5ded66a 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -1,7 +1,13 @@ * Serial NOR flash controller for MTK MT81xx (and similar) Required properties: -- compatible:should be "mediatek,mt8173-nor"; +- compatible:The possible values are: + "mediatek,mt2701-nor" + "mediatek,mt7623-nor" + "mediatek,mt8173-nor" + For mt8173, compatible should be "mediatek,mt8173-nor". + For every other SoC, should contain both the SoC-specific compatible string + and "mediatek,mt8173-nor". - reg: physical base address and length of the controller's register - clocks:the phandle of the clocks needed by the nor controller - clock-names: the names of the clocks -- 1.7.9.5
[PATCH v2 1/2] Documentation: mtk-quadspi: update DT bindings
Add "mediatek,mt2701-nor" for nor flash node's compatible. Signed-off-by: Guochun Mao --- .../devicetree/bindings/mtd/mtk-quadspi.txt|8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index fb314f0..5ded66a 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -1,7 +1,13 @@ * Serial NOR flash controller for MTK MT81xx (and similar) Required properties: -- compatible:should be "mediatek,mt8173-nor"; +- compatible:The possible values are: + "mediatek,mt2701-nor" + "mediatek,mt7623-nor" + "mediatek,mt8173-nor" + For mt8173, compatible should be "mediatek,mt8173-nor". + For every other SoC, should contain both the SoC-specific compatible string + and "mediatek,mt8173-nor". - reg: physical base address and length of the controller's register - clocks:the phandle of the clocks needed by the nor controller - clock-names: the names of the clocks -- 1.7.9.5
[PATCH v2 2/2] arm: dts: mt2701: add nor flash node
Add Mediatek nor flash node.
Signed-off-by: Guochun Mao <guochun@mediatek.com>
---
arch/arm/boot/dts/mt2701-evb.dts | 25 +
arch/arm/boot/dts/mt2701.dtsi| 12
2 files changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts
index 082ca88..85e5ae8 100644
--- a/arch/arm/boot/dts/mt2701-evb.dts
+++ b/arch/arm/boot/dts/mt2701-evb.dts
@@ -24,6 +24,31 @@
};
};
+_flash {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_default>;
+ status = "okay";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
+ {
+ nor_pins_default: nor {
+ pins1 {
+ pinmux = ,
+,
+,
+,
+,
+;
+ drive-strength = ;
+ bias-pull-up;
+ };
+ };
+};
+
{
status = "okay";
};
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index bdf8954..1eefce4 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -227,6 +227,18 @@
status = "disabled";
};
+ nor_flash: spi@11014000 {
+ compatible = "mediatek,mt2701-nor",
+"mediatek,mt8173-nor";
+ reg = <0 0x11014000 0 0xe0>;
+ clocks = < CLK_PERI_FLASH>,
+< CLK_TOP_FLASH_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
mmsys: syscon@1400 {
compatible = "mediatek,mt2701-mmsys", "syscon";
reg = <0 0x1400 0 0x1000>;
--
1.7.9.5
[PATCH v2 2/2] arm: dts: mt2701: add nor flash node
Add Mediatek nor flash node.
Signed-off-by: Guochun Mao
---
arch/arm/boot/dts/mt2701-evb.dts | 25 +
arch/arm/boot/dts/mt2701.dtsi| 12
2 files changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts
index 082ca88..85e5ae8 100644
--- a/arch/arm/boot/dts/mt2701-evb.dts
+++ b/arch/arm/boot/dts/mt2701-evb.dts
@@ -24,6 +24,31 @@
};
};
+_flash {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_default>;
+ status = "okay";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
+ {
+ nor_pins_default: nor {
+ pins1 {
+ pinmux = ,
+,
+,
+,
+,
+;
+ drive-strength = ;
+ bias-pull-up;
+ };
+ };
+};
+
{
status = "okay";
};
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index bdf8954..1eefce4 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -227,6 +227,18 @@
status = "disabled";
};
+ nor_flash: spi@11014000 {
+ compatible = "mediatek,mt2701-nor",
+"mediatek,mt8173-nor";
+ reg = <0 0x11014000 0 0xe0>;
+ clocks = < CLK_PERI_FLASH>,
+< CLK_TOP_FLASH_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
mmsys: syscon@1400 {
compatible = "mediatek,mt2701-mmsys", "syscon";
reg = <0 0x1400 0 0x1000>;
--
1.7.9.5
Re: [PATCH v1 2/2] arm: dts: mt2701: add nor flash node
Hi, On Thu, 2017-01-19 at 08:18 -0600, Rob Herring wrote: > On Thu, Jan 19, 2017 at 2:14 AM, Boris Brezillon > > One last question and I'm done: is something like that acceptable? > > > > compatible = ",",","; > > > > This can happen when someone adds support for an unsupported feature > > on a brand new SoC, and then someone else use the same driver for an > > older SoC embedding the same IP but still wants to add a new compatible > > just in case these 2 IPs appear to be slightly different. > > Yes, it's old and new compatible strings in this case and it's newest > compatible string first. > > > Here the order of compat strings is no longer following a clear rule > > like 'most-specific compatible first' or 'newest IP/SoC version first', > > it's completely dependent on the order these IPs were supported in the > > OS (Linux). I'm perfectly fine with that BTW, just want to make sure > > this is authorized. > > I guess we should say "newest compatible for IP first" instead. There > are some exceptions where we add fallbacks later on, but that falls > under the most-specific part. > > It's order that the bindings are defined, not Linux support really, > but in practice those are the same. > > Rob Thanks for all your effort for code reviewing. Our mt2701-nor's hardware is designed base on mt8713-nor, even so, there would be some slight difference. If I don't misunderstand your viewpoint in this discussion, there's no need to drop mt2701-nor compatible. And if not, is there any other suggestion? Thanks.
Re: [PATCH v1 2/2] arm: dts: mt2701: add nor flash node
Hi, On Thu, 2017-01-19 at 08:18 -0600, Rob Herring wrote: > On Thu, Jan 19, 2017 at 2:14 AM, Boris Brezillon > > One last question and I'm done: is something like that acceptable? > > > > compatible = ",",","; > > > > This can happen when someone adds support for an unsupported feature > > on a brand new SoC, and then someone else use the same driver for an > > older SoC embedding the same IP but still wants to add a new compatible > > just in case these 2 IPs appear to be slightly different. > > Yes, it's old and new compatible strings in this case and it's newest > compatible string first. > > > Here the order of compat strings is no longer following a clear rule > > like 'most-specific compatible first' or 'newest IP/SoC version first', > > it's completely dependent on the order these IPs were supported in the > > OS (Linux). I'm perfectly fine with that BTW, just want to make sure > > this is authorized. > > I guess we should say "newest compatible for IP first" instead. There > are some exceptions where we add fallbacks later on, but that falls > under the most-specific part. > > It's order that the bindings are defined, not Linux support really, > but in practice those are the same. > > Rob Thanks for all your effort for code reviewing. Our mt2701-nor's hardware is designed base on mt8713-nor, even so, there would be some slight difference. If I don't misunderstand your viewpoint in this discussion, there's no need to drop mt2701-nor compatible. And if not, is there any other suggestion? Thanks.
[PATCH v1 1/2] Documentation: mtk-quadspi: update DT bindings
Add "mediatek,mt2701-nor" for nor flash node's compatible. Signed-off-by: Guochun Mao <guochun@mediatek.com> --- .../devicetree/bindings/mtd/mtk-quadspi.txt|4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index fb314f0..f83d31d 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -1,7 +1,9 @@ * Serial NOR flash controller for MTK MT81xx (and similar) Required properties: -- compatible:should be "mediatek,mt8173-nor"; +- compatible:should contain: + "mediatek,mt2701-nor" for MT2701, + "mediatek,mt8173-nor" for MT8173. - reg: physical base address and length of the controller's register - clocks:the phandle of the clocks needed by the nor controller - clock-names: the names of the clocks -- 1.7.9.5
[PATCH v1 0/2] add nor flash node for mt2701
This patch series based on v4.10-rc2, include MT2701 spinor node and bindings. Dependent on "Add clock and power domain DT nodes for Mediatek MT2701"[1]. [1] http://lists.infradead.org/pipermail/linux-mediatek/2016-December/007637.html Guochun Mao (2): Documentation: mtk-quadspi: update DT bindings arm: dts: mt2701: add nor flash node .../devicetree/bindings/mtd/mtk-quadspi.txt| 4 +++- arch/arm/boot/dts/mt2701-evb.dts | 25 ++ arch/arm/boot/dts/mt2701.dtsi | 12 +++ 3 files changed, 40 insertions(+), 1 deletion(-) -- 1.8.1.1.dirty
[PATCH v1 1/2] Documentation: mtk-quadspi: update DT bindings
Add "mediatek,mt2701-nor" for nor flash node's compatible. Signed-off-by: Guochun Mao --- .../devicetree/bindings/mtd/mtk-quadspi.txt|4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt index fb314f0..f83d31d 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt @@ -1,7 +1,9 @@ * Serial NOR flash controller for MTK MT81xx (and similar) Required properties: -- compatible:should be "mediatek,mt8173-nor"; +- compatible:should contain: + "mediatek,mt2701-nor" for MT2701, + "mediatek,mt8173-nor" for MT8173. - reg: physical base address and length of the controller's register - clocks:the phandle of the clocks needed by the nor controller - clock-names: the names of the clocks -- 1.7.9.5
[PATCH v1 0/2] add nor flash node for mt2701
This patch series based on v4.10-rc2, include MT2701 spinor node and bindings. Dependent on "Add clock and power domain DT nodes for Mediatek MT2701"[1]. [1] http://lists.infradead.org/pipermail/linux-mediatek/2016-December/007637.html Guochun Mao (2): Documentation: mtk-quadspi: update DT bindings arm: dts: mt2701: add nor flash node .../devicetree/bindings/mtd/mtk-quadspi.txt| 4 +++- arch/arm/boot/dts/mt2701-evb.dts | 25 ++ arch/arm/boot/dts/mt2701.dtsi | 12 +++ 3 files changed, 40 insertions(+), 1 deletion(-) -- 1.8.1.1.dirty
[PATCH v1 2/2] arm: dts: mt2701: add nor flash node
Add Mediatek nor flash node.
Signed-off-by: Guochun Mao <guochun@mediatek.com>
---
arch/arm/boot/dts/mt2701-evb.dts | 25 +
arch/arm/boot/dts/mt2701.dtsi| 12
2 files changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts
index 082ca88..85e5ae8 100644
--- a/arch/arm/boot/dts/mt2701-evb.dts
+++ b/arch/arm/boot/dts/mt2701-evb.dts
@@ -24,6 +24,31 @@
};
};
+_flash {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_default>;
+ status = "okay";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
+ {
+ nor_pins_default: nor {
+ pins1 {
+ pinmux = ,
+,
+,
+,
+,
+;
+ drive-strength = ;
+ bias-pull-up;
+ };
+ };
+};
+
{
status = "okay";
};
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index bdf8954..1eefce4 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -227,6 +227,18 @@
status = "disabled";
};
+ nor_flash: spi@11014000 {
+ compatible = "mediatek,mt2701-nor",
+"mediatek,mt8173-nor";
+ reg = <0 0x11014000 0 0xe0>;
+ clocks = < CLK_PERI_FLASH>,
+< CLK_TOP_FLASH_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
mmsys: syscon@1400 {
compatible = "mediatek,mt2701-mmsys", "syscon";
reg = <0 0x1400 0 0x1000>;
--
1.7.9.5
[PATCH v1 2/2] arm: dts: mt2701: add nor flash node
Add Mediatek nor flash node.
Signed-off-by: Guochun Mao
---
arch/arm/boot/dts/mt2701-evb.dts | 25 +
arch/arm/boot/dts/mt2701.dtsi| 12
2 files changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts
index 082ca88..85e5ae8 100644
--- a/arch/arm/boot/dts/mt2701-evb.dts
+++ b/arch/arm/boot/dts/mt2701-evb.dts
@@ -24,6 +24,31 @@
};
};
+_flash {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins_default>;
+ status = "okay";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
+ {
+ nor_pins_default: nor {
+ pins1 {
+ pinmux = ,
+,
+,
+,
+,
+;
+ drive-strength = ;
+ bias-pull-up;
+ };
+ };
+};
+
{
status = "okay";
};
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index bdf8954..1eefce4 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -227,6 +227,18 @@
status = "disabled";
};
+ nor_flash: spi@11014000 {
+ compatible = "mediatek,mt2701-nor",
+"mediatek,mt8173-nor";
+ reg = <0 0x11014000 0 0xe0>;
+ clocks = < CLK_PERI_FLASH>,
+< CLK_TOP_FLASH_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
mmsys: syscon@1400 {
compatible = "mediatek,mt2701-mmsys", "syscon";
reg = <0 0x1400 0 0x1000>;
--
1.7.9.5
