On Fri, Feb 16, 2024 at 03:40:24PM +0100, Krzysztof Kozlowski wrote:
Applied all, thanks.
On Fri, Mar 26, 2021 at 02:24:04PM +0800, Zhen Lei wrote:
> This detection and correction covers the entire driver/iommu directory.
>
> Zhen Lei (8):
> iommu/pamu: fix a couple of spelling mistakes
> iommu/omap: Fix spelling mistake "alignement" -> "alignment"
> iommu/mediatek: Fix spelling
On Thu, Apr 01, 2021 at 02:56:25PM +0100, Robin Murphy wrote:
> It happens that the 3 drivers which first supported being modular are
> also ones which play games with their pgsize_bitmap, so have non-const
> iommu_ops where dynamically setting the owner manages to work out OK.
> However, it's
On Fri, Apr 16, 2021 at 03:47:01PM +0200, Dafna Hirschfeld wrote:
> Hi,
> I sent v2, removing the word 'comment' from the 'Fixes' tag
> after a problem report from Stephen Rothwell,
> could you replace v1 with v2?
Replaced it, thanks.
From: Joerg Roedel
The variable 'i' in the function update_liodn_stash() is not
initialized and only used in a debug printk(). So it has no
meaning at all, remove it.
Reported-by: kernel test robot
Signed-off-by: Joerg Roedel
---
drivers/iommu/fsl_pamu_domain.c | 5 ++---
1 file changed, 2
On Thu, Apr 15, 2021 at 08:46:28AM +0800, Longpeng(Mike) wrote:
> Fixes: 6491d4d02893 ("intel-iommu: Free old page tables before creating
> superpage")
> Cc: # v3.0+
> Link:
> https://lore.kernel.org/linux-iommu/670baaf8-4ff8-4e84-4be3-030b95ab5...@huawei.com/
> Suggested-by: Lu Baolu
>
On Mon, Apr 12, 2021 at 02:48:42PM +0800, Yong Wu wrote:
> When this driver build as module, It build fail like:
>
> ERROR: modpost: "of_phandle_iterator_args"
> [drivers/iommu/mtk_iommu_v1.ko] undefined!
>
> This patch remove this interface to avoid this build fail.
>
> Reported-by: Valdis
On Sun, Apr 11, 2021 at 09:08:17AM +0200, Christophe JAILLET wrote:
> drivers/iommu/intel/irq_remapping.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks.
On Sun, Apr 11, 2021 at 02:23:12PM +0800, Lu Baolu wrote:
> drivers/iommu/intel/pasid.c | 2 ++
> 1 file changed, 2 insertions(+)
Applied, thanks.
On Fri, Apr 09, 2021 at 03:58:46AM -0500, Suravee Suthikulpanit wrote:
> Paul Menzel (1):
> Revert "iommu/amd: Fix performance counter initialization"
>
> Suravee Suthikulpanit (1):
> iommu/amd: Remove performance counter pre-initialization test
Applied, thanks Paul and Suravee.
On Thu, Apr 08, 2021 at 10:16:22PM +0200, Krzysztof Kozlowski wrote:
> drivers/iommu/exynos-iommu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks.
On Thu, Apr 08, 2021 at 02:28:42PM +0200, Dafna Hirschfeld wrote:
> drivers/iommu/mtk_iommu.c | 19 ---
> 1 file changed, 8 insertions(+), 11 deletions(-)
Applied, thanks.
On Tue, Mar 23, 2021 at 02:06:19PM -0700, Nadav Amit wrote:
> drivers/iommu/amd/iommu.c | 76 +--
> 1 file changed, 42 insertions(+), 34 deletions(-)
Load-testing looks good here too, so this patch is queued now for v5.13,
thanks Nadav.
Regards,
On Thu, Apr 08, 2021 at 02:29:59PM +0100, Will Deacon wrote:
> git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git
> tags/arm-smmu-updates
Pulled, thanks Will.
On Thu, Apr 08, 2021 at 10:29:25AM +, Nadav Amit wrote:
> In the version that you referred me to, iommu_update_domain_tlb() only
> regards the size of the region to be flushed and disregards the
> alignment:
>
> + order = get_order(domain->flush.end - domain->flush.start);
> + mask
Hi Nadav,
On Wed, Apr 07, 2021 at 05:57:31PM +, Nadav Amit wrote:
> I tested it on real bare-metal hardware. I ran some basic I/O workloads
> with the IOMMU enabled, checkers enabled/disabled, and so on.
>
> However, I only tested the IOMMU-flushes and I did not test that the
> device-IOTLB
On Tue, Mar 23, 2021 at 02:06:19PM -0700, Nadav Amit wrote:
> From: Nadav Amit
>
> Currently, IOMMU invalidations and device-IOTLB invalidations using
> AMD IOMMU fall back to full address-space invalidation if more than a
> single page need to be flushed.
>
> Full flushes are especially
On Thu, Apr 01, 2021 at 07:19:16PM +0800, Qi Liu wrote:
> Remove duplicate check of pasids in amd_iommu_domain_enable_v2(), as it
> has been guaranteed in amd_iommu_init_device().
>
> Signed-off-by: Qi Liu
> ---
> drivers/iommu/amd/iommu.c | 3 ---
> 1 file changed, 3 deletions(-)
Applied,
On Wed, Mar 31, 2021 at 11:16:45AM +0800, Chunyan Zhang wrote:
> drivers/iommu/sprd-iommu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks.
On Tue, Mar 30, 2021 at 10:11:45AM +0800, Lu Baolu wrote:
> drivers/iommu/intel/pasid.h | 1 +
> drivers/iommu/intel/iommu.c | 11 ++-
> drivers/iommu/intel/pasid.c | 16
> 3 files changed, 27 insertions(+), 1 deletion(-)
Applied, thanks.
On Fri, Mar 26, 2021 at 11:23:36AM +0800, Yong Wu wrote:
> This patch only adds support for building the IOMMU-v1 driver as module.
> Correspondingly switch the config to tristate and update the iommu_ops's
> owner to THIS_MODULE.
>
> Signed-off-by: Yong Wu
Applied both, thanks.
On Thu, Mar 25, 2021 at 08:29:57PM +0800, John Garry wrote:
> John Garry (4):
> iova: Add CPU hotplug handler to flush rcaches
> iommu/vt-d: Remove IOVA domain rcache flushing for CPU offlining
> iommu: Delete iommu_dma_free_cpu_cached_iovas()
> iommu: Stop exporting free_iova_fast()
>
>
On Tue, Mar 23, 2021 at 09:05:55AM +0800, Lu Baolu wrote:
> Lu Baolu (5):
> iommu/vt-d: Remove unused dma map/unmap trace events
> iommu/vt-d: Remove svm_dev_ops
> iommu/vt-d: Remove SVM_FLAG_PRIVATE_PASID
> iommu/vt-d: Remove unused function declarations
> iommu/vt-d: Make unnecessarily
On Sat, Mar 20, 2021 at 10:41:56AM +0800, Lu Baolu wrote:
> drivers/iommu/intel/svm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Applied, thanks.
On Sat, Mar 20, 2021 at 10:09:16AM +0800, Lu Baolu wrote:
> drivers/iommu/intel/pasid.c | 21 +
> 1 file changed, 13 insertions(+), 8 deletions(-)
Applied, thanks.
On Mon, Mar 01, 2021 at 08:12:18PM +0800, John Garry wrote:
> The Intel IOMMU driver supports flushing the per-CPU rcaches when a CPU is
> offlined.
>
> Let's move it to core code, so everyone can take advantage.
>
> Also correct a code comment.
>
> Based on v5.12-rc1. Tested on arm64 only.
>
On Tue, Apr 06, 2021 at 02:56:53PM +0800, chenxiang (M) wrote:
> Is it possible to use group id to identify different domains?
No, the best is to do this during post-processing of your traces by also
keeping tack of domain-device attachments/detachments.
Regards,
Joerg
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: 799de1baaf3509a54ff713efb768020f8defd709
Gitweb:
https://git.kernel.org/tip/799de1baaf3509a54ff713efb768020f8defd709
Author:Joerg Roedel
AuthorDate:Wed, 03 Mar 2021 15:17:14 +01:00
Committer
On Fri, Mar 19, 2021 at 09:57:50AM +, Colin King wrote:
> From: Colin Ian King
>
> There is a spelling mistake in a dev_err message. Fix it.
>
> Signed-off-by: Colin Ian King
> ---
> drivers/iommu/sprd-iommu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks.
>
>
Dmitry Osipenko (1):
iommu/tegra-smmu: Make tegra_smmu_probe_device() to handle all IOMMU
phandles
Joerg Roedel (3):
iommu/amd: Move Stoney Ridge check to detect_ivrs()
iommu/amd: Don't call early_amd_iommu_init() when AMD IOMMU is disabled
iommu/amd: Keep track
Hi Baolu,
On Fri, Mar 19, 2021 at 09:02:34AM +0800, Lu Baolu wrote:
> This code modifies the pasid directory entry. The pasid directory
> entries are allocated on demand and will never be freed.
>
> > What you need to do here is to retry the whole path by adding a goto
> > to before the first
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: e927e62d8e370ebfc0d702fec22bc752249ebcef
Gitweb:
https://git.kernel.org/tip/e927e62d8e370ebfc0d702fec22bc752249ebcef
Author:Joerg Roedel
AuthorDate:Fri, 12 Mar 2021 13:38:22 +01:00
Committer
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: 1ccdbf748d862bc2ea106fa9f2300983c77860fe
Gitweb:
https://git.kernel.org/tip/1ccdbf748d862bc2ea106fa9f2300983c77860fe
Author:Joerg Roedel
AuthorDate:Wed, 10 Mar 2021 09:43:22 +01:00
Committer
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: f15a0a732aefb46f999c2a8aa8f9f16e71cec5b2
Gitweb:
https://git.kernel.org/tip/f15a0a732aefb46f999c2a8aa8f9f16e71cec5b2
Author:Joerg Roedel
AuthorDate:Fri, 12 Mar 2021 13:38:24 +01:00
Committer
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: fef81c86262879d4b1176ef51a834c15b805ebb9
Gitweb:
https://git.kernel.org/tip/fef81c86262879d4b1176ef51a834c15b805ebb9
Author:Joerg Roedel
AuthorDate:Fri, 12 Mar 2021 13:38:23 +01:00
Committer
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: eab696d8e8b9c9d600be6fad8dd8dfdfaca6ca7c
Gitweb:
https://git.kernel.org/tip/eab696d8e8b9c9d600be6fad8dd8dfdfaca6ca7c
Author:Joerg Roedel
AuthorDate:Fri, 12 Mar 2021 13:38:18 +01:00
Committer
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: 0dd986f3a1e31bd827d2f1f52f07c8a82cd83143
Gitweb:
https://git.kernel.org/tip/0dd986f3a1e31bd827d2f1f52f07c8a82cd83143
Author:Joerg Roedel
AuthorDate:Fri, 12 Mar 2021 13:38:22 +01:00
Committer
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: b099155e2df7dadf8b1ad9828158b89f5639f654
Gitweb:
https://git.kernel.org/tip/b099155e2df7dadf8b1ad9828158b89f5639f654
Author:Joerg Roedel
AuthorDate:Wed, 10 Mar 2021 09:43:19 +01:00
Committer
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: 79419e13e8082cc15d174df979a363528e31f2e7
Gitweb:
https://git.kernel.org/tip/79419e13e8082cc15d174df979a363528e31f2e7
Author:Joerg Roedel
AuthorDate:Wed, 10 Mar 2021 09:43:21 +01:00
Committer
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: 9e373ba233b236a831d0d9578be095a4b7435abe
Gitweb:
https://git.kernel.org/tip/9e373ba233b236a831d0d9578be095a4b7435abe
Author:Joerg Roedel
AuthorDate:Wed, 10 Mar 2021 09:43:22 +01:00
Committer
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: 0c289ff81c24033777fab23019039f11e1449ba4
Gitweb:
https://git.kernel.org/tip/0c289ff81c24033777fab23019039f11e1449ba4
Author:Joerg Roedel
AuthorDate:Wed, 10 Mar 2021 09:43:20 +01:00
Committer
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: 769eb023aa77062cf15c2a179fc8d13b43422c9b
Gitweb:
https://git.kernel.org/tip/769eb023aa77062cf15c2a179fc8d13b43422c9b
Author:Joerg Roedel
AuthorDate:Fri, 12 Mar 2021 13:38:23 +01:00
Committer
The following commit has been merged into the x86/seves branch of tip:
Commit-ID: 4fbe2c3b9dd04f44608d710ad2ae83d7f1c04182
Gitweb:
https://git.kernel.org/tip/4fbe2c3b9dd04f44608d710ad2ae83d7f1c04182
Author:Joerg Roedel
AuthorDate:Fri, 12 Mar 2021 13:38:24 +01:00
Committer
On Fri, Mar 12, 2021 at 03:04:09AM -0600, Suravee Suthikulpanit wrote:
> @@ -519,6 +521,7 @@ struct protection_domain {
> spinlock_t lock;/* mostly used to lock the page table*/
> u16 id; /* the domain id written to the device table */
> int glx;
On Thu, Mar 18, 2021 at 11:24:25AM +0200, Maxim Levitsky wrote:
> But again this is a debug feature, and it is intended to allow the user
> to shoot himself in the foot.
And one can't debug SEV-ES guests with it, so what is the point of
enabling it for them too?
Regards,
Joerg
On Fri, Mar 12, 2021 at 03:04:11AM -0600, Suravee Suthikulpanit wrote:
> Introduce init function for setting up DMA domain for DMA-API with
> the IOMMU v2 page table.
>
> Signed-off-by: Suravee Suthikulpanit
> ---
> drivers/iommu/amd/iommu.c | 21 +
> 1 file changed, 21
On Fri, Mar 12, 2021 at 03:04:10AM -0600, Suravee Suthikulpanit wrote:
> To allow specification whether to use v1 or v2 IOMMU pagetable for
> DMA remapping when calling kernel DMA-API.
>
> Signed-off-by: Suravee Suthikulpanit
> ---
> Documentation/admin-guide/kernel-parameters.txt | 6 ++
>
Hi Suravee,
On Fri, Mar 12, 2021 at 03:04:08AM -0600, Suravee Suthikulpanit wrote:
> @@ -503,6 +504,7 @@ struct amd_io_pgtable {
> int mode;
> u64 *root;
> atomic64_t pt_root;/* pgtable root and pgtable mode */
> +
On Tue, Mar 02, 2021 at 02:13:56AM -0800, Jacob Pan wrote:
> Hi Baolu et al,
>
> This is a collection of SVA-related fixes.
>
> ChangeLog:
>
> v2:
> - For guest SVA, call pasid_set_wpe directly w/o checking host CR0.wp
> (Review comments by Kevin T.)
> - Added fixes tag
>
>
On Fri, Mar 12, 2021 at 06:54:39PM +0300, Dmitry Osipenko wrote:
> The tegra_smmu_probe_device() handles only the first IOMMU device-tree
> phandle, skipping the rest. Devices like 3D module on Tegra30 have
> multiple IOMMU phandles, one for each h/w block, and thus, only one
> IOMMU phandle is
On Thu, Mar 18, 2021 at 08:53:40AM +0800, Lu Baolu wrote:
> When the invalidation queue errors are encountered, dump the information
> logged by the VT-d hardware together with the pending queue invalidation
> descriptors.
>
> Signed-off-by: Ashok Raj
> Tested-by: Guo Kaijie
> Signed-off-by: Lu
On Sun, Mar 14, 2021 at 01:15:34PM -0700, Kyung Min Park wrote:
> Currently, the Intel VT-d supports Shared Virtual Memory (SVM) only when
> IO page fault is supported. Otherwise, shared memory pages can not be
> swapped out and need to be pinned. The device needs the Address Translation
> Service
On Wed, Mar 17, 2021 at 08:58:34AM +0800, Lu Baolu wrote:
> The pasid_lock is used to synchronize different threads from modifying a
> same pasid directory entry at the same time. It causes below lockdep splat.
>
> [ 83.296538]
> [
Hi Baolu,
On Tue, Mar 09, 2021 at 08:46:41AM +0800, Lu Baolu wrote:
> The private data field of a page group response descriptor is set then
> immediately cleared in prq_event_thread(). Fix this by moving clearing
> code up.
>
> Fixes: 5b438f4ba315d ("iommu/vt-d: Support page request in scalable
On Fri, Mar 05, 2021 at 04:35:22PM +, Robin Murphy wrote:
> Repeating the rb_entry() boilerplate all over the place gets old fast.
> Before adding yet more instances, add a little hepler to tidy it up.
>
> Signed-off-by: Robin Murphy
> ---
> drivers/iommu/iova.c | 23 ++-
On Fri, Mar 05, 2021 at 04:32:34PM +, Robin Murphy wrote:
> In converting intel-iommu over to the common IOMMU DMA ops, it quietly
> lost the functionality of its "forcedac" option. Since this is a handy
> thing both for testing and for performance optimisation on certain
> platforms,
On Fri, Mar 05, 2021 at 05:32:14PM +0800, Chunyan Zhang wrote:
> .../devicetree/bindings/iommu/sprd,iommu.yaml | 57 ++
> drivers/iommu/Kconfig | 12 +
> drivers/iommu/Makefile| 1 +
> drivers/iommu/sprd-iommu.c| 577
On Wed, Mar 03, 2021 at 05:36:11PM +, Shameer Kolothum wrote:
> The device iommu probe/attach might have failed leaving dev->iommu
> to NULL and device drivers may still invoke these functions resulting
> in a crash in iommu vendor driver code.
>
> Hence make sure we check that.
>
> Fixes:
On Wed, Mar 17, 2021 at 06:48:50PM +0800, Huang Rui wrote:
> Series are Acked-by: Huang Rui
Thanks, series is applied for v5.12
On Tue, Mar 16, 2021 at 12:51:20PM +0200, Maxim Levitsky wrote:
> I agree but what is wrong with that?
> This is a debug feature, and it only can be enabled by the root,
> and so someone might actually want this case to happen
> (e.g to see if a SEV guest can cope with extra #VC exceptions).
Hi,
On Mon, Mar 08, 2021 at 11:47:46AM -0800, Raj, Ashok wrote:
> That is the primary motivation, given that we have moved to 1st level for
> general IOVA, first level doesn't have a WO mapping. I didn't know enough
> about the history to determine if a WO without a READ is very useful. I
> guess
On Wed, Mar 17, 2021 at 01:37:16PM +, David Woodhouse wrote:
> If we can get to the point where we don't even need to check
> amd_iommu_irq_remap in the ...select() function because the IRQ domain
> is never even registered in the case where the flag ends up false, all
> the better :)
This
On Wed, Mar 17, 2021 at 11:47:11AM +, David Woodhouse wrote:
> If you've already moved the Stoney Ridge check out of the way, there's
> no real reason why you can't just set init_state=IOMMU_CMDLINE_DISABLED
> directly from parse_amd_iommu_options(), is there? Then you don't need
> the
From: Joerg Roedel
Don't even try to initialize the AMD IOMMU hardware when amd_iommu=off has been
passed on the kernel command line.
References: https://bugzilla.kernel.org/show_bug.cgi?id=212133
References: https://bugzilla.suse.com/show_bug.cgi?id=1183132
Cc: sta...@vger.kernel.org # v5.11
From: Joerg Roedel
The amd_iommu_irq_remap variable is set to true in amd_iommu_prepare().
But if initialization fails it is not set to false. Fix that and
correctly keep track of whether irq remapping is enabled or not.
References: https://bugzilla.kernel.org/show_bug.cgi?id=212133
References
From: Joerg Roedel
Hi,
it turned out that booting a kernel with amd_iommu=off on a machine
that has an AMD IOMMU causes an early kernel crash. There are two
reasons for this, and fixing one of them is already sufficient, but
both reasons deserve fixing, which is done in this patch-set.
Regards
From: Joerg Roedel
The AMD IOMMU will not be enabled on AMD Stoney Ridge systems. Bail
out even earlier and refuse to even detect the IOMMU there.
References: https://bugzilla.kernel.org/show_bug.cgi?id=212133
References: https://bugzilla.suse.com/show_bug.cgi?id=1183132
Cc: sta
On Tue, Mar 16, 2021 at 09:36:02PM +0800, Huang Rui wrote:
> Thanks for the comments. Could you please elaborate this?
>
> Do you mean while amd_iommu=off, we won't prepare the IVRS, and even
> needn't get all ACPI talbes. Because they are never be used and the next
> state will always goes into
Hi Huang,
On Thu, Mar 11, 2021 at 10:28:07PM +0800, Huang Rui wrote:
> diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
> index f0adbc48fd17..a08e885403b7 100644
> --- a/drivers/iommu/amd/iommu.c
> +++ b/drivers/iommu/amd/iommu.c
> @@ -3862,7 +3862,7 @@ static int
Hi Maxim,
On Tue, Mar 16, 2021 at 12:10:20AM +0200, Maxim Levitsky wrote:
> -static int (*const svm_exit_handlers[])(struct kvm_vcpu *vcpu) = {
> +static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu) = {
Can you keep this const and always set the necessary handlers? If
exceptions are not
From: Joerg Roedel
Exception handling in the startup_32 boot path requires the CS
selector to be correctly set up. Reload it from the current GDT.
Signed-off-by: Joerg Roedel
---
arch/x86/boot/compressed/head_64.S | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
From: Joerg Roedel
A malicious hypervisor could disable the CPUID intercept for an SEV or
SEV-ES guest and trick it into the no-SEV boot path, where it could
potentially reveal secrets. This is not an issue for SEV-SNP guests,
as the CPUID intercept can't be disabled for those.
Remove
From: Joerg Roedel
Hi,
these patches add support for the 32-bit boot in the decompressor
code. This is needed to boot an SEV-ES guest on some firmware and grub
versions. The patches also add the necessary CPUID sanity checks and a
32-bit version of the C-bit check.
Other updates included here
From: Joerg Roedel
The 32-bit #VC handler has no GHCB and can only handle CPUID exit codes.
It is needed by the early boot code to handle #VC exceptions raised in
verify_cpu() and to get the position of the C bit.
But the CPUID information comes from the hypervisor, which is untrusted
and might
From: Joerg Roedel
Add a #VC exception handler which is used when the kernel still executes
in protected mode. This boot-path already uses CPUID, which will cause #VC
exceptions in an SEV-ES guest.
Signed-off-by: Joerg Roedel
---
arch/x86/boot/compressed/head_64.S | 6 ++
arch/x86/boot
From: Joerg Roedel
This boot path needs exception handling when it is used with SEV-ES.
Setup an IDT and provide a helper function to write IDT entries for
use in 32-bit protected mode.
Signed-off-by: Joerg Roedel
---
arch/x86/boot/compressed/head_64.S | 72 ++
1
From: Joerg Roedel
Check whether the hypervisor reported the correct C-bit when running as
an SEV guest. Using a wrong C-bit position could be used to leak
sensitive data from the guest to the hypervisor.
Signed-off-by: Joerg Roedel
---
arch/x86/boot/compressed/head_64.S | 83
From: Joerg Roedel
Disable the exception handling before booting the kernel to make sure
any exceptions that happen during early kernel boot are not directed to
the pre-decompression code.
Signed-off-by: Joerg Roedel
---
arch/x86/boot/compressed/idt_64.c | 14 ++
arch/x86/boot
From: Joerg Roedel
There are a few places left in the SEV-ES C code where hlt loops and/or
terminate requests are implemented. Replace them all with calls to
sev_es_terminate().
Signed-off-by: Joerg Roedel
---
arch/x86/boot/compressed/sev-es.c | 12 +++-
arch/x86/kernel/sev-es
From: Joerg Roedel
The 32-bit #VC handler has no GHCB and can only handle CPUID exit codes.
It is needed by the early boot code to handle #VC exceptions raised in
verify_cpu() and to get the position of the C bit.
But the CPUID information comes from the hypervisor, which is untrusted
and might
From: Joerg Roedel
Check whether the hypervisor reported the correct C-bit when running as
an SEV guest. Using a wrong C-bit position could be used to leak
sensitive data from the guest to the hypervisor.
Signed-off-by: Joerg Roedel
---
arch/x86/boot/compressed/head_64.S | 83
From: Joerg Roedel
Exception handling in the startup_32 boot path requires the CS
selector to be correctly set up. Reload it from the current GDT.
Signed-off-by: Joerg Roedel
---
arch/x86/boot/compressed/head_64.S | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
From: Joerg Roedel
Hi,
these patches add support for the 32-bit boot in the decompressor
code. This is needed to boot an SEV-ES guest on some firmware and grub
versions. The patches also add the necessary CPUID sanity checks and a
32-bit version of the C-bit check.
Other updates included here
From: Joerg Roedel
Add a #VC exception handler which is used when the kernel still executes
in protected mode. This boot-path already uses CPUID, which will cause #VC
exceptions in an SEV-ES guest.
Signed-off-by: Joerg Roedel
---
arch/x86/boot/compressed/head_64.S | 6 ++
arch/x86/boot
From: Joerg Roedel
This boot path needs exception handling when it is used with SEV-ES.
Setup an IDT and provide a helper function to write IDT entries for
use in 32-bit protected mode.
Signed-off-by: Joerg Roedel
---
arch/x86/boot/compressed/head_64.S | 72 ++
1
From: Joerg Roedel
There are a few places left in the SEV-ES C code where hlt loops and/or
terminate requests are implemented. Replace them all with calls to
sev_es_terminate().
Signed-off-by: Joerg Roedel
---
arch/x86/boot/compressed/sev-es.c | 12 +++-
arch/x86/kernel/sev-es
From: Joerg Roedel
Disable the exception handling before booting the kernel to make sure
any exceptions that happen during early kernel boot are not directed to
the pre-decompression code.
Signed-off-by: Joerg Roedel
---
arch/x86/boot/compressed/idt_64.c | 14 ++
arch/x86/boot
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 78a81d88f60ba773cbe890205e1ee67f00502948
Gitweb:
https://git.kernel.org/tip/78a81d88f60ba773cbe890205e1ee67f00502948
Author:Joerg Roedel
AuthorDate:Wed, 03 Mar 2021 15:17:12 +01:00
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: bffe30dd9f1f3b2608a87ac909a224d6be472485
Gitweb:
https://git.kernel.org/tip/bffe30dd9f1f3b2608a87ac909a224d6be472485
Author:Joerg Roedel
AuthorDate:Wed, 03 Mar 2021 15:17:16 +01:00
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 62441a1fb53263bda349b6e5997c3cc5c120d89e
Gitweb:
https://git.kernel.org/tip/62441a1fb53263bda349b6e5997c3cc5c120d89e
Author:Joerg Roedel
AuthorDate:Wed, 03 Mar 2021 15:17:15 +01:00
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 545ac14c16b5dbd909d5a90ddf5b5a629a40fa94
Gitweb:
https://git.kernel.org/tip/545ac14c16b5dbd909d5a90ddf5b5a629a40fa94
Author:Joerg Roedel
AuthorDate:Wed, 03 Mar 2021 15:17:13 +01:00
On Tue, Mar 02, 2021 at 08:43:53PM +0100, Borislav Petkov wrote:
> On Wed, Feb 10, 2021 at 11:21:34AM +0100, Joerg Roedel wrote:
> > + /*
> > +* Store the sme_me_mask as an indicator that SEV is active. It will be
> > +* set again in startup_64().
>
> So wh
Hi Linus,
The following changes since commit 45e606f2726926b04094e1c9bf809bca4884c57f:
Merge branches 'arm/renesas', 'arm/smmu', 'x86/amd', 'x86/vt-d' and 'core'
into next (2021-02-12 15:27:17 +0100)
are available in the Git repository at:
On Sat, Feb 27, 2021 at 03:39:09PM +0800, Zenghui Yu wrote:
> As per Intel vt-d spec, Rev 3.0 (section 10.4.45 "Virtual Command Response
> Register"), the status code of "No PASID available" error in response to
> the Allocate PASID command is 2, not 1. The same for "Invalid PASID" error
> in
On Thu, Feb 25, 2021 at 02:26:51PM +0800, Lu Baolu wrote:
> When the first level page table is used for IOVA translation, it only
> supports Read-Only and Read-Write permissions. The Write-Only permission
> is not supported as the PRESENT bit (implying Read permission) should
> always set. When
On Thu, Feb 18, 2021 at 02:07:02PM -0800, Nicolin Chen wrote:
> drivers/iommu/tegra-smmu.c | 72 +-
> 1 file changed, 71 insertions(+), 1 deletion(-)
Applied for v5.12, thanks.
cked-by: Will Deacon
Cc:
Link: https://lore.kernel.org/r/20210217143004.19165-1-a...@yandex-team.com
Signed-off-by: Joerg Roedel
---
drivers/iommu/amd/io_pgtable.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/amd/io_pgtable.c b/drivers/iommu/amd/
From: Joerg Roedel
Hi,
here are a couple of fixes for 5.12 in the SEV-ES guest support code.
Patches 1-3 have in a similar form already been posted, so this is v2.
The last two patches are new an arose from me running an SEV-ES guest
with more debugging features and instrumentation enabled. I
From: Joerg Roedel
The #VC handler must run atomic and can not be put to sleep. This is a
problem when it tries to fetch instruction bytes from user-space via
copy_from_user.
Introduce a insn_fetch_from_user_inatomic() helper which uses
__copy_from_user_inatomic() to safely copy the instruction
From: Joerg Roedel
The code in the NMI handler to adjust the #VC handler IST stack is
needed in case an NMI hits when the #VC handler is still using its IST
stack.
But the check for this condition also needs to look if the regs->sp
value is trusted, meaning it was not set by user-space. Ext
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