to control the MMCM to generate required clocks with respect
to speed mode.
Signed-off-by: Prabu Thangamuthu
---
V3 - Updated License.
Re-sending the patch using git send-email.
V2 - Removed sdhci-pci-dwc-mshc.h and moved into sdhci-pci-dwc-mshc.c
Fixed the coding style issue.
Removed
to control the MMCM to generate required clocks with respect
to speed mode.
Signed-off-by: Prabu Thangamuthu
---
V3 - Updated License.
Re-sending the patch using git send-email.
V2 - Removed sdhci-pci-dwc-mshc.h and moved into sdhci-pci-dwc-mshc.c
Fixed the coding style issue.
Removed
ation mentioned as per
https://www.kernel.org/doc/html/v4.10/process/email-clients.html.
Not sure what went wrong in my configuration. Sorry for that.
I will re-send the patch with git send-mail.
Thanks,
Prabu
> On 30/05/18 18:07, Prabu Thangamuthu wrote:
>> Synopsys has DWC MSHC contro
ation mentioned as per
https://www.kernel.org/doc/html/v4.10/process/email-clients.html.
Not sure what went wrong in my configuration. Sorry for that.
I will re-send the patch with git send-mail.
Thanks,
Prabu
> On 30/05/18 18:07, Prabu Thangamuthu wrote:
>> Synopsys has DWC MSHC contro
to control the MMCM to generate required clocks with respect
to speed mode.
Signed-off-by: Prabu Thangamuthu
---
V2 - Removed sdhci-pci-dwc-mshc.h and moved into sdhci-pci-dwc-mshc.c
Fixed coding style issue.
Removed sdhci_snps_set_power and new approach to support eMMC device
voltages
to control the MMCM to generate required clocks with respect
to speed mode.
Signed-off-by: Prabu Thangamuthu
---
V2 - Removed sdhci-pci-dwc-mshc.h and moved into sdhci-pci-dwc-mshc.c
Fixed coding style issue.
Removed sdhci_snps_set_power and new approach to support eMMC device
voltages
Hi Andy,
Thanks for pointing all. We will fix it.
Regards,
Prabu
On 5/28/2018 5:49 PM, Andy Shevchenko wrote:
> On Tue, May 22, 2018 at 9:42 AM, Prabu Thangamuthu <prab...@synopsys.com>
> wrote:
>> To enable Synopsys DWC MSHC controller on HPAS-DX platform connected using
Hi Andy,
Thanks for pointing all. We will fix it.
Regards,
Prabu
On 5/28/2018 5:49 PM, Andy Shevchenko wrote:
> On Tue, May 22, 2018 at 9:42 AM, Prabu Thangamuthu
> wrote:
>> To enable Synopsys DWC MSHC controller on HPAS-DX platform connected using
>> PCIe interface. A
Hi Adrian,
On 5/24/2018 5:43 PM, Adrian Hunter wrote:
> On 24/05/18 14:28, Prabu Thangamuthu wrote:
>> Hi Adrian,
>>
>> On 5/24/2018 2:06 PM, Adrian Hunter wrote:
>>> Hi
>>>
>>> This patch is mangled.
>> We will check it.
>>> On 22/05
Hi Adrian,
On 5/24/2018 5:43 PM, Adrian Hunter wrote:
> On 24/05/18 14:28, Prabu Thangamuthu wrote:
>> Hi Adrian,
>>
>> On 5/24/2018 2:06 PM, Adrian Hunter wrote:
>>> Hi
>>>
>>> This patch is mangled.
>> We will check it.
>>> On 22/05
Hi Adrian,
On 5/24/2018 5:43 PM, Adrian Hunter wrote:
> On 24/05/18 14:28, Prabu Thangamuthu wrote:
>> Hi Adrian,
>>
>> On 5/24/2018 2:06 PM, Adrian Hunter wrote:
>>> Hi
>>>
>>> This patch is mangled.
>> We will check it.
>>> On 22/05
Hi Adrian,
On 5/24/2018 5:43 PM, Adrian Hunter wrote:
> On 24/05/18 14:28, Prabu Thangamuthu wrote:
>> Hi Adrian,
>>
>> On 5/24/2018 2:06 PM, Adrian Hunter wrote:
>>> Hi
>>>
>>> This patch is mangled.
>> We will check it.
>>> On 22/05
Hi Adrian,
On 5/24/2018 2:06 PM, Adrian Hunter wrote:
> Hi
>
> This patch is mangled.
We will check it.
>
> On 22/05/18 09:42, Prabu Thangamuthu wrote:
>> To enable Synopsys DWC MSHC controller on HPAS-DX platform connected using
>> PCIe interface. As Clock generation l
Hi Adrian,
On 5/24/2018 2:06 PM, Adrian Hunter wrote:
> Hi
>
> This patch is mangled.
We will check it.
>
> On 22/05/18 09:42, Prabu Thangamuthu wrote:
>> To enable Synopsys DWC MSHC controller on HPAS-DX platform connected using
>> PCIe interface. As Clock generation l
specific set_power function to support different VDD of eMMC devices.
Signed-off-by: Prabu Thangamuthu <prab...@synopsys.com>
---
MAINTAINERS | 7 ++
drivers/mmc/host/Makefile | 3 +-
drivers/mmc/host/sdhci-pci-core.c | 1 +
drivers/mmc/host/sdhci-p
specific set_power function to support different VDD of eMMC devices.
Signed-off-by: Prabu Thangamuthu
---
MAINTAINERS | 7 ++
drivers/mmc/host/Makefile | 3 +-
drivers/mmc/host/sdhci-pci-core.c | 1 +
drivers/mmc/host/sdhci-pci-dwc-mshc.c | 146
Hi Adrian,
Yes, this patch was meant for linux stable. Thank you pointing me the
corresponding rules.
We are planning to port our driver to mainline. We will submit the patch
for mainline when it's ready.
Thanks,
Prabu
On 4/26/2018 3:27 PM, Adrian Hunter wrote:
> On 12/04/18 18:47, Pr
Hi Adrian,
Yes, this patch was meant for linux stable. Thank you pointing me the
corresponding rules.
We are planning to port our driver to mainline. We will submit the patch
for mainline when it's ready.
Thanks,
Prabu
On 4/26/2018 3:27 PM, Adrian Hunter wrote:
> On 12/04/18 18:47, Pr
-DX platform,
we need separate functions to control the MMCM module to generate required
clocks with respect to mode of operations. Also we have the platform
specific set_power function to support different VDD of eMMC devices.
Signed-off-by: Prabu Thangamuthu <prab...@synopsys.com>
---
MAINT
-DX platform,
we need separate functions to control the MMCM module to generate required
clocks with respect to mode of operations. Also we have the platform
specific set_power function to support different VDD of eMMC devices.
Signed-off-by: Prabu Thangamuthu
---
MAINTAINERS
gled mail, it is
> not clear it is intended for upstream?
>
> Regards
> Adrian
>
> On 28/03/18 18:28, Prabu Thangamuthu wrote:
> > Synopsys DWC MSHC IP is complaint to SD Standard Host Controller
> > Interface
> >
> > specification. This patch is to enable DWC MS
gled mail, it is
> not clear it is intended for upstream?
>
> Regards
> Adrian
>
> On 28/03/18 18:28, Prabu Thangamuthu wrote:
> > Synopsys DWC MSHC IP is complaint to SD Standard Host Controller
> > Interface
> >
> > specification. This patch is to enable DWC MS
As per internal decision, Joao Pinto will be maintainer for DWC UFS driver.
Signed-off-by: Prabu Thangamuthu <pra...@synopsys.com>
---
MAINTAINERS |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8a99f6b..2122e93 100644
--- a/MAINT
As per internal decision, Joao Pinto will be maintainer for DWC UFS driver.
Signed-off-by: Prabu Thangamuthu
---
MAINTAINERS |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8a99f6b..2122e93 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
Patch to add Standard SD Host Controller Interface compliant
Synopsys sdhci-dwc controller driver.
Signed-off-by: Prabu Thangamuthu <prab...@synopsys.com>
---
Change log v5:
-Updated review comments.
Change log v4:
-Updated review comments to optimize the code.
Change
Patch to add Standard SD Host Controller Interface compliant
Synopsys sdhci-dwc controller driver.
Signed-off-by: Prabu Thangamuthu
---
Change log v5:
-Updated review comments.
Change log v4:
-Updated review comments to optimize the code.
Change log v3:
-Removed unused
Hi Andy Shevchenko,
On 04/27/2016 7:09 PM, Andy Shevchenko wrote:
>
> On Wed, Apr 27, 2016 at 2:51 PM, Prabu Thangamuthu
> <prab...@synopsys.com> wrote:
> > Patch for Standard SD Host Controller Interface compliant Synopsys
> > sdhci-dwc controller driver. This code s
Hi Andy Shevchenko,
On 04/27/2016 7:09 PM, Andy Shevchenko wrote:
>
> On Wed, Apr 27, 2016 at 2:51 PM, Prabu Thangamuthu
> wrote:
> > Patch for Standard SD Host Controller Interface compliant Synopsys
> > sdhci-dwc controller driver. This code supports PCI based interface.
Patch for Standard SD Host Controller Interface compliant Synopsys
sdhci-dwc controller driver. This code supports PCI based interface.
Signed-off-by: Prabu Thangamuthu <prab...@synopsys.com>
---
Change log v4:
-Updated review comments to optimize the code.
Change
Patch for Standard SD Host Controller Interface compliant Synopsys
sdhci-dwc controller driver. This code supports PCI based interface.
Signed-off-by: Prabu Thangamuthu
---
Change log v4:
-Updated review comments to optimize the code.
Change log v3:
-Removed unused code
Hi Ludovic,
On 04/26/2016 06:59 PM, Ludovic Desroches wrote:
>
> On Tue, Apr 26, 2016 at 12:31:50PM +, Prabu Thangamuthu wrote:
> > Hi Ludovic, Jaehoon Chung,
> >
> > Thank you for your review comments,
> >
> > On 04/26/2016 04:15 PM, Jaehoon Chung wrote
Hi Ludovic,
On 04/26/2016 06:59 PM, Ludovic Desroches wrote:
>
> On Tue, Apr 26, 2016 at 12:31:50PM +, Prabu Thangamuthu wrote:
> > Hi Ludovic, Jaehoon Chung,
> >
> > Thank you for your review comments,
> >
> > On 04/26/2016 04:15 PM, Jaehoon Chung wrote
Hi Ludovic, Jaehoon Chung,
Thank you for your review comments,
On 04/26/2016 04:15 PM, Jaehoon Chung wrote:
>
> On 04/26/2016 05:58 PM, Ludovic Desroches wrote:
> > On Wed, Apr 20, 2016 at 12:22:59PM +, Prabu Thangamuthu wrote:
> >> Patch for Standard SD Host Controlle
Hi Ludovic, Jaehoon Chung,
Thank you for your review comments,
On 04/26/2016 04:15 PM, Jaehoon Chung wrote:
>
> On 04/26/2016 05:58 PM, Ludovic Desroches wrote:
> > On Wed, Apr 20, 2016 at 12:22:59PM +, Prabu Thangamuthu wrote:
> >> Patch for Standard SD Host Controlle
Patch for Standard SD Host Controller Interface compliant Synopsys
sdhci-dwc controller driver. This code supports PCI based interface.
Signed-off-by: Prabu Thangamuthu <prab...@synopsys.com>
---
Change log v3:
-Removed unused code.
-Updated review comments.
Change
Patch for Standard SD Host Controller Interface compliant Synopsys
sdhci-dwc controller driver. This code supports PCI based interface.
Signed-off-by: Prabu Thangamuthu
---
Change log v3:
-Removed unused code.
-Updated review comments.
Change log v2:
-Removed Synopsys
Hi Jaehoon Chung,
Thank you for detailed review comments.
On 04/19/2016 04:31 PM, Jaehoon Chung wrote:
> On 04/19/2016 04:18 PM, Prabu Thangamuthu wrote:
> > Synopsys DWC_MSHC is compliant with SD Host Specifications. This patch
> > is to support DWC_MSHC controller o
Hi Jaehoon Chung,
Thank you for detailed review comments.
On 04/19/2016 04:31 PM, Jaehoon Chung wrote:
> On 04/19/2016 04:18 PM, Prabu Thangamuthu wrote:
> > Synopsys DWC_MSHC is compliant with SD Host Specifications. This patch
> > is to support DWC_MSHC controller o
Hi Ludovic,
Thank you for review comments.
On Tue, April 19, 2016 1:04 PM, Ludovic Desroches wrote:
> Hi Prabu,
>
> On Tue, Apr 19, 2016 at 07:18:36AM +0000, Prabu Thangamuthu wrote:
> > Synopsys DWC_MSHC is compliant with SD Host Specifications. This patch
> > is to suppor
Hi Ludovic,
Thank you for review comments.
On Tue, April 19, 2016 1:04 PM, Ludovic Desroches wrote:
> Hi Prabu,
>
> On Tue, Apr 19, 2016 at 07:18:36AM +0000, Prabu Thangamuthu wrote:
> > Synopsys DWC_MSHC is compliant with SD Host Specifications. This patch
> > is to suppor
Synopsys DWC_MSHC is compliant with SD Host Specifications. This patch
is to support DWC_MSHC controller on PCI interface.
Signed-off-by: Prabu Thangamuthu <prab...@synopsys.com>
---
Change log v2:
-Removed Synopsys specific PCI device ID's from pci_ids.h.
-Updated the PCI
Synopsys DWC_MSHC is compliant with SD Host Specifications. This patch
is to support DWC_MSHC controller on PCI interface.
Signed-off-by: Prabu Thangamuthu
---
Change log v2:
-Removed Synopsys specific PCI device ID's from pci_ids.h.
-Updated the PCI device ID's in sdhci-pci
0xc202
>
> Please read the top of this file for why you should not add any new entries to
> it.
Thank you for pointing it.
I will update the Patch accordingly.
Regards,
Prabu Thangamuthu.
0xc202
>
> Please read the top of this file for why you should not add any new entries to
> it.
Thank you for pointing it.
I will update the Patch accordingly.
Regards,
Prabu Thangamuthu.
Synopsys released SD Host Controller Standard Specification compliant IP
called as DWC_MSHC. This patch is to support DWC_MSHC controller with PCI
interface.
Signed-off-by: Prabu Thangamuthu <prab...@synopsys.com>
---
MAINTAINERS | 7 +
drivers/mmc/host/Ma
Synopsys released SD Host Controller Standard Specification compliant IP
called as DWC_MSHC. This patch is to support DWC_MSHC controller with PCI
interface.
Signed-off-by: Prabu Thangamuthu
---
MAINTAINERS | 7 +
drivers/mmc/host/Makefile | 3
to process hung.
Signed-off-by: Prabu Thangamuthu
---
Change log v2:
-Added prefix "mmc:" to the commit message header.
-Updated the Commit Message.
drivers/mmc/host/dw_mmc.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/
to process hung.
Signed-off-by: Prabu Thangamuthu prab...@synopsys.com
---
Change log v2:
-Added prefix mmc: to the commit message header.
-Updated the Commit Message.
drivers/mmc/host/dw_mmc.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers
r review!
>
> Best Regards,
> Jaehoon Chung
>
> On 05/22/2015 10:21 PM, Ulf Hansson wrote:
> > On 18 May 2015 at 16:23, Prabu Thangamuthu
> wrote:
> >> Removing dw_mmc driver immediately after inserting the dw_mmc driver
> >> is
> >
> > I guess
On 05/22/2015 10:21 PM, Ulf Hansson wrote:
On 18 May 2015 at 16:23, Prabu Thangamuthu prab...@synopsys.com
wrote:
Removing dw_mmc driver immediately after inserting the dw_mmc driver
is
I guess it hangs even if you remove it after a couple of days? :-)
Perhaps makes this a bit more
waiting for command complete interrupt. Since INTMASK was already
cleared by dw_mci_remove, command complete interrupt is not reaching
the system. This leads to process hung.
Signed-off-by: Prabu Thangamuthu
---
drivers/mmc/host/dw_mmc.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions
waiting for command complete interrupt. Since INTMASK was already
cleared by dw_mci_remove, command complete interrupt is not reaching
the system. This leads to process hung.
Signed-off-by: Prabu Thangamuthu prab...@synopsys.com
---
drivers/mmc/host/dw_mmc.c |6 +++---
1 files changed, 3
Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit address
mode from IP version 2.70a onwards.
Updated the driver to support IDMAC 64-bit addressing mode.
Signed-off-by: Prabu Thangamuthu
---
Change log v7:
- Initialized reserved fileds and buffer size filed to zero
Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit address
mode from IP version 2.70a onwards.
Updated the driver to support IDMAC 64-bit addressing mode.
Signed-off-by: Prabu Thangamuthu prab...@synopsys.com
---
Change log v7:
- Initialized reserved fileds and buffer
Hi,
On Thu, Oct 16, 2014 at 4:42 PM, Jaehoon Chung wrote:
> On 10/16/2014 08:09 PM, Vivek Gautam wrote:
> > Hi Prabu,
> >
> >
> > On Thu, Oct 16, 2014 at 4:09 PM, Prabu Thangamuthu
> wrote:
> >>
> >> Hi Jaehoon, Vivek, Alim,
> >>
>
t; >> Hi Prahu,
> >> Thanks for a quick re-spin o the patch.
> >> One last comment, this is more of a information seek.
> >> On Thu, Oct 9, 2014 at 1:09 PM, Prabu Thangamuthu
> wrote:
> >>> Synopsys DW_MMC IP core supports Internal DMA Contro
Prahu,
Thanks for a quick re-spin o the patch.
One last comment, this is more of a information seek.
On Thu, Oct 9, 2014 at 1:09 PM, Prabu Thangamuthu
prab...@synopsys.com wrote:
Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit
address mode from IP version 2.70a onwards
Hi,
On Thu, Oct 16, 2014 at 4:42 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
On 10/16/2014 08:09 PM, Vivek Gautam wrote:
Hi Prabu,
On Thu, Oct 16, 2014 at 4:09 PM, Prabu Thangamuthu
prab...@synopsys.com wrote:
Hi Jaehoon, Vivek, Alim,
Thanks for your review comments
Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit address
mode from IP version 2.70a onwards.
Updated the driver to support IDMAC 64-bit addressing mode.
Tested the features in DW_MMC core v2.70a and v2.40a with HAPS-51 setup and
driver is working fine.
Signed-off-by: Prabu
Hi Alim,
Thank you for reviewing and testing our Patch.
On Wed, Oct 8, 2014 at 7:17 PM, Alim Akhtar wrote:
> Hi Prabu,
>
> On Tue, Oct 7, 2014 at 5:17 PM, Prabu Thangamuthu
> wrote:
> > Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit
> address mode
Hi Alim,
Thank you for reviewing and testing our Patch.
On Wed, Oct 8, 2014 at 7:17 PM, Alim Akhtar alim.akh...@gmail.com wrote:
Hi Prabu,
On Tue, Oct 7, 2014 at 5:17 PM, Prabu Thangamuthu
prab...@synopsys.com wrote:
Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit
Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit address
mode from IP version 2.70a onwards.
Updated the driver to support IDMAC 64-bit addressing mode.
Tested the features in DW_MMC core v2.70a and v2.40a with HAPS-51 setup and
driver is working fine.
Signed-off-by: Prabu
-by: Prabu Thangamuthu
---
Change log v5:
- Recreated the patch against linux-next as this patch is required for
another patch http://www.spinics.net/lists/arm-kernel/msg357985.html
Change log v4:
- Add the dynamic support for 32-bit and 64-bit address mode based on
hw configuration
-by: Prabu Thangamuthu prab...@synopsys.com
---
Change log v5:
- Recreated the patch against linux-next as this patch is required for
another patch http://www.spinics.net/lists/arm-kernel/msg357985.html
Change log v4:
- Add the dynamic support for 32-bit and 64-bit address mode based
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