> -Original Message-
> From: linux-gpio-ow...@vger.kernel.org [mailto:linux-gpio-
> ow...@vger.kernel.org] On Behalf Of Andy Shevchenko
> Sent: Friday, November 11, 2016 12:07 AM
> To: Tan, Jui Nee <jui.nee@intel.com>; mika.westerb...@linux.inte
> -Original Message-
> From: linux-gpio-ow...@vger.kernel.org [mailto:linux-gpio-
> ow...@vger.kernel.org] On Behalf Of Andy Shevchenko
> Sent: Friday, November 11, 2016 12:07 AM
> To: Tan, Jui Nee ; mika.westerb...@linux.intel.com;
> heikki.kroge...@linux.intel.com;
> -Original Message-
> From: Andy Shevchenko [mailto:andriy.shevche...@linux.intel.com]
> Sent: Friday, November 18, 2016 7:22 PM
> To: Tan, Jui Nee <jui.nee@intel.com>; mika.westerb...@linux.intel.com;
> heikki.kroge...@linux.intel.com; t...@linutronix.de; dvh..
> -Original Message-
> From: Andy Shevchenko [mailto:andriy.shevche...@linux.intel.com]
> Sent: Friday, November 18, 2016 7:22 PM
> To: Tan, Jui Nee ; mika.westerb...@linux.intel.com;
> heikki.kroge...@linux.intel.com; t...@linutronix.de; dvh...@infradead.org;
> m
From: Andy Shevchenko
There is already one and at least one more user coming which
require an access to Primary to Sideband bridge (P2SB) in order
to get IO or MMIO bar hidden by BIOS.
Create a driver to access P2SB for x86 devices.
Signed-off-by: Yong,
From: Andy Shevchenko
There is already one and at least one more user coming which
require an access to Primary to Sideband bridge (P2SB) in order
to get IO or MMIO bar hidden by BIOS.
Create a driver to access P2SB for x86 devices.
Signed-off-by: Yong, Jonathan
Signed-off-by: Andy Shevchenko
Move the enum's definition into a standalone header file which can be used
wherever its definition is needed.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com>
---
Changes in V11:
- No change
Ch
Adding Intel codename Apollo Lake platform device IDs for PCH.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
Acked-for-MFD-by: Lee Jones <lee.jo...@linaro.org>
---
Changes in V11:
- No change
Changes in V10:
- No change
Changes in V9:
- No change
C
This driver uses the P2SB hide/unhide mechanism cooperatively
to pass the PCI BAR address to the gpio platform driver.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com>
---
Changes in V11:
- Remove duplicated
to GPIO.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com>
---
Changes in V11:
- Select CONFIG_P2SB when CONFIG_X86_INTEL_IVI is enabled instead of
CONFIG_LPC_ICH is enabled. This is to fix kbuildbot err
Move the enum's definition into a standalone header file which can be used
wherever its definition is needed.
Signed-off-by: Tan Jui Nee
Reviewed-by: Mika Westerberg
---
Changes in V11:
- No change
Changes in V10:
- No change
Changes in V9:
- No change
Changes in V8
Adding Intel codename Apollo Lake platform device IDs for PCH.
Signed-off-by: Tan Jui Nee
Acked-for-MFD-by: Lee Jones
---
Changes in V11:
- No change
Changes in V10:
- No change
Changes in V9:
- No change
Changes in V8:
- No change
drivers/mfd/lpc_ich_core.c
This driver uses the P2SB hide/unhide mechanism cooperatively
to pass the PCI BAR address to the gpio platform driver.
Signed-off-by: Tan Jui Nee
Reviewed-by: Mika Westerberg
---
Changes in V11:
- Remove duplicated object file lpc_ich-objs in Makefile.
- Put p2sb.h header file
to GPIO.
Signed-off-by: Tan Jui Nee
Reviewed-by: Mika Westerberg
---
Changes in V11:
- Select CONFIG_P2SB when CONFIG_X86_INTEL_IVI is enabled instead of
CONFIG_LPC_ICH is enabled. This is to fix kbuildbot error.
Changes in V10:
- No change
Changes in V9
This patch follows the example of mfd/wm831x to rename the driver
from "lpc_ich" to "lpc_ich_core".
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com>
---
Changes in V11:
- No change
Cha
or all gpio communities
Changes in V2:
- Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL"
to fix kbuildbot error
Andy Shevchenko (1):
drivers/platform/x86/p2sb: New Primary to Sideband bridge support
driver for Intel SOC's
Tan Jui Nee (5):
mfd: lpc
This patch follows the example of mfd/wm831x to rename the driver
from "lpc_ich" to "lpc_ich_core".
Signed-off-by: Tan Jui Nee
Reviewed-by: Mika Westerberg
---
Changes in V11:
- No change
Changes in V10:
- No change
Changes in V9:
- Remove the file
or all gpio communities
Changes in V2:
- Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL"
to fix kbuildbot error
Andy Shevchenko (1):
drivers/platform/x86/p2sb: New Primary to Sideband bridge support
driver for Intel SOC's
Tan Jui Nee (5):
mfd: lpc
to GPIO.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com>
---
Changes in V10:
- No change
Changes in V9:
- No change
Changes in V8:
- No change
arch/x86/Kconfig | 8
1 file changed,
to GPIO.
Signed-off-by: Tan Jui Nee
Reviewed-by: Mika Westerberg
---
Changes in V10:
- No change
Changes in V9:
- No change
Changes in V8:
- No change
arch/x86/Kconfig | 8
1 file changed, 8 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index
From: Andy Shevchenko
There is already one and at least one more user coming which
require an access to Primary to Sideband bridge (P2SB) in order
to get IO or MMIO bar hidden by BIOS.
Create a driver to access P2SB for x86 devices.
Signed-off-by: Yong,
From: Andy Shevchenko
There is already one and at least one more user coming which
require an access to Primary to Sideband bridge (P2SB) in order
to get IO or MMIO bar hidden by BIOS.
Create a driver to access P2SB for x86 devices.
Signed-off-by: Yong, Jonathan
Signed-off-by: Andy Shevchenko
- Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL"
to fix kbuildbot error
Andy Shevchenko (1):
drivers/platform/x86/p2sb: New Primary to Sideband bridge support
driver for Intel SOC's
Tan Jui Nee (5):
mfd: lpc_ich: Rename lpc-ich driver
x86/intel-ivi:
Move the enum's definition into a standalone header file which can be used
wherever its definition is needed.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com>
---
Changes in V10:
- No change
C
This driver uses the P2SB hide/unhide mechanism cooperatively
to pass the PCI BAR address to the gpio platform driver.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com>
---
Changes in V10:
- No change
C
- Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL"
to fix kbuildbot error
Andy Shevchenko (1):
drivers/platform/x86/p2sb: New Primary to Sideband bridge support
driver for Intel SOC's
Tan Jui Nee (5):
mfd: lpc_ich: Rename lpc-ich driver
x86/intel-ivi:
Move the enum's definition into a standalone header file which can be used
wherever its definition is needed.
Signed-off-by: Tan Jui Nee
Reviewed-by: Mika Westerberg
---
Changes in V10:
- No change
Changes in V9:
- No change
Changes in V8:
- No change
drivers/mfd
This driver uses the P2SB hide/unhide mechanism cooperatively
to pass the PCI BAR address to the gpio platform driver.
Signed-off-by: Tan Jui Nee
Reviewed-by: Mika Westerberg
---
Changes in V10:
- No change
Changes in V9:
- No change
Changes in V8:
- Rename source file
This patch follows the example of mfd/wm831x to rename the driver
from "lpc_ich" to "lpc_ich_core".
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
Reviewed-by: Mika Westerberg <mika.westerb...@linux.intel.com>
---
Changes in V10:
- No change
Adding Intel codename Apollo Lake platform device IDs for PCH.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
Acked-for-MFD-by: Lee Jones <lee.jo...@linaro.org>
---
Changes in V10:
- No change
Changes in V9:
- No change
Changes in V8:
- No change
This patch follows the example of mfd/wm831x to rename the driver
from "lpc_ich" to "lpc_ich_core".
Signed-off-by: Tan Jui Nee
Reviewed-by: Mika Westerberg
---
Changes in V10:
- No change
Changes in V9:
- Remove the filename from the header of lpc_ich_core.
Adding Intel codename Apollo Lake platform device IDs for PCH.
Signed-off-by: Tan Jui Nee
Acked-for-MFD-by: Lee Jones
---
Changes in V10:
- No change
Changes in V9:
- No change
Changes in V8:
- No change
drivers/mfd/lpc_ich_core.c | 6 ++
include/linux/mfd
This driver uses the P2SB hide/unhide mechanism cooperatively
to pass the PCI BAR address to the gpio platform driver.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V9:
- No change
Changes in V8:
- Rename source file lpc_ich-apl.c to lpc_ich_apl.c (sug
This driver uses the P2SB hide/unhide mechanism cooperatively
to pass the PCI BAR address to the gpio platform driver.
Signed-off-by: Tan Jui Nee
---
Changes in V9:
- No change
Changes in V8:
- Rename source file lpc_ich-apl.c to lpc_ich_apl.c (suggested by Mika).
Changes in V7
Adding Intel codename Apollo Lake platform device IDs for PCH.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
Acked-for-MFD-by: Lee Jones <lee.jo...@linaro.org>
---
Changes in V9:
- No change
Changes in V8:
- No change
drivers/mfd/lpc_ich_core.c | 6 ++
i
From: Andy Shevchenko
There is already one and at least one more user coming which
require an access to Primary to Sideband bridge (P2SB) in order
to get IO or MMIO bar hidden by BIOS.
Create a driver to access P2SB for x86 devices.
Signed-off-by: Yong,
Adding Intel codename Apollo Lake platform device IDs for PCH.
Signed-off-by: Tan Jui Nee
Acked-for-MFD-by: Lee Jones
---
Changes in V9:
- No change
Changes in V8:
- No change
drivers/mfd/lpc_ich_core.c | 6 ++
include/linux/mfd/lpc_ich.h | 1 +
2 files changed, 7
From: Andy Shevchenko
There is already one and at least one more user coming which
require an access to Primary to Sideband bridge (P2SB) in order
to get IO or MMIO bar hidden by BIOS.
Create a driver to access P2SB for x86 devices.
Signed-off-by: Yong, Jonathan
Signed-off-by: Andy Shevchenko
orm/p2sb: New Primary to Sideband bridge support driver for
Intel SOC's
Tan Jui Nee (5):
mfd: lpc_ich: Rename lpc-ich driver
x86/intel-ivi: Add Intel In-Vehicle Infotainment (IVI) systems used in
cars support
mfd: move enum lpc_chipsets into lpc_ich.h
mfd: lpc_ich: Add Device IDs for Int
This patch follows the example of mfd/wm831x to rename the driver
from "lpc_ich" to "lpc_ich_core".
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V9:
- Remove the filename from the header of lpc_ich_core.c (suggested by
Lee).
Changes in V8:
orm/p2sb: New Primary to Sideband bridge support driver for
Intel SOC's
Tan Jui Nee (5):
mfd: lpc_ich: Rename lpc-ich driver
x86/intel-ivi: Add Intel In-Vehicle Infotainment (IVI) systems used in
cars support
mfd: move enum lpc_chipsets into lpc_ich.h
mfd: lpc_ich: Add Device IDs for Int
This patch follows the example of mfd/wm831x to rename the driver
from "lpc_ich" to "lpc_ich_core".
Signed-off-by: Tan Jui Nee
---
Changes in V9:
- Remove the filename from the header of lpc_ich_core.c (suggested by
Lee).
Changes in V8:
-
Move the enum's definition into a standalone header file which can be used
wherever its definition is needed.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V9:
- No change
Changes in V8:
- No change
drivers/mfd/lpc_ich_core.c
to GPIO.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V9:
- No change
Changes in V8:
- No change
arch/x86/Kconfig | 8
1 file changed, 8 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e2c1dcf..aa8928a 100644
--- a/ar
to GPIO.
Signed-off-by: Tan Jui Nee
---
Changes in V9:
- No change
Changes in V8:
- No change
arch/x86/Kconfig | 8
1 file changed, 8 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e2c1dcf..aa8928a 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86
Move the enum's definition into a standalone header file which can be used
wherever its definition is needed.
Signed-off-by: Tan Jui Nee
---
Changes in V9:
- No change
Changes in V8:
- No change
drivers/mfd/lpc_ich_core.c | 71
Adding Intel codename Apollo Lake platform device IDs for PCH.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V8:
- No change
drivers/mfd/lpc_ich_core.c | 6 ++
include/linux/mfd/lpc_ich.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drive
Adding Intel codename Apollo Lake platform device IDs for PCH.
Signed-off-by: Tan Jui Nee
---
Changes in V8:
- No change
drivers/mfd/lpc_ich_core.c | 6 ++
include/linux/mfd/lpc_ich.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/mfd/lpc_ich_core.c b/drivers/mfd
to GPIO.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V8:
- No change
arch/x86/Kconfig | 8
1 file changed, 8 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e2c1dcf..aa8928a 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@
Move the enum's definition into a standalone header file which can be used
wherever its definition is needed.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V8:
- No change
drivers/mfd/lpc_ich_core.c | 71 -
include
This driver uses the P2SB hide/unhide mechanism cooperatively
to pass the PCI BAR address to the gpio platform driver.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V8:
- Rename source file lpc_ich-apl.c to lpc_ich_apl.c (suggested by Mika).
Changes
to GPIO.
Signed-off-by: Tan Jui Nee
---
Changes in V8:
- No change
arch/x86/Kconfig | 8
1 file changed, 8 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e2c1dcf..aa8928a 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -512,6 +512,14 @@ config
Move the enum's definition into a standalone header file which can be used
wherever its definition is needed.
Signed-off-by: Tan Jui Nee
---
Changes in V8:
- No change
drivers/mfd/lpc_ich_core.c | 71 -
include/linux/mfd/lpc_ich.h | 71
This driver uses the P2SB hide/unhide mechanism cooperatively
to pass the PCI BAR address to the gpio platform driver.
Signed-off-by: Tan Jui Nee
---
Changes in V8:
- Rename source file lpc_ich-apl.c to lpc_ich_apl.c (suggested by Mika).
Changes in V7:
- Add author information
or all gpio communities
Changes in V2:
- Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL"
to fix kbuildbot error
Andy Shevchenko (1):
x86/platform/p2sb: New Primary to Sideband bridge support driver for
Intel SOC's
Tan Jui Nee (5):
mfd: lpc
or all gpio communities
Changes in V2:
- Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL"
to fix kbuildbot error
Andy Shevchenko (1):
x86/platform/p2sb: New Primary to Sideband bridge support driver for
Intel SOC's
Tan Jui Nee (5):
mfd: lpc
From: Andy Shevchenko
There is already one and at least one more user coming which
require an access to Primary to Sideband bridge (P2SB) in order
to get IO or MMIO bar hidden by BIOS.
Create a driver to access P2SB for x86 devices.
Signed-off-by: Yong,
This patch follows the example of mfd/wm831x to rename the driver
from "lpc_ich" to "lpc_ich_core".
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V8:
- Update new file name with lpc_ich_core.c at description of source
file.
- Rewor
From: Andy Shevchenko
There is already one and at least one more user coming which
require an access to Primary to Sideband bridge (P2SB) in order
to get IO or MMIO bar hidden by BIOS.
Create a driver to access P2SB for x86 devices.
Signed-off-by: Yong, Jonathan
Signed-off-by: Andy Shevchenko
This patch follows the example of mfd/wm831x to rename the driver
from "lpc_ich" to "lpc_ich_core".
Signed-off-by: Tan Jui Nee
---
Changes in V8:
- Update new file name with lpc_ich_core.c at description of source
file.
- Rework Makefile with new source fil
> -Original Message-
> From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com]
> Sent: Thursday, September 29, 2016 7:09 PM
> To: Tan, Jui Nee <jui.nee@intel.com>
> Cc: heikki.kroge...@linux.intel.com; andriy.shevche...@linux.intel.com;
> t...@linutro
> -Original Message-
> From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com]
> Sent: Thursday, September 29, 2016 7:09 PM
> To: Tan, Jui Nee
> Cc: heikki.kroge...@linux.intel.com; andriy.shevche...@linux.intel.com;
> t...@linutronix.de; mi...@redhat.com;
> -Original Message-
> From: Lee Jones [mailto:lee.jo...@linaro.org]
> Sent: Friday, September 30, 2016 8:33 AM
> To: Tan, Jui Nee <jui.nee@intel.com>
> Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com;
> andriy.shevche...@linux.intel.com
> -Original Message-
> From: Lee Jones [mailto:lee.jo...@linaro.org]
> Sent: Friday, September 30, 2016 8:33 AM
> To: Tan, Jui Nee
> Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com;
> andriy.shevche...@linux.intel.com; t...@linutronix.de; mi.
> -Original Message-
> From: Lee Jones [mailto:lee.jo...@linaro.org]
> Sent: Friday, September 30, 2016 8:31 AM
> To: Tan, Jui Nee <jui.nee@intel.com>
> Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com;
> andriy.shevche...@linux.intel.com
> -Original Message-
> From: Lee Jones [mailto:lee.jo...@linaro.org]
> Sent: Friday, September 30, 2016 8:31 AM
> To: Tan, Jui Nee
> Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com;
> andriy.shevche...@linux.intel.com; t...@linutronix.de; mi.
This driver uses the P2SB hide/unhide mechanism cooperatively
to pass the PCI BAR address to the gpio platform driver.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V7:
- Add author information and rewrite description of source file
lpc_ich
This patch follows the example of mfd/wm831x to rename the driver
from "lpc_ich" to "lpc_ich-core".
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V7:
- No change
Changes in V6:
- none, just a subject line and commit message chan
From: Andy Shevchenko
There is already one and at least one more user coming which
require an access to Primary to Sideband bridge (P2SB) in order
to get IO or MMIO bar hidden by BIOS.
Create a driver to access P2SB for x86 devices.
Signed-off-by: Yong,
Adding Intel codename Apollo Lake platform device IDs for PCH.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
drivers/mfd/lpc_ich-core.c | 6 ++
include/linux/mfd/lpc_ich.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/mfd/lpc_ich-core.c b/drivers/mfd/lpc_ich-
This driver uses the P2SB hide/unhide mechanism cooperatively
to pass the PCI BAR address to the gpio platform driver.
Signed-off-by: Tan Jui Nee
---
Changes in V7:
- Add author information and rewrite description of source file
lpc_ich-apl.c and lpc_ich_apl.h.
- Sort
This patch follows the example of mfd/wm831x to rename the driver
from "lpc_ich" to "lpc_ich-core".
Signed-off-by: Tan Jui Nee
---
Changes in V7:
- No change
Changes in V6:
- none, just a subject line and commit message change.
drivers/mfd/Makefile
From: Andy Shevchenko
There is already one and at least one more user coming which
require an access to Primary to Sideband bridge (P2SB) in order
to get IO or MMIO bar hidden by BIOS.
Create a driver to access P2SB for x86 devices.
Signed-off-by: Yong, Jonathan
Signed-off-by: Andy Shevchenko
Adding Intel codename Apollo Lake platform device IDs for PCH.
Signed-off-by: Tan Jui Nee
---
drivers/mfd/lpc_ich-core.c | 6 ++
include/linux/mfd/lpc_ich.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/mfd/lpc_ich-core.c b/drivers/mfd/lpc_ich-core.c
index 05ed985..589155c
Move the enum's definition into a standalone header file which can be used
wherever its definition is needed.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
drivers/mfd/lpc_ich-core.c | 71 -
include/linux/mfd/lpc_ich.
Move the enum's definition into a standalone header file which can be used
wherever its definition is needed.
Signed-off-by: Tan Jui Nee
---
drivers/mfd/lpc_ich-core.c | 71 -
include/linux/mfd/lpc_ich.h | 71
to GPIO.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
arch/x86/Kconfig | 8
1 file changed, 8 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index edc0313..ce5a048 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -511,6 +511,14 @@ config X86_IN
to GPIO.
Signed-off-by: Tan Jui Nee
---
arch/x86/Kconfig | 8
1 file changed, 8 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index edc0313..ce5a048 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -511,6 +511,14 @@ config X86_INTEL_CE
This option
use case
- Only call mfd_add_devices() once for all gpio communities
Changes in V2:
- Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL"
to fix kbuildbot error
Andy Shevchenko (1):
x86/platform/p2sb: New Primary to Sideband bridge support dr
use case
- Only call mfd_add_devices() once for all gpio communities
Changes in V2:
- Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL"
to fix kbuildbot error
Andy Shevchenko (1):
x86/platform/p2sb: New Primary to Sideband bridge support dr
> -Original Message-
> From: Lee Jones [mailto:lee.jo...@linaro.org]
> Sent: Tuesday, August 9, 2016 3:16 PM
> To: Tan, Jui Nee <jui.nee@intel.com>
> Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com;
> andriy.shevche...@linux.intel.com;
> -Original Message-
> From: Lee Jones [mailto:lee.jo...@linaro.org]
> Sent: Tuesday, August 9, 2016 3:16 PM
> To: Tan, Jui Nee
> Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com;
> andriy.shevche...@linux.intel.com; t...@linutronix.de;
>
> -Original Message-
> From: Tan, Jui Nee
> Sent: Monday, July 18, 2016 11:35 AM
> To: 'Paul Gortmaker' <paul.gortma...@windriver.com>;
> andriy.shevche...@linux.intel.com
> Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com;
> t...@linutro
> -Original Message-
> From: Tan, Jui Nee
> Sent: Monday, July 18, 2016 11:35 AM
> To: 'Paul Gortmaker' ;
> andriy.shevche...@linux.intel.com
> Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com;
> t...@linutronix.de; mi...@redhat.com; H. Peter A
> -Original Message-
> From: paul.gortma...@gmail.com [mailto:paul.gortma...@gmail.com] On
> Behalf Of Paul Gortmaker
> Sent: Friday, July 15, 2016 8:01 AM
> To: Tan, Jui Nee <jui.nee@intel.com>
> Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.int
> -Original Message-
> From: paul.gortma...@gmail.com [mailto:paul.gortma...@gmail.com] On
> Behalf Of Paul Gortmaker
> Sent: Friday, July 15, 2016 8:01 AM
> To: Tan, Jui Nee
> Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com;
> andriy.shevche.
> -Original Message-
> From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com]
> Sent: Tuesday, June 28, 2016 4:19 PM
> To: Tan, Jui Nee <jui.nee@intel.com>
> Cc: heikki.kroge...@linux.intel.com; andriy.shevche...@linux.intel.com;
> t...@linutronix
> -Original Message-
> From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com]
> Sent: Tuesday, June 28, 2016 4:19 PM
> To: Tan, Jui Nee
> Cc: heikki.kroge...@linux.intel.com; andriy.shevche...@linux.intel.com;
> t...@linutronix.de; mi...@redhat.com;
From: Andy Shevchenko
There is already one and at least one more user coming which
require an access to Primary to Sideband bridge (P2SB) in order
to get IO or MMIO bar hidden by BIOS.
Create a driver to access P2SB for x86 devices.
Signed-off-by: Yong,
From: Andy Shevchenko
There is already one and at least one more user coming which
require an access to Primary to Sideband bridge (P2SB) in order
to get IO or MMIO bar hidden by BIOS.
Create a driver to access P2SB for x86 devices.
Signed-off-by: Yong, Jonathan
Signed-off-by: Andy Shevchenko
This driver uses the P2SB hide/unhide mechanism cooperatively
to pass the PCI BAR address to the gpio platform driver.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V6:
- Rename CONFIG_X86_INTEL_APL to CONFIG_X86_INTEL_IVI so that it
relates to the
This patch follows the example of mfd/wm831x to rename the driver
from "lpc_ich" to "lpc_ich-core".
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
Changes in V6:
- none, just a subject line and commit message change.
drivers/mfd/Makefile
This driver uses the P2SB hide/unhide mechanism cooperatively
to pass the PCI BAR address to the gpio platform driver.
Signed-off-by: Tan Jui Nee
---
Changes in V6:
- Rename CONFIG_X86_INTEL_APL to CONFIG_X86_INTEL_IVI so that it
relates to the actual product, as suggested
This patch follows the example of mfd/wm831x to rename the driver
from "lpc_ich" to "lpc_ich-core".
Signed-off-by: Tan Jui Nee
---
Changes in V6:
- none, just a subject line and commit message change.
drivers/mfd/Makefile | 1 +
drivers/mfd/{
all mfd_add_devices() once for all gpio communities
Changes in V2:
- Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL"
to fix kbuildbot error
Andy Shevchenko (1):
x86/platform/p2sb: New Primary to Sideband bridge support driver for
Intel SOC's
T
all mfd_add_devices() once for all gpio communities
Changes in V2:
- Add new config option CONFIG_X86_INTEL_NON_ACPI and "select PINCTRL"
to fix kbuildbot error
Andy Shevchenko (1):
x86/platform/p2sb: New Primary to Sideband bridge support driver for
Intel SOC's
T
> -Original Message-
> From: Lee Jones [mailto:lee.jo...@linaro.org]
> Sent: Tuesday, June 28, 2016 5:15 PM
> To: Andy Shevchenko <andy.shevche...@gmail.com>
> Cc: Tan, Jui Nee <jui.nee@intel.com>; Mika Westerberg
> <mika.westerb...@linux.intel.com&g
> -Original Message-
> From: Lee Jones [mailto:lee.jo...@linaro.org]
> Sent: Tuesday, June 28, 2016 5:15 PM
> To: Andy Shevchenko
> Cc: Tan, Jui Nee ; Mika Westerberg
> ; Krogerus, Heikki
> ; Andy Shevchenko
> ; Thomas Gleixner
> ; Ingo Molnar ; H. Peter Anv
This patch follows the example of mfd/wm831x and splits it into an
interface independent core since it is growing quite fast with
many table entries.
Signed-off-by: Tan Jui Nee <jui.nee@intel.com>
---
drivers/mfd/Makefile |1 +
drivers/mfd/lpc_ich-core.c
This patch follows the example of mfd/wm831x and splits it into an
interface independent core since it is growing quite fast with
many table entries.
Signed-off-by: Tan Jui Nee
---
drivers/mfd/Makefile |1 +
drivers/mfd/lpc_ich-core.c | 1126
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