From: Lars Povlsen <lars.povl...@microchip.com>
This patch adds support for Luton pinctrl, using the ocelot driver as
basis. It adds pinconfig support as well, as supported by the
platform.
gclement: Split from a larger patch adding support all platforms in
the same time.
Signed-off-by: Lars Povlsen <lars.povl...@microchip.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@bootlin.com>
---
drivers/pinctrl/pinctrl-ocelot.c | 92 ++++++++++++++++++++++++++++++++
1 file changed, 92 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
index a4a1b00f7f0d..ab74c79d7cca 100644
--- a/drivers/pinctrl/pinctrl-ocelot.c
+++ b/drivers/pinctrl/pinctrl-ocelot.c
@@ -158,6 +158,88 @@ struct ocelot_pinctrl {
u8 stride;
};
+#define LUTON_P(p, f0, f1) \
+static struct ocelot_pin_caps luton_pin_##p = {
\
+ .pin = p, \
+ .functions = { \
+ FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_NONE, \
+ }, \
+}
+
+LUTON_P(0, SG0, NONE);
+LUTON_P(1, SG0, NONE);
+LUTON_P(2, SG0, NONE);
+LUTON_P(3, SG0, NONE);
+LUTON_P(4, TACHO, NONE);
+LUTON_P(5, TWI, PHY_LED);
+LUTON_P(6, TWI, PHY_LED);
+LUTON_P(7, NONE, PHY_LED);
+LUTON_P(8, EXT_IRQ, PHY_LED);
+LUTON_P(9, EXT_IRQ, PHY_LED);
+LUTON_P(10, SFP, PHY_LED);
+LUTON_P(11, SFP, PHY_LED);
+LUTON_P(12, SFP, PHY_LED);
+LUTON_P(13, SFP, PHY_LED);
+LUTON_P(14, SI, PHY_LED);
+LUTON_P(15, SI, PHY_LED);
+LUTON_P(16, SI, PHY_LED);
+LUTON_P(17, SFP, PHY_LED);
+LUTON_P(18, SFP, PHY_LED);
+LUTON_P(19, SFP, PHY_LED);
+LUTON_P(20, SFP, PHY_LED);
+LUTON_P(21, SFP, PHY_LED);
+LUTON_P(22, SFP, PHY_LED);
+LUTON_P(23, SFP, PHY_LED);
+LUTON_P(24, SFP, PHY_LED);
+LUTON_P(25, SFP, PHY_LED);
+LUTON_P(26, SFP, PHY_LED);
+LUTON_P(27, SFP, PHY_LED);
+LUTON_P(28, SFP, PHY_LED);
+LUTON_P(29, PWM, NONE);
+LUTON_P(30, UART, NONE);
+LUTON_P(31, UART, NONE);
+
+#define LUTON_PIN(n) { \
+ .number = n, \
+ .name = "GPIO_"#n, \
+ .drv_data = &luton_pin_##n \
+}
+
+static const struct pinctrl_pin_desc luton_pins[] = {
+ LUTON_PIN(0),
+ LUTON_PIN(1),
+ LUTON_PIN(2),
+ LUTON_PIN(3),
+ LUTON_PIN(4),
+ LUTON_PIN(5),
+ LUTON_PIN(6),
+ LUTON_PIN(7),
+ LUTON_PIN(8),
+ LUTON_PIN(9),
+ LUTON_PIN(10),
+ LUTON_PIN(11),
+ LUTON_PIN(12),
+ LUTON_PIN(13),
+ LUTON_PIN(14),
+ LUTON_PIN(15),
+ LUTON_PIN(16),
+ LUTON_PIN(17),
+ LUTON_PIN(18),
+ LUTON_PIN(19),
+ LUTON_PIN(20),
+ LUTON_PIN(21),
+ LUTON_PIN(22),
+ LUTON_PIN(23),
+ LUTON_PIN(24),
+ LUTON_PIN(25),
+ LUTON_PIN(26),
+ LUTON_PIN(27),
+ LUTON_PIN(28),
+ LUTON_PIN(29),
+ LUTON_PIN(30),
+ LUTON_PIN(31),
+};
+
#define OCELOT_P(p, f0, f1, f2)
\
static struct ocelot_pin_caps ocelot_pin_##p = { \
.pin = p, \
@@ -868,6 +950,15 @@ static const struct pinctrl_ops ocelot_pctl_ops = {
.dt_free_map = pinconf_generic_dt_free_map,
};
+static struct pinctrl_desc luton_desc = {
+ .name = "luton-pinctrl",
+ .pins = luton_pins,
+ .npins = ARRAY_SIZE(luton_pins),
+ .pctlops = &ocelot_pctl_ops,
+ .pmxops = &ocelot_pmx_ops,
+ .owner = THIS_MODULE,
+};
+
static struct pinctrl_desc ocelot_desc = {
.name = "ocelot-pinctrl",
.pins = ocelot_pins,
@@ -1151,6 +1242,7 @@ static int ocelot_gpiochip_register(struct
platform_device *pdev,
}
static const struct of_device_id ocelot_pinctrl_of_match[] = {
+ { .compatible = "mscc,luton-pinctrl", .data = &luton_desc },
{ .compatible = "mscc,ocelot-pinctrl", .data = &ocelot_desc },
{ .compatible = "mscc,jaguar2-pinctrl", .data = &jaguar2_desc },
{ .compatible = "microchip,sparx5-pinctrl", .data = &sparx5_desc },
--
2.28.0
