On 4/9/2021 11:45 AM, Peter Zijlstra wrote:
On Fri, Apr 09, 2021 at 09:50:20AM -0400, Liang, Kan wrote:
On 4/9/2021 2:58 AM, Peter Zijlstra wrote:
On Mon, Apr 05, 2021 at 08:10:58AM -0700, kan.li...@linux.intel.com wrote:
@@ -2089,9 +2119,46 @@ static int __init init_hw_perf_events(void)
On Fri, Apr 09, 2021 at 09:50:20AM -0400, Liang, Kan wrote:
>
>
> On 4/9/2021 2:58 AM, Peter Zijlstra wrote:
> > On Mon, Apr 05, 2021 at 08:10:58AM -0700, kan.li...@linux.intel.com wrote:
> > > @@ -2089,9 +2119,46 @@ static int __init init_hw_perf_events(void)
> > > if (err)
> > >
On 4/9/2021 2:58 AM, Peter Zijlstra wrote:
On Mon, Apr 05, 2021 at 08:10:58AM -0700, kan.li...@linux.intel.com wrote:
@@ -2089,9 +2119,46 @@ static int __init init_hw_perf_events(void)
if (err)
goto out1;
- err = perf_pmu_register(, "cpu", PERF_TYPE_RAW);
-
On Mon, Apr 05, 2021 at 08:10:58AM -0700, kan.li...@linux.intel.com wrote:
> @@ -2089,9 +2119,46 @@ static int __init init_hw_perf_events(void)
> if (err)
> goto out1;
>
> - err = perf_pmu_register(, "cpu", PERF_TYPE_RAW);
> - if (err)
> - goto out2;
> +
From: Kan Liang
Different hybrid PMUs have different PMU capabilities and events. Perf
should registers a dedicated PMU for each of them.
To check the X86 event, perf has to go through all possible hybrid pmus.
All the hybrid PMUs are registered at boot time. Before the
registration, add
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