On Tue, Aug 2, 2016 at 12:55 PM, Yinghai Lu wrote:
> On Tue, Aug 2, 2016 at 10:48 AM, Thomas Garnier wrote:
>> On Tue, Aug 2, 2016 at 10:36 AM, Yinghai Lu wrote:
>>>
>>> Looks like we need to change the loop from phys address to
On Tue, Aug 2, 2016 at 12:55 PM, Yinghai Lu wrote:
> On Tue, Aug 2, 2016 at 10:48 AM, Thomas Garnier wrote:
>> On Tue, Aug 2, 2016 at 10:36 AM, Yinghai Lu wrote:
>>>
>>> Looks like we need to change the loop from phys address to virtual
>>> address instead.
>>> to avoid the overflow.
>
>
On Tue, Aug 2, 2016 at 10:48 AM, Thomas Garnier wrote:
> On Tue, Aug 2, 2016 at 10:36 AM, Yinghai Lu wrote:
>>
>> Looks like we need to change the loop from phys address to virtual
>> address instead.
>> to avoid the overflow.
something like attached.
On Tue, Aug 2, 2016 at 10:48 AM, Thomas Garnier wrote:
> On Tue, Aug 2, 2016 at 10:36 AM, Yinghai Lu wrote:
>>
>> Looks like we need to change the loop from phys address to virtual
>> address instead.
>> to avoid the overflow.
something like attached.
---
arch/x86/mm/ident_map.c | 54
On Mon, Aug 1, 2016 at 5:36 PM, Rafael J. Wysocki wrote:
> On Monday, August 01, 2016 10:07:59 AM Thomas Garnier wrote:
>> Correctly setup the temporary mapping for hibernation. Previous
>> implementation assumed the address was aligned on the PGD level. With
>> KASLR memory
On Mon, Aug 1, 2016 at 5:36 PM, Rafael J. Wysocki wrote:
> On Monday, August 01, 2016 10:07:59 AM Thomas Garnier wrote:
>> Correctly setup the temporary mapping for hibernation. Previous
>> implementation assumed the address was aligned on the PGD level. With
>> KASLR memory randomization
On Tue, Aug 2, 2016 at 10:36 AM, Yinghai Lu wrote:
> On Mon, Aug 1, 2016 at 10:07 AM, Thomas Garnier wrote:
>> Correctly setup the temporary mapping for hibernation. Previous
>> implementation assumed the address was aligned on the PGD level. With
>>
On Tue, Aug 2, 2016 at 10:36 AM, Yinghai Lu wrote:
> On Mon, Aug 1, 2016 at 10:07 AM, Thomas Garnier wrote:
>> Correctly setup the temporary mapping for hibernation. Previous
>> implementation assumed the address was aligned on the PGD level. With
>> KASLR memory randomization enabled, the
On Mon, Aug 1, 2016 at 10:07 AM, Thomas Garnier wrote:
> Correctly setup the temporary mapping for hibernation. Previous
> implementation assumed the address was aligned on the PGD level. With
> KASLR memory randomization enabled, the address is randomized on the PUD
> level.
On Mon, Aug 1, 2016 at 10:07 AM, Thomas Garnier wrote:
> Correctly setup the temporary mapping for hibernation. Previous
> implementation assumed the address was aligned on the PGD level. With
> KASLR memory randomization enabled, the address is randomized on the PUD
> level. This change supports
On Monday, August 01, 2016 10:07:59 AM Thomas Garnier wrote:
> Correctly setup the temporary mapping for hibernation. Previous
> implementation assumed the address was aligned on the PGD level. With
> KASLR memory randomization enabled, the address is randomized on the PUD
> level. This change
On Monday, August 01, 2016 10:07:59 AM Thomas Garnier wrote:
> Correctly setup the temporary mapping for hibernation. Previous
> implementation assumed the address was aligned on the PGD level. With
> KASLR memory randomization enabled, the address is randomized on the PUD
> level. This change
Correctly setup the temporary mapping for hibernation. Previous
implementation assumed the address was aligned on the PGD level. With
KASLR memory randomization enabled, the address is randomized on the PUD
level. This change supports unaligned address up to PMD.
Signed-off-by: Thomas Garnier
Correctly setup the temporary mapping for hibernation. Previous
implementation assumed the address was aligned on the PGD level. With
KASLR memory randomization enabled, the address is randomized on the PUD
level. This change supports unaligned address up to PMD.
Signed-off-by: Thomas Garnier
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