Re: [EXT] Re: [PATCH v13 net-next 05/15] net: mvpp2: add PPv23 version definition

2021-02-11 Thread Marcin Wojtas 
czw., 11 lut 2021 o 12:49 Stefan Chulski  napisał(a):
>
> > --
> > On Thu, Feb 11, 2021 at 12:48:52PM +0200, stef...@marvell.com wrote:
> > > From: Stefan Chulski 
> > >
> > > This patch add PPv23 version definition.
> > > PPv23 is new packet processor in CP115.
> > > Everything that supported by PPv22, also supported by PPv23.
> > > No functional changes in this stage.
> > >
> > > Signed-off-by: Stefan Chulski 
> > > Acked-by: Marcin Wojtas 
> >
> > Reviewed-by: Russell King 
> >
> > > @@ -7049,6 +7049,11 @@ static int mvpp2_probe(struct platform_device
> > *pdev)
> > > priv->port_map |= BIT(i);
> > > }
> > >
> > > +   if (priv->hw_version != MVPP21) {
> > > +   if (mvpp2_read(priv, MVPP2_VER_ID_REG) ==
> > MVPP2_VER_PP23)
> > > +   priv->hw_version = MVPP23;
> > > +   }
> > > +
> >
> > The only minor comment I have on this is... the formatting of the above.
> > Wouldn't:
> >
> >   if (priv->hw_version >= MVPP22 &&
> >   mvpp2_read(priv, MVPP2_VER_ID_REG) == MVPP2_VER_PP23)
> >   priv->hw_version = MVPP23;
> >
> > read better?
> >
> > Do we need to even check priv->hw_version here? Isn't this register
> > implemented in PPv2.1 where it contains the value zero?
>
> Yes, we can just:
> if (mvpp2_read(priv, MVPP2_VER_ID_REG) == MVPP2_VER_PP23)
> priv->hw_version = MVPP23;
>
>

I checked the A375 specs and cannot see this particular register. Can
you please double check whether this register is in the old version of
the IP and the Functional Spec is incomplete?

Thanks,
Marcin

RE: [EXT] Re: [PATCH v13 net-next 05/15] net: mvpp2: add PPv23 version definition

2021-02-11 Thread Stefan Chulski 
> --
> On Thu, Feb 11, 2021 at 12:48:52PM +0200, stef...@marvell.com wrote:
> > From: Stefan Chulski 
> >
> > This patch add PPv23 version definition.
> > PPv23 is new packet processor in CP115.
> > Everything that supported by PPv22, also supported by PPv23.
> > No functional changes in this stage.
> >
> > Signed-off-by: Stefan Chulski 
> > Acked-by: Marcin Wojtas 
> 
> Reviewed-by: Russell King 
> 
> > @@ -7049,6 +7049,11 @@ static int mvpp2_probe(struct platform_device
> *pdev)
> > priv->port_map |= BIT(i);
> > }
> >
> > +   if (priv->hw_version != MVPP21) {
> > +   if (mvpp2_read(priv, MVPP2_VER_ID_REG) ==
> MVPP2_VER_PP23)
> > +   priv->hw_version = MVPP23;
> > +   }
> > +
> 
> The only minor comment I have on this is... the formatting of the above.
> Wouldn't:
> 
>   if (priv->hw_version >= MVPP22 &&
>   mvpp2_read(priv, MVPP2_VER_ID_REG) == MVPP2_VER_PP23)
>   priv->hw_version = MVPP23;
> 
> read better?
> 
> Do we need to even check priv->hw_version here? Isn't this register
> implemented in PPv2.1 where it contains the value zero?

Yes, we can just:
if (mvpp2_read(priv, MVPP2_VER_ID_REG) == MVPP2_VER_PP23)
priv->hw_version = MVPP23;

Thanks,
Stefan.

Re: [PATCH v13 net-next 05/15] net: mvpp2: add PPv23 version definition

2021-02-11 Thread Russell King - ARM Linux admin 
On Thu, Feb 11, 2021 at 12:48:52PM +0200, stef...@marvell.com wrote:
> From: Stefan Chulski 
> 
> This patch add PPv23 version definition.
> PPv23 is new packet processor in CP115.
> Everything that supported by PPv22, also supported by PPv23.
> No functional changes in this stage.
> 
> Signed-off-by: Stefan Chulski 
> Acked-by: Marcin Wojtas 

Reviewed-by: Russell King 

> @@ -7049,6 +7049,11 @@ static int mvpp2_probe(struct platform_device *pdev)
>   priv->port_map |= BIT(i);
>   }
>  
> + if (priv->hw_version != MVPP21) {
> + if (mvpp2_read(priv, MVPP2_VER_ID_REG) == MVPP2_VER_PP23)
> + priv->hw_version = MVPP23;
> + }
> +

The only minor comment I have on this is... the formatting of the
above. Wouldn't:

if (priv->hw_version >= MVPP22 &&
mvpp2_read(priv, MVPP2_VER_ID_REG) == MVPP2_VER_PP23)
priv->hw_version = MVPP23;

read better?

Do we need to even check priv->hw_version here? Isn't this register
implemented in PPv2.1 where it contains the value zero?

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!

[PATCH v13 net-next 05/15] net: mvpp2: add PPv23 version definition

2021-02-11 Thread stefanc 
From: Stefan Chulski 

This patch add PPv23 version definition.
PPv23 is new packet processor in CP115.
Everything that supported by PPv22, also supported by PPv23.
No functional changes in this stage.

Signed-off-by: Stefan Chulski 
Acked-by: Marcin Wojtas 
---
 drivers/net/ethernet/marvell/mvpp2/mvpp2.h  | 24 
 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 15 
 2 files changed, 24 insertions(+), 15 deletions(-)

diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h 
b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
index 56e90ab..ce08086 100644
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
@@ -60,6 +60,9 @@
 /* Top Registers */
 #define MVPP2_MH_REG(port) (0x5040 + 4 * (port))
 #define MVPP2_DSA_EXTENDED BIT(5)
+#define MVPP2_VER_ID_REG   0x50b0
+#define MVPP2_VER_PP22 0x10
+#define MVPP2_VER_PP23 0x11
 
 /* Parser Registers */
 #define MVPP2_PRS_INIT_LOOKUP_REG  0x1000
@@ -469,7 +472,7 @@
 #define MVPP22_GMAC_INT_SUM_MASK_LINK_STAT BIT(1)
 #defineMVPP22_GMAC_INT_SUM_MASK_PTPBIT(2)
 
-/* Per-port XGMAC registers. PPv2.2 only, only for GOP port 0,
+/* Per-port XGMAC registers. PPv2.2 and PPv2.3, only for GOP port 0,
  * relative to port->base.
  */
 #define MVPP22_XLG_CTRL0_REG   0x100
@@ -506,7 +509,7 @@
 #define MVPP22_XLG_CTRL4_MACMODSELECT_GMAC BIT(12)
 #define MVPP22_XLG_CTRL4_EN_IDLE_CHECK BIT(14)
 
-/* SMI registers. PPv2.2 only, relative to priv->iface_base. */
+/* SMI registers. PPv2.2 and PPv2.3, relative to priv->iface_base. */
 #define MVPP22_SMI_MISC_CFG_REG0x1204
 #define MVPP22_SMI_POLLING_EN  BIT(10)
 
@@ -582,7 +585,7 @@
 #define MVPP2_QUEUE_NEXT_DESC(q, index) \
(((index) < (q)->last_desc) ? ((index) + 1) : 0)
 
-/* XPCS registers. PPv2.2 only */
+/* XPCS registers.PPv2.2 and PPv2.3 */
 #define MVPP22_MPCS_BASE(port) (0x7000 + (port) * 0x1000)
 #define MVPP22_MPCS_CTRL   0x14
 #define MVPP22_MPCS_CTRL_FWD_ERR_CONN  BIT(10)
@@ -593,7 +596,7 @@
 #define MVPP22_MPCS_CLK_RESET_DIV_RATIO(n) ((n) << 4)
 #define MVPP22_MPCS_CLK_RESET_DIV_SET  BIT(11)
 
-/* XPCS registers. PPv2.2 only */
+/* XPCS registers. PPv2.2 and PPv2.3 */
 #define MVPP22_XPCS_BASE(port) (0x7400 + (port) * 0x1000)
 #define MVPP22_XPCS_CFG0   0x0
 #define MVPP22_XPCS_CFG0_RESET_DIS BIT(0)
@@ -927,15 +930,16 @@ struct mvpp2 {
void __iomem *iface_base;
void __iomem *cm3_base;
 
-   /* On PPv2.2, each "software thread" can access the base
+   /* On PPv2.2 and PPv2.3, each "software thread" can access the base
 * register through a separate address space, each 64 KB apart
 * from each other. Typically, such address spaces will be
 * used per CPU.
 */
void __iomem *swth_base[MVPP2_MAX_THREADS];
 
-   /* On PPv2.2, some port control registers are located into the system
-* controller space. These registers are accessible through a regmap.
+   /* On PPv2.2 and PPv2.3, some port control registers are located into
+* the system controller space. These registers are accessible
+* through a regmap.
 */
struct regmap *sysctrl_base;
 
@@ -977,7 +981,7 @@ struct mvpp2 {
u32 tclk;
 
/* HW version */
-   enum { MVPP21, MVPP22 } hw_version;
+   enum { MVPP21, MVPP22, MVPP23 } hw_version;
 
/* Maximum number of RXQs per port */
unsigned int max_port_rxqs;
@@ -1221,7 +1225,7 @@ struct mvpp21_rx_desc {
__le32 reserved8;
 };
 
-/* HW TX descriptor for PPv2.2 */
+/* HW TX descriptor for PPv2.2 and PPv2.3 */
 struct mvpp22_tx_desc {
__le32 command;
u8  packet_offset;
@@ -1233,7 +1237,7 @@ struct mvpp22_tx_desc {
__le64 buf_cookie_misc;
 };
 
-/* HW RX descriptor for PPv2.2 */
+/* HW RX descriptor for PPv2.2 and PPv2.3 */
 struct mvpp22_rx_desc {
__le32 status;
__le16 reserved1;
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 
b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
index 17cd161..5730900 100644
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
@@ -384,7 +384,7 @@ static int mvpp2_bm_pool_create(struct device *dev, struct 
mvpp2 *priv,
if (!IS_ALIGNED(size, 16))
return -EINVAL;
 
-   /* PPv2.1 needs 8 bytes per buffer pointer, PPv2.2 needs 16
+   /* PPv2.1 needs 8 bytes per buffer pointer, PPv2.2 and PPv2.3 needs 16
 * bytes per buffer pointer
 */
if (priv->hw_version == MVPP21)
@@ -5456,7 +5456,7 @@ static void mvpp2_rx_irqs_setup(struct mvpp2_port *port)
return;
}
 
-   /* Handle