Re: [PATCH v8 0/7] Support RAS virtualization in KVM

2017-11-15 Thread gengdongjiu
Hi James, Thank you very much for your comments and review. On 2017/11/15 0:00, James Morse wrote: > Hi Dongjiu Geng, > > On 10/11/17 19:54, Dongjiu Geng wrote: >> This series patches mainly do below things: >> >> 1. Trap RAS ERR* registers Accesses to EL2 from Non-secure EL1, >>KVM will

Re: [PATCH v8 0/7] Support RAS virtualization in KVM

2017-11-15 Thread gengdongjiu
Hi James, Thank you very much for your comments and review. On 2017/11/15 0:00, James Morse wrote: > Hi Dongjiu Geng, > > On 10/11/17 19:54, Dongjiu Geng wrote: >> This series patches mainly do below things: >> >> 1. Trap RAS ERR* registers Accesses to EL2 from Non-secure EL1, >>KVM will

Re: [PATCH v8 0/7] Support RAS virtualization in KVM

2017-11-14 Thread James Morse
Hi Dongjiu Geng, On 10/11/17 19:54, Dongjiu Geng wrote: > This series patches mainly do below things: > > 1. Trap RAS ERR* registers Accesses to EL2 from Non-secure EL1, >KVM will will do a minimum simulation, there registers are simulated >to RAZ/WI in KVM. > 2. Route synchronous

Re: [PATCH v8 0/7] Support RAS virtualization in KVM

2017-11-14 Thread James Morse
Hi Dongjiu Geng, On 10/11/17 19:54, Dongjiu Geng wrote: > This series patches mainly do below things: > > 1. Trap RAS ERR* registers Accesses to EL2 from Non-secure EL1, >KVM will will do a minimum simulation, there registers are simulated >to RAZ/WI in KVM. > 2. Route synchronous

[PATCH v8 0/7] Support RAS virtualization in KVM

2017-11-10 Thread Dongjiu Geng
This series patches mainly do below things: 1. Trap RAS ERR* registers Accesses to EL2 from Non-secure EL1, KVM will will do a minimum simulation, there registers are simulated to RAZ/WI in KVM. 2. Route synchronous External Abort exceptions from Non-secure EL0 and EL1 to EL2. When

[PATCH v8 0/7] Support RAS virtualization in KVM

2017-11-10 Thread Dongjiu Geng
This series patches mainly do below things: 1. Trap RAS ERR* registers Accesses to EL2 from Non-secure EL1, KVM will will do a minimum simulation, there registers are simulated to RAZ/WI in KVM. 2. Route synchronous External Abort exceptions from Non-secure EL0 and EL1 to EL2. When