This patch adds the bus nodes using VDD_MIF for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data
between DRAM and DMC/ACP/C2C.
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof Kozlowski
[m.reichl and linux.amoon: Tested
This patch adds the bus nodes using VDD_MIF for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data
between DRAM and DMC/ACP/C2C.
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof Kozlowski
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by:
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