Re: [RESEND v2] iommu/vt-d: Use passthrough mode for the Intel IPUs

2021-04-20 Thread Grant Grundler
On Tue, Apr 20, 2021 at 11:02 AM Sakari Ailus wrote: > > Hi Bingbu, > > Thanks for the patch. > > On Tue, Apr 20, 2021 at 10:48:33AM +0800, Bingbu Cao wrote: > > Intel IPU(Image Processing Unit) has its own (IO)MMU hardware, > > The IPU driver allocates its own page table that is not mapped > >

Re: [RESEND v2] iommu/vt-d: Use passthrough mode for the Intel IPUs

2021-04-20 Thread Sakari Ailus
On Tue, Apr 20, 2021 at 05:54:57PM +0300, Andy Shevchenko wrote: > On Tue, Apr 20, 2021 at 05:37:27PM +0300, Sakari Ailus wrote: > > On Tue, Apr 20, 2021 at 02:55:33PM +0300, Andy Shevchenko wrote: > > > On Tue, Apr 20, 2021 at 01:56:40PM +0300, Sakari Ailus wrote: > > > > On Tue, Apr 20, 2021 at

Re: [RESEND v2] iommu/vt-d: Use passthrough mode for the Intel IPUs

2021-04-20 Thread Andy Shevchenko
On Tue, Apr 20, 2021 at 05:37:27PM +0300, Sakari Ailus wrote: > On Tue, Apr 20, 2021 at 02:55:33PM +0300, Andy Shevchenko wrote: > > On Tue, Apr 20, 2021 at 01:56:40PM +0300, Sakari Ailus wrote: > > > On Tue, Apr 20, 2021 at 06:34:26PM +0800, Bingbu Cao wrote: > > > > On 4/20/21 6:20 PM, Andy

Re: [RESEND v2] iommu/vt-d: Use passthrough mode for the Intel IPUs

2021-04-20 Thread Sakari Ailus
On Tue, Apr 20, 2021 at 02:55:33PM +0300, Andy Shevchenko wrote: > On Tue, Apr 20, 2021 at 01:56:40PM +0300, Sakari Ailus wrote: > > On Tue, Apr 20, 2021 at 06:34:26PM +0800, Bingbu Cao wrote: > > > On 4/20/21 6:20 PM, Andy Shevchenko wrote: > > > > On Tue, Apr 20, 2021 at 10:48:33AM +0800, Bingbu

Re: [RESEND v2] iommu/vt-d: Use passthrough mode for the Intel IPUs

2021-04-20 Thread Andy Shevchenko
On Tue, Apr 20, 2021 at 01:56:40PM +0300, Sakari Ailus wrote: > On Tue, Apr 20, 2021 at 06:34:26PM +0800, Bingbu Cao wrote: > > On 4/20/21 6:20 PM, Andy Shevchenko wrote: > > > On Tue, Apr 20, 2021 at 10:48:33AM +0800, Bingbu Cao wrote: ... > > > This misses the changelog from v1 followed by the

Re: [RESEND v2] iommu/vt-d: Use passthrough mode for the Intel IPUs

2021-04-20 Thread Sakari Ailus
Hi Bingbu, Thanks for the patch. On Tue, Apr 20, 2021 at 10:48:33AM +0800, Bingbu Cao wrote: > Intel IPU(Image Processing Unit) has its own (IO)MMU hardware, > The IPU driver allocates its own page table that is not mapped > via the DMA, and thus the Intel IOMMU driver blocks access giving >

Re: [RESEND v2] iommu/vt-d: Use passthrough mode for the Intel IPUs

2021-04-20 Thread Sakari Ailus
Hi Bingbu, On Tue, Apr 20, 2021 at 06:34:26PM +0800, Bingbu Cao wrote: > Andy, > > On 4/20/21 6:20 PM, Andy Shevchenko wrote: > > On Tue, Apr 20, 2021 at 10:48:33AM +0800, Bingbu Cao wrote: > >> Intel IPU(Image Processing Unit) has its own (IO)MMU hardware, > >> The IPU driver allocates its own

Re: [RESEND v2] iommu/vt-d: Use passthrough mode for the Intel IPUs

2021-04-20 Thread Bingbu Cao
Andy, On 4/20/21 6:20 PM, Andy Shevchenko wrote: > On Tue, Apr 20, 2021 at 10:48:33AM +0800, Bingbu Cao wrote: >> Intel IPU(Image Processing Unit) has its own (IO)MMU hardware, >> The IPU driver allocates its own page table that is not mapped >> via the DMA, and thus the Intel IOMMU driver blocks

Re: [RESEND v2] iommu/vt-d: Use passthrough mode for the Intel IPUs

2021-04-20 Thread Andy Shevchenko
On Tue, Apr 20, 2021 at 10:48:33AM +0800, Bingbu Cao wrote: > Intel IPU(Image Processing Unit) has its own (IO)MMU hardware, > The IPU driver allocates its own page table that is not mapped > via the DMA, and thus the Intel IOMMU driver blocks access giving > this error: > > DMAR: DRHD: handling

Re: [RESEND v2] iommu/vt-d: Use passthrough mode for the Intel IPUs

2021-04-20 Thread Andy Shevchenko
On Tue, Apr 20, 2021 at 10:48:33AM +0800, Bingbu Cao wrote: > Intel IPU(Image Processing Unit) has its own (IO)MMU hardware, > The IPU driver allocates its own page table that is not mapped > via the DMA, and thus the Intel IOMMU driver blocks access giving > this error: > > DMAR: DRHD: handling

[RESEND v2] iommu/vt-d: Use passthrough mode for the Intel IPUs

2021-04-19 Thread Bingbu Cao
Intel IPU(Image Processing Unit) has its own (IO)MMU hardware, The IPU driver allocates its own page table that is not mapped via the DMA, and thus the Intel IOMMU driver blocks access giving this error: DMAR: DRHD: handling fault status reg 3 DMAR: [DMA Read] Request device [00:05.0] PASID