[PATCH v5 1/5] dt-bindings: watchdog: Document STM32 IWDG bindings

This adds documentation of device tree bindings for the STM32 IWDG (Independent WatchDoG). Signed-off-by: Yannick Fertre --- .../devicetree/bindings/watchdog/st,stm32-iwdg.txt| 19 +++ 1 file changed, 19 insertions(+) create mode 100644

[PATCH v4 01/12] drm: bridge: analogix: Detach panel when unbinding analogix dp

From: Jeffy Chen The panel is attached when binding analogix dp. Signed-off-by: Jeffy Chen Reviewed-by: Andrzej Hajda Signed-off-by: Your Name --- Changes in v4: None Changes in v3: None Changes in

[PATCH v4 02/12] drm: bridge: analogix: Unregister dp aux when unbinding

From: Jeffy Chen The dp aux is registered when binding analogix dp. Signed-off-by: Jeffy Chen Reviewed-by: Andrzej Hajda Signed-off-by: Your Name --- Changes in v4: None Changes in v3: None Changes

[PATCH v4 03/12] drm: bridge: analogix: Disable clock when unbinding

From: Jeffy Chen The clock is enabled when binding analogix dp. Signed-off-by: Jeffy Chen Signed-off-by: Your Name --- Changes in v4: None Changes in v3: None Changes in v2: None

Re: [PATCH v3 3/9] drm: bridge: analogix: Destroy connector when unbinding

Hi Andrzej, On 04/06/2017 03:19 PM, Andrzej Hajda wrote: On 05.04.2017 10:29, Jeffy Chen wrote: Normally we do this in drm_mode_config_cleanup. But analogix dp's connector is allocated in bind, and freed after unbind. So we need to destroy it in unbind to avoid further access. Signed-off-by:

Re: [RFC PATCH] kernel: sched: Provide a pointer to the valid CPU mask

On Thu, Apr 06, 2017 at 01:56:12PM +0200, Thomas Gleixner wrote: > A pointer to the effective mask is definitely enough. And that's what we > need for migrate_disable() as well. That still leaves the storage > requirement to MIPS. So then you're back to Ingo's proposal, right?

[PATCH v6 5/8] coresight: use const for device_node structures

Almost low level functions from open firmware have used const to qualify device_node structures, so add const for device_node parameters in of_coresight related functions. Reviewed-by: Stephen Boyd Signed-off-by: Leo Yan ---

[PATCH v6 6/8] coresight: add support for CPU debug module

Coresight includes debug module and usually the module connects with CPU debug logic. ARMv8 architecture reference manual (ARM DDI 0487A.k) has description for related info in "Part H: External Debug". Chapter H7 "The Sample-based Profiling Extension" introduces several sampling registers, e.g.

[PATCH v6 8/8] arm64: dts: qcom: msm8916: Add debug unit

Add debug unit on Qualcomm msm8916 based platforms, including the DragonBoard 410c board. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 32 1 file changed, 32 insertions(+) diff --git

Re: [Patch v4 12/12] Documention: v4l: Documentation for HEVC CIDs

On 04/06/2017 08:11 AM, Smitha T Murthy wrote: > Added V4l2 controls for HEVC encoder > > Signed-off-by: Smitha T Murthy General comment: don't forget to build the pdf and check that as well. > --- > Documentation/media/uapi/v4l/extended-controls.rst | 391 >

Re: [PATCH 2/4] net: dsa: add new DSA switch driver for the SMSC-LAN9303

Hi Andrew, On Thursday 06 April 2017 13:59:00 Andrew Lunn wrote: > [...] > > > Does the MDIO bus go to the outside world? Could there be external > > > PHYs? > > > > This device includes two phys (at port 1 and 2) and these > > functions are called to detect their state. > > Some switches

[PATCH 6/6] apparmor: Make path_max parameter readonly

The path_max parameter determines the max size of buffers allocated but it should not be setable at run time. If can be used to cause an oops root@ubuntu:~# echo 16777216 > /sys/module/apparmor/parameters/path_max root@ubuntu:~# cat /sys/module/apparmor/parameters/path_max Killed [ 122.141911]

[PATCH 1/1] gpio: core: Decouple open drain/source flag with active low/high

Currently, the GPIO interface is said to Open Drain if it is Single Ended and active LOW. Similarly, it is said as Open Source if it is Single Ended and active HIGH. The active HIGH/LOW is used in the interface for setting the pin state to HIGH or LOW when enabling/disabling the interface. In

Re: [HMM 01/16] mm/memory/hotplug: add memory type parameter to arch_add/remove_memory

> > diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c > > index 5f84433..0933261 100644 > > --- a/arch/powerpc/mm/mem.c > > +++ b/arch/powerpc/mm/mem.c > > @@ -126,14 +126,31 @@ int __weak remove_section_mapping(unsigned long > > start, unsigned long end) > > return -ENODEV; > > } >

Re: [PATCH 4.4 42/76] mmc: sdhci: Do not disable interrupts while waiting for clock

On Thu, 2017-04-06 at 14:12 +0200, Ludovic Desroches wrote: > On Tue, Apr 04, 2017 at 05:50:50PM +0100, Ben Hutchings wrote: > > On Tue, 2017-03-28 at 14:30 +0200, Greg Kroah-Hartman wrote: > > > 4.4-stable review patch. If anyone has any objections, please let me > > > know. > > > > > >

[PATCH] x86/mpx, selftests: Only check bounds-vs-shadow when we keep shadow

From: Joerg Roedel The check between the hardware state and our shadow of it is checked in the signal handler for all bounds exceptions, even for the ones where we don't keep the shadow up2date. This is a problem because when no shadow is kept the handler fails at this point and

Re: [PATCH] arm64: xen: Implement EFI reset_system callback

On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote: > Hi Juergen, > > On 06/04/17 07:23, Juergen Gross wrote: > >On 05/04/17 21:49, Boris Ostrovsky wrote: > >>On 04/05/2017 02:14 PM, Julien Grall wrote: > >>>The x86 code has theoritically a similar issue, altought EFI does not > >>>seem

Re: [PATCH v3 0/2] switch to atomic PWM

On Wed, Mar 22, 2017 at 03:29:33PM +0200, Claudiu Beznea wrote: > Changes in v3: > - since v2 introduced per-IP register layout there is no need > to keep update_cdty and set_cprd_cdty members in atmel_pwm_data > data structure used in v2; doing in this way the atmel_pwm_data > data structure will

Re: [PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

On Thu, 2017-04-06 at 16:20 +0200, Hans Verkuil wrote: > On 04/06/2017 03:55 PM, Philipp Zabel wrote: > > If the the field order is set to ANY in set_fmt, choose the currently > > set field order. If the colorspace is set to DEFAULT, choose the current > > colorspace. If any of xfer_func,

[PATCH v5 2/5] drivers: watchdog: Add STM32 IWDG driver

This patch adds IWDG (Independent WatchDoG) support for STM32 platform. Signed-off-by: Yannick FERTRE --- drivers/watchdog/Kconfig | 12 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/stm32_iwdg.c | 253 ++ 3 files

[PATCH v5 0/5] STM32 Independent watchdog

Version 5: - Update bindings (add field timeout-sec) - Update driver (rework start, rework settings & remove max_timeout) Version 4: - Update bindings (iwdg > watchdog) - Update typo - Update commit header - remove gerrit tags - Update driver (remove unnecessary tests) a add watchdog_init_timeout

[PATCH v5 4/5] ARM: dts: stm32: Add watchdog support for STM32F429 eval board

This patch adds watchdog support for STM32x9I-Eval board. Signed-off-by: Yannick Fertre --- arch/arm/boot/dts/stm32429i-eval.dts | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/stm32429i-eval.dts b/arch/arm/boot/dts/stm32429i-eval.dts index

[PATCH v5 5/5] ARM: configs: stm32: Add watchdog support in STM32 defconfig

This patch adds STM32 watchdog support in stm32_defconfig file Signed-off-by: Yannick Fertre --- arch/arm/configs/stm32_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig index 29ac5a4..1fb901c

[PATCH v5 00/12] drm: rockchip: Fix rockchip drm unbind crash error

Verified on rk3399 chromebook kevin: 1/ stop ui && pkill -9 frecon 2/ unbind/bind drm Changes in v5: Fix wrong git account. Changes in v4: Address Andrzej Hajda 's comments. Changes in v3: Update commit message. Address Sean Paul 's comments. Update

[PATCH v5 03/12] drm: bridge: analogix: Disable clock when unbinding

The clock is enabled when binding analogix dp. Signed-off-by: Jeffy Chen --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH v5 01/12] drm: bridge: analogix: Detach panel when unbinding analogix dp

The panel is attached when binding analogix dp. Signed-off-by: Jeffy Chen Reviewed-by: Andrzej Hajda --- Changes in v5: Fix wrong git account. Changes in v4: None Changes in v3: None Changes in v2: Fix some commit messages.

[PATCH v5 02/12] drm: bridge: analogix: Unregister dp aux when unbinding

The dp aux is registered when binding analogix dp. Signed-off-by: Jeffy Chen Reviewed-by: Andrzej Hajda --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 1 +

Re: [PATCH 5/6] mm, memory_hotplug: do not associate hotadded memory to zones until online

On Thu 30-03-17 13:54:53, Michal Hocko wrote: [...] > +static struct zone * __meminit move_pfn_range(int online_type, int nid, > + unsigned long start_pfn, unsigned long nr_pages) > +{ > + struct pglist_data *pgdat = NODE_DATA(nid); > + struct zone *zone =

Re: [v2, 2/3] powerpc/powernv: Add sanity checks to pnv_pci_get_{gpu|npu}_dev

On Mon, 2017-04-03 at 09:51:43 UTC, Alistair Popple wrote: > The pnv_pci_get_{gpu|npu}_dev functions are used to find associations > between nvlink PCIe devices and standard PCIe devices. However they > lacked basic sanity checking which results in NULL pointer > dereferencing if they are

Re: [v2, 3/3] powerpc/powernv: Introduce address translation services for Nvlink2

On Mon, 2017-04-03 at 09:51:44 UTC, Alistair Popple wrote: > Nvlink2 supports address translation services (ATS) allowing devices > to request address translations from an mmu known as the nest MMU > which is setup to walk the CPU page tables. > > To access this functionality certain firmware

Re: powerpc/prom: Increase RMA size to 512MB

On Thu, 2017-03-30 at 04:03:49 UTC, Sukadev Bhattiprolu wrote: > >From 3ae8d1ed31b01b92b172fe20e4560cfbfab135ec Mon Sep 17 00:00:00 2001 > From: root > Date: Mon, 27 Mar 2017 19:43:14 -0400 > Subject: [PATCH] powerpc/prom: Increase RMA size to 512MB > >

[PATCH for-4.9 1/7] MIPS: Introduce irq_stack

From: Matt Redfearn Allocate a per-cpu irq stack for use within interrupt handlers. Also add a utility function on_irq_stack to determine if a given stack pointer is within the irq stack for that cpu. Signed-off-by: Matt Redfearn Acked-by:

[PATCH for-4.9 4/7] MIPS: Switch to the irq_stack in interrupts

From: Matt Redfearn When enterring interrupt context via handle_int or except_vec_vi, switch to the irq_stack of the current CPU if it is not already in use. The current stack pointer is masked with the thread size and compared to the base or the irq stack. If it does

[PATCH for-4.9 5/7] MIPS: Select HAVE_IRQ_EXIT_ON_IRQ_STACK

From: Matt Redfearn Since do_IRQ is now invoked on a separate IRQ stack, we select HAVE_IRQ_EXIT_ON_IRQ_STACK so that softirq's may be invoked directly from irq_exit(), rather than requiring do_softirq_own_stack. Signed-off-by: Matt Redfearn

[PATCH for-4.9 2/7] MIPS: Stack unwinding while on IRQ stack

From: Matt Redfearn Within unwind stack, check if the stack pointer being unwound is within the CPU's irq_stack and if so use that page rather than the task's stack page. Signed-off-by: Matt Redfearn Acked-by: Jason A. Donenfeld

[PATCH for-4.9 3/7] MIPS: Only change $28 to thread_info if coming from user mode

From: Matt Redfearn The SAVE_SOME macro is used to save the execution context on all exceptions. If an exception occurs while executing user code, the stack is switched to the kernel's stack for the current task, and register $28 is switched to point to the

Re: [patch for-4.11] mm, thp: fix setting of defer+madvise thp defrag mode

On Wed 05-04-17 18:17:42, David Rientjes wrote: > Setting thp defrag mode of "defer+madvise" actually sets "defer" in the > kernel due to the name similarity and the out-of-order way the string is > checked in defrag_store(). > > Check the string in the correct order so that >

Re: [PATCH -mm -v2] mm, swap: Use kvzalloc to allocate some swap data structure

On Wed, Apr 05, 2017 at 03:10:58PM +0800, Huang, Ying wrote: > In general, kmalloc() will have less memory fragmentation than > vmalloc(). From Dave Hansen: For example, we have a two-page data > structure. vmalloc() takes two effectively random order-0 pages, > probably from two different 2M

Re: [PATCH V10 06/12] of: device: Fix overflow of coherent_dma_mask

On Thu, Apr 6, 2017 at 5:24 AM, Robin Murphy wrote: > On 06/04/17 08:01, Frank Rowand wrote: >> On 04/04/17 03:18, Sricharan R wrote: >>> Size of the dma-range is calculated as coherent_dma_mask + 1 >>> and passed to arch_setup_dma_ops further. It overflows when >>> the

Re: [PATCH] x86, kvm: Handle PFNs outside of kernel reach when touching GPTEs

2017-04-05 15:07+0200, Filippo Sironi: > cmpxchg_gpte() calls get_user_pages_fast() to retrieve the number of > pages and the respective struct pages for mapping in the kernel virtual > address space. > This doesn't work if get_user_pages_fast() is invoked with a userspace > virtual address that's

[PATCH] staging: android: ashmem: lseek failed due to no FMODE_LSEEK.

From: zhangshuxiao vfs_llseek will check whether the file mode has FMODE_LSEEK, no return failure. But ashmem can be lseek, so add FMODE_LSEEK to ashmem file. Signed-off-by: Shuxiao Zhang Tested-by: Greg Hackmann ---

Re: [Patch v4 12/12] Documention: v4l: Documentation for HEVC CIDs

On 04/06/2017 08:11 AM, Smitha T Murthy wrote: Added V4l2 controls for HEVC encoder s/HEVC/H.265/HEVC ? Signed-off-by: Smitha T Murthy --- Documentation/media/uapi/v4l/extended-controls.rst | 391 + 1 file changed, 391 insertions(+) diff --git

Your long awaited part payment of $2.5.000.00Usd

Attention: Beneficiary, Your long awaited part payment of $2,500,000.00 Usd (TWO MILLION FIVE Hundred Thousand United State Dollars) is ready for immediate release to you, and it was electronically credited into an ATM Visa Card for easy delivery. Your new Payment Reference No.- 6363836,

[PATCH -mm 0/5] fault-inject: improve fail-nth interface

This series tries to improve fail-nth interface which was added to -mm tree recently. Akinobu Mita (5): fault-inject: automatically detect the number base for fail-nth write interface fault-inject: parse as natural 1-based value for fail-nth write interface fault-inject: make

[PATCH v4 11/12] drm/rockchip: Shutdown all crtcs when unbinding drm

From: Jeffy Chen Signed-off-by: Jeffy Chen Signed-off-by: Your Name --- Changes in v4: None Changes in v3: Address Daniel Vetter 's comments. Update commit message. Changes in v2: None

[PATCH v4 07/12] drm/rockchip: vop: Enable pm domain before vop_initial

From: Jeffy Chen We're trying to access vop registers here, so need to make sure the pm domain is on. Normally it should be enabled by the bootloader, but there's no guarantee of it. And if we wanna do unbind/bind, it would also cause the device to hang. And this

[PATCH v4 12/12] drm/drm_ioctl.c: Break ioctl when drm device not registered

From: Jeffy Chen After unbinding drm, the user space may still owns the drm dev fd, and may still be able to call drm ioctl. Add a sanity check here to prevent that from happening. Signed-off-by: Jeffy Chen Signed-off-by: Your Name

Re: [PATCH v2 02/22] asm-generic/io.h: add ioremap_nopost remap interface

On Thu, Apr 06, 2017 at 01:11:57PM +0100, Russell King - ARM Linux wrote: > On Thu, Apr 06, 2017 at 12:53:12PM +0200, Luis R. Rodriguez wrote: > > On Thu, Apr 06, 2017 at 11:26:36AM +0100, Lorenzo Pieralisi wrote: > > > Indeed, the static inline ioremap_nocache() fallback does not work > > > on

[PATCH v4 10/12] drm/rockchip: Reoder drm bind/unbind sequence

From: Jeffy Chen Current drm bind/unbind sequence would cause some memory issues. For example we should not cleanup iommu before cleanup mode config. Reorder bind/unbind sequence, follow exynos drm. Signed-off-by: Jeffy Chen Signed-off-by:

Re: [PATCH v4 2/5] drivers: watchdog: Add STM32 IWDG driver

Hi Guenter, thanks for your help. Best regards On 04/02/2017 01:48 PM, Guenter Roeck wrote: > On 03/30/2017 08:15 AM, Yannick Fertre wrote: >> This patch adds IWDG (Independent WatchDoG) support for STM32 platform. >> >> Signed-off-by: Yannick FERTRE >> --- >>

Re: [PATCH] ubifs: Fix O_TMPFILE corner case in ubifs_link()

Am 06.04.2017 um 14:09 schrieb Richard Weinberger: >> Were you able to make any progress? still working on this? >> If this is too complicated to get in for this cycle, better send a patch >> to disable O_TMPFILE support for ubifs and fix the problem properly on >> followup merge cycle. >> Because

Re: [PATCH v3 8/9] drm/rockchip: gem: Don't alloc/free gem buf when dev_private is invalid

On Thu, Apr 06, 2017 at 10:47:59AM +0800, jeffy wrote: > Hi Sean, > > On 04/06/2017 12:28 AM, Sean Paul wrote: > > On Wed, Apr 05, 2017 at 04:29:26PM +0800, Jeffy Chen wrote: > > > After unbinding drm, the userspace may still has a chance to access > > > gem buf. > > > > > > Add a sanity check

Re: [PATCH 20/24] bpf: Restrict kernel image access functions when the kernel is locked down

On 6 April 2017 at 13:29, Alexei Starovoitov wrote: > On Wed, Apr 05, 2017 at 09:17:25PM +0100, David Howells wrote: >> From: Chun-Yi Lee >> >> There are some bpf functions can be used to read kernel memory: >> bpf_probe_read, bpf_probe_write_user and

Re: [PATCH 0/6] mm: make movable onlining suck less

OK, so after recent change mostly driven by testing from Reza Arbab (thanks again) I believe I am getting to a working state finally. All I currently have is in git://git.kernel.org/pub/scm/linux/kernel/git/mhocko/mm.git tree attempts/rewrite-mem_hotplug-WIP branch. I will highly appreciate more

Re: [PATCH 1/4] net: dsa: add support for the SMSC-LAN9303 tagging format

Hi Andrew, On Wednesday 05 April 2017 19:10:01 Andrew Lunn wrote: > [...] > > +static int lan9303_rcv(struct sk_buff *skb, struct net_device *dev, > > + struct packet_type *pt, struct net_device *orig_dev) > > +{ > > + u16 *lan9303_tag; > > + struct dsa_switch_tree *dst =

Re: [PATCH] sched: Fix numabalancing to work with isolated cpus

On Thu 06-04-17 12:47:57, Peter Zijlstra wrote: > On Thu, Apr 06, 2017 at 12:42:04PM +0200, Michal Hocko wrote: > > > Is this something dictated by usecases which rely on isolcpus or rather > > nobody bothered to implement one scheduling domain? > > Its from the original use-case I suspect. It

Re: [PATCH 3/4] net: dsa: LAN9303: add I2C managed mode support

On 04/06/2017 06:46 AM, Juergen Borleis wrote: >>> + phy-reset-gpios = < 6 GPIO_ACTIVE_LOW>; >>> + phy-reset-duration = <200>; >>> + >>> + dsa,member = <0 0>; >>> + >>> + ports { >>> + #address-cells = <1>; >>> +

Re: [PATCH] of: change fixup of dma-ranges size to error

On Thu, Apr 6, 2017 at 1:18 AM, wrote: > From: Frank Rowand > > of_dma_get_range() has workaround code to fixup a device tree that > incorrectly specified a mask instead of a size for property > dma-ranges. That device tree was fixed a year ago in

Re: [PATCH 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

On 06/04/17 14:19, Laxman Dewangan wrote: > > On Thursday 06 April 2017 06:33 PM, Thierry Reding wrote: >> * PGP Signed by an unknown key >> >> On Thu, Apr 06, 2017 at 09:57:09AM +0100, Jon Hunter wrote: >>> On 05/04/17 15:13, Laxman Dewangan wrote: +state of the system. The configuration

Re: [RFC 00/10] V4L2 explicit synchronization support

Hello Gustavo, On 04/06/2017 10:08 AM, Gustavo Padovan wrote: > Hi Javier, > > 2017-04-05 Javier Martinez Canillas : > >> Hello Gustavo, >> >> On 04/05/2017 11:09 AM, Gustavo Padovan wrote: >>> 2017-04-03 Javier Martinez Canillas : >>> Hello

Re: [PATCH] tick/nohz: Fix wrong user and system time accouting against vtime sampling

On Wed, 2017-04-05 at 23:36 -0700, Wanpeng Li wrote: > This patch offsets the tick to avert all ticks alignment in order  > that the vtime sampling does not end up "in phase" with the jiffies  > incrementing. > > Reported-by: Luiz Capitulino > Suggested-by: Rik van Riel

Re: [PATCH v4] tools/perf: Allow user probes on versioned symbols

Em Wed, Apr 05, 2017 at 10:30:03PM -0500, Paul Clarke escreveu: > Symbol versioning, as in glibc, results in symbols being defined as: > @[@] > (Note that "@@" identifies a default symbol, if the symbol name > is repeated.) > > perf is currently unable to deal with this, and is unable to create >

[PATCH V2 2/4] pwm: tegra: Increase precision in pwm rate calculation

The rate of the PWM calculated as follows: hz = NSEC_PER_SEC / period_ns; rate = (rate + (hz / 2)) / hz; This has the precision loss in lower PWM rate. Changing this to have more precision as: hz = DIV_ROUND_CLOSE(NSEC_PER_SEC * 100, period_ns); rate =

[PATCH V2 0/4] pwm: tegra: Pin configuration in suspend/resume and cleanups

This patch series have following fixes: - Add more precession in PWM period register value calculation for lower pwm frequency. - Add support to configure PWM pins in different state in the suspend/resume. Changes from v1: - Use standard pinctrl names for sleep and active state. - Use API

Re: [PATCH -v6 08/13] futex: Pull rt_mutex_futex_unlock() out from under hb->lock

On Wed, Apr 05, 2017 at 04:52:25PM -0700, Darren Hart wrote: > On Wed, Mar 22, 2017 at 11:35:55AM +0100, Peter Zijlstra wrote: > > There's a number of 'interesting' problems, all caused by holding > > hb->lock while doing the rt_mutex_unlock() equivalient. > > > > Notably: > > > > - a PI

Re: [PATCH v3 8/9] drm/rockchip: gem: Don't alloc/free gem buf when dev_private is invalid

Hi Sean, On 04/06/2017 08:26 PM, Sean Paul wrote: On Thu, Apr 06, 2017 at 10:47:59AM +0800, jeffy wrote: Hi Sean, On 04/06/2017 12:28 AM, Sean Paul wrote: On Wed, Apr 05, 2017 at 04:29:26PM +0800, Jeffy Chen wrote: After unbinding drm, the userspace may still has a chance to access gem buf.

Re: [PATCH 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

On Thu, Apr 06, 2017 at 09:57:09AM +0100, Jon Hunter wrote: > > On 05/04/17 15:13, Laxman Dewangan wrote: > > In some of NVIDIA Tegra's platform, PWM controller is used to > > control the PWM controlled regulators. PWM signal is connected to > > the VID pin of the regulator where duty cycle of

Re: [Patch v4 10/12] [media] v4l2: Add v4l2 control IDs for HEVC encoder

On 04/06/2017 08:11 AM, Smitha T Murthy wrote: > @@ -775,6 +832,47 @@ const char *v4l2_ctrl_get_name(u32 id) > case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP:return "VPX > P-Frame QP Value"; > case V4L2_CID_MPEG_VIDEO_VPX_PROFILE: return "VPX > Profile"; >

Re: tty crash in tty_ldisc_receive_buf()

On Thu, Apr 6, 2017 at 2:04 AM, Michael Neuling wrote: > Hi all, > > We are seeing the following crash (in linux-next but has been around since at > least v4.10). > > [ 417.514499] Unable to handle kernel paging request for data at address > 0x2260 > [ 417.515361]

Re: [PATCH v5 7/9] clk: hi6220: add debug APB clock

On Tue, Apr 04, 2017 at 02:51:09PM -0700, Stephen Boyd wrote: > On 03/26, Leo Yan wrote: > > The debug APB clock is absent in hi6220 driver, so this patch is to add > > support for it. > > > > Signed-off-by: Leo Yan > > --- > > Applied to clk-next. Thanks a lot :) > I

[PATCH 1/8] x86/boot/64: Rewrite startup_64 in C

The patch write most of startup_64 logic in C. This is preparation for 5-level paging enabling. Signed-off-by: Kirill A. Shutemov --- arch/x86/kernel/head64.c | 81 - arch/x86/kernel/head_64.S | 93

[PATCH 8/8] x86/mm: Allow to have userspace mappings above 47-bits

On x86, 5-level paging enables 56-bit userspace virtual address space. Not all user space is ready to handle wide addresses. It's known that at least some JIT compilers use higher bits in pointers to encode their information. It collides with valid pointers with 5-level paging and leads to

[PATCH 3/8] x86/boot/64: Add support of additional page table level during early boot

This patch adds support for 5-level paging during early boot. It generalizes boot for 4- and 5-level paging on 64-bit systems with compile-time switch between them. Signed-off-by: Kirill A. Shutemov --- arch/x86/boot/compressed/head_64.S | 23

[PATCH 0/8] x86: 5-level paging enabling for v4.12, Part 4

Here's the fourth and the last bunch of of patches that brings initial 5-level paging enabling. Please review and consider applying. As Ingo requested I've tried to rewrite assembly parts of boot process into C before bringing 5-level paging support. The only part where I succeed is startup_64

[PATCH 4/8] x86/mm: Add sync_global_pgds() for configuration with 5-level paging

This basically restores slightly modified version of original sync_global_pgds() which we had before folded p4d was introduced. The only modification is protection against 'address' overflow. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/init_64.c | 35

Re: [PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

On 04/06/2017 03:55 PM, Philipp Zabel wrote: > If the the field order is set to ANY in set_fmt, choose the currently > set field order. If the colorspace is set to DEFAULT, choose the current > colorspace. If any of xfer_func, ycbcr_enc or quantization are set to > DEFAULT, either choose the

[PATCH] x86/mpx: Correctly report do_mpx_bt_fault() failures to user-space

From: Joerg Roedel When this function fails it just sends a SIGSEGV signal to user-space using force_sig(). This signal is missing essential information about the cause, e.g. the trap_nr or an error code. Fix this by propagating the error to the only caller of

Re: [PATCH] arm64: xen: Implement EFI reset_system callback

On 04/06/2017 10:32 AM, Julien Grall wrote: > Hi Daniel, > > On 06/04/17 15:27, Daniel Kiper wrote: >> On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote: >>> Hi Juergen, >>> >>> On 06/04/17 07:23, Juergen Gross wrote: On 05/04/17 21:49, Boris Ostrovsky wrote: > On 04/05/2017

Re: [PATCH v1 1/5] perf/core: Define the common branch type classification

On 4/6/2017 5:25 PM, Peter Zijlstra wrote: On Thu, Apr 06, 2017 at 04:21:06PM +0800, Jin, Yao wrote: Hi, otherwise we have to maintain 2 branch type copies between kernel and user-space. For example, currently X86_BR_* are defined in lbr.c. To display the branch type in user-space, the

Re: [PATCH] vfio/type1: Remove locked page accounting workqueue

On Thu, 6 Apr 2017 10:23:59 +0200 Auger Eric wrote: > Hi Alex, > > On 03/04/2017 22:02, Alex Williamson wrote: > > If the mmap_sem is contented then the vfio type1 IOMMU backend will > > defer locked page accounting updates to a workqueue task. This has > > a few

Re: [PATCH] mm: vmscan: fix IO/refault regression in cache workingset transition

On Wed, Apr 05, 2017 at 06:11:04PM -0400, Rik van Riel wrote: > On Tue, 2017-04-04 at 18:00 -0400, Johannes Weiner wrote: > > > + > > + /* > > +  * When refaults are being observed, it means a new > > workingset > > +  * is being established. Disable active list protection to > > get > > +

Re: [PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

On Thu, 2017-04-06 at 15:05 +0100, Russell King - ARM Linux wrote: > On Thu, Apr 06, 2017 at 03:55:29PM +0200, Philipp Zabel wrote: > > + > > + /* Retain current field setting as default */ > > + if (sdformat->format.field == V4L2_FIELD_ANY) > > + sdformat->format.field = fmt->field;

[PATCH v2] kernel: drm/vmwgfx: limit the number of mip levels in vmw_gb_surface_define_ioctl()

The 'req->mip_levels' parameter in vmw_gb_surface_define_ioctl() is a user-controlled 'uint32_t' value which is used as a loop count limit. This can lead to a kernel lockup and DoS. Add check for 'req->mip_levels'. References: https://bugzilla.redhat.com/show_bug.cgi?id=1437431 Signed-off-by:

[PATCH v5 12/12] drm/drm_ioctl.c: Break ioctl when drm device not registered

After unbinding drm, the user space may still owns the drm dev fd, and may still be able to call drm ioctl. Add a sanity check here to prevent that from happening. Signed-off-by: Jeffy Chen --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in

[PATCH v5 09/12] drm/rockchip: analogix_dp: Disable clock when unbinding

The clock is enabled when binding cdn dp. Signed-off-by: Jeffy Chen --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff

[PATCH v5 05/12] drm/rockchip: cdn-dp: Don't try to release firmware when not loaded

Signed-off-by: Jeffy Chen --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/gpu/drm/rockchip/cdn-dp-core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c

[PATCH][-next] nfp: don't dereference a null nn->eth_port to print a warning

From: Colin Ian King On the case where nn->eth_port is null the warning message is printing the port by dereferencing this null pointer. Remove the deference to avoid a crash when printing the warning message. Detected by CoverityScan, CID#1426198 ("Dereference after

Re: [PATCH 1/5] efi: Move the x86 secure boot switch to generic code

Sorry, I forgot to include a cover note. These five patches would replace 1-3 & 6 from my Kernel Lockdown series. The additional patch moves the secure boot switch from x86 to generic code. David

Re: [PATCH] ebpf: verify the output of the JIT

On Tue, Apr 04, 2017 at 09:45:36PM -0600, Tycho Andersen wrote: > Hi Kees, > > On Tue, Apr 04, 2017 at 03:17:57PM -0700, Kees Cook wrote: > > On Tue, Apr 4, 2017 at 3:08 PM, Tycho Andersen wrote: > > > The goal of this patch is to protect the JIT against an attacker with a > >

Re: [PATCH v2 02/22] asm-generic/io.h: add ioremap_nopost remap interface

On Thu, Apr 06, 2017 at 01:59:07PM +0200, Luis R. Rodriguez wrote: > On Thu, Apr 06, 2017 at 12:38:45PM +0100, Lorenzo Pieralisi wrote: > > Ok but where ? linux/io.h or asm-generic/io.h ? As I replied to Russell, > > having it in linux/io.h is a bit odd given that it would be the only > >

[PATCH v6 4/8] coresight: refactor with function of_coresight_get_cpu

This is refactor to add function of_coresight_get_cpu(), so it's used to retrieve CPU id for coresight component. Finally can use it as a common function for multiple places. Suggested-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose

[PATCH v6 7/8] arm64: dts: hi6220: register debug module

Bind debug module driver for Hi6220. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++ 1 file changed, 64 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi

Re: [PATCH 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

On Thursday 06 April 2017 06:33 PM, Thierry Reding wrote: * PGP Signed by an unknown key On Thu, Apr 06, 2017 at 09:57:09AM +0100, Jon Hunter wrote: On 05/04/17 15:13, Laxman Dewangan wrote: +state of the system. The configuration of pin is provided via the pinctrl +DT node as detailed in

[PATCH 3/6] apparmor: use SHASH_DESC_ON_STACK

From: Nicolas Iooss When building the kernel with clang, the compiler fails to build security/apparmor/crypto.c with the following error: security/apparmor/crypto.c:36:8: error: fields must have a constant size: 'variable length array in structure' extension

[PATCH 5/6] apparmor: fix parameters so that the permission test is bypassed at boot

Boot parameters are written before apparmor is ready to answer whether the user is policy_view_capable(). Setting the parameters at boot results in an oops and failure to boot. Setting the parameters at boot is obviously allowed so skip the permission check when apparmor is not initialized. While

[PATCH 1/6] apparmor: fix boolreturn.cocci warnings

From: kbuild test robot security/apparmor/lib.c:132:9-10: WARNING: return of 0/1 in function 'aa_policy_init' with return type bool Return statements in functions returning bool should use true/false instead of 1/0. Generated by:

[PATCH 2/6] security/apparmor/lsm.c: set debug messages

From: Valentin Rothberg Add the _APPARMOR substring to reference the intended Kconfig option. Signed-off-by: Valentin Rothberg Signed-off-by: John Johansen --- security/apparmor/lsm.c | 2 +- 1 file changed,

[PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

If the the field order is set to ANY in set_fmt, choose the currently set field order. If the colorspace is set to DEFAULT, choose the current colorspace. If any of xfer_func, ycbcr_enc or quantization are set to DEFAULT, either choose the current setting, or the default setting for the new

[PATCH 4/6] apparmor: fix invalid reference to index variable of iterator line 836

Once the loop on lines 836-853 is complete and exits normally, ent is a pointer to the dummy list head value. The derefernces accessible from eg the goto fail on line 860 or the various goto fail_lock's afterwards thus seem incorrect. Reported-by: Julia Lawall

[PATCH 7/8] x86: Enable 5-level paging support

Most of things are in place and we can enable support of 5-level paging. Enabling XEN with 5-level paging requires more work. The patch makes XEN dependent on !X86_5LEVEL. Signed-off-by: Kirill A. Shutemov --- arch/x86/Kconfig | 5 +

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