Add shutdown handler to cleanly turn off clocks. This will help
in cases of kexec where in a new kernel can boot abruptly.
Signed-off-by: Keerthy
Acked-by: Kishon Vijay Abraham I
---
Changes in v5:
* Declared the dra7xx_pcie_shutdown function static
Changes
Hi Eric and Marc,
On Tue, Nov 07, 2017 at 02:42:44PM +, Marc Zyngier wrote:
> Hi Eric,
>
> On 07/11/17 13:06, Auger Eric wrote:
> > Hi Marc,
> >
> > On 27/10/2017 16:28, Marc Zyngier wrote:
> >> Let's use the irq bypass mechanism introduced for platform device
> >> interrupts
> > nit: I
On 10/11/17 08:20, Christoffer Dall wrote:
> On Tue, Nov 07, 2017 at 02:08:23PM +0100, Auger Eric wrote:
>> Hi Marc,
>>
>> On 27/10/2017 16:28, Marc Zyngier wrote:
>>> In order to control the GICv4 view of virtual CPUs, we rely
>>> on an irqdomain allocated for that purpose. Let's add a couple
>>>
Hi,
I've also tested this and it's working good. Kernels tested:
- next-20171109 on top of Ubuntu 16.04
- MSFT kernel - 4.14.0-rc5 with patch applied - on top of RHEL 7.3
Adrian
-Original Message-
From: Bjorn Helgaas [mailto:helg...@kernel.org]
Sent: Wednesday, November 8, 2017 3:08
On Tue, Oct 31, 2017 at 04:22:56PM -0700, Dan Williams wrote:
> Add hashed waitqueue infrastructure to wait for ZONE_DEVICE pages to
> drop their reference counts and be considered idle for DMA. This
> facility will be used for filesystem callbacks / wakeups when DMA to a
> DAX mapped range of a
On 8 November 2017 at 14:25, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> Define and document a new driver flag, DPM_FLAG_LEAVE_SUSPENDED, to
> instruct the PM core and middle-layer (bus type, PM domain, etc.)
> code that it is desirable
Following up on this:
On Thu, Nov 9, 2017 at 4:52 PM, Linus Walleij wrote:
>> No one has ever suggested that the legacy API will remain. Once blk-mq is
>> ready the old code gets deleted.
>
> The block layer maintainers most definately think MQ is ready
> but you seem
On Nov 10 2017 or thereabouts, Sébastien Szymanski wrote:
> When everything goes smoothly, ret is set to 0 which makes the function
> to return EIO error.
>
> Fixes: 8e9faa15469e ("HID: cp2112: fix gpio-callback error handling")
> Signed-off-by: Sébastien Szymanski
On 11/09/2017 06:09 PM, Niklas Cassel wrote:
There are two different combined signal for various interrupt events:
In EQOS-CORE and EQOS-MTL configurations, mci_intr_o is the interrupt
signal.
In EQOS-DMA, EQOS-AHB and EQOS-AXI configurations, these interrupt events
are combined with the
On Friday 10 November 2017 04:37 PM, Keerthy wrote:
> From: "J, KEERTHY"
Linus,
The $Author field is somehow messed up. Please ignore. I will send v2
with this fixed.
Regards,
Keerthy
>
> As per the re-design assign the first bank regs for unbanked
> irq case. This was
On Fri, 10 Nov 2017 17:28:33 +0800
JianKang Chen wrote:
> From: Chen Jiankang
>
> When there are two same struct kretprobe rp, the INIT_HLIST_HEAD()
> will result in a empty list table rp->free_instances. The memory leak
> will happen. So it
This patch series adds a new SoundWire subsystem which implements a
new MIPI bus protocol 'SoundWire'.
The SoundWire protocol is a robust, scalable, low complexity, low
power, low latency, two-pin (clock and data) multi-drop bus that
allows for the transfer of multiple audio streams and embedded
SoundWire bus provides sdw_read() and sdw_write() APIs for Slave
devices to program the registers. Provide support in regmap for
SoundWire bus.
Signed-off-by: Hardik T Shah
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
From: Sanyog Kale
SoundWire Slaves report status to bus. Add helpers to handle
the status changes.
Signed-off-by: Hardik T Shah
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
---
When everything goes smoothly, ret is set to 0 which makes the function
to return EIO error.
Fixes: 8e9faa15469e ("HID: cp2112: fix gpio-callback error handling")
Signed-off-by: Sébastien Szymanski
---
Changes in v2:
- rework error handling to have only one
On Wed, Nov 08, 2017 at 11:47:20AM -0800, Dave Hansen wrote:
> +static
> +DEFINE_PER_CPU_SHARED_ALIGNED_USER_MAPPED(struct debug_store,
> cpu_debug_store);
> +
> /* The size of a BTS record in bytes: */
> #define BTS_RECORD_SIZE 24
>
> @@ -278,6 +282,39 @@ void
On Fri, 10 Nov 2017, Sébastien Szymanski wrote:
> When everything goes smoothly, ret is set to 0 which makes the function
> to return EIO error.
>
> Fixes: 8e9faa15469e ("HID: cp2112: fix gpio-callback error handling")
> Signed-off-by: Sébastien Szymanski
> ---
From: Markus Elfring
Date: Fri, 10 Nov 2017 12:56:33 +0100
* Add jump targets so that a call of the function "perror" and "exit"
is stored only once in an if branch of this function.
* Replace two calls by goto statements.
Signed-off-by: Markus Elfring
On Tue, Nov 07, 2017 at 02:08:23PM +0100, Auger Eric wrote:
> Hi Marc,
>
> On 27/10/2017 16:28, Marc Zyngier wrote:
> > In order to control the GICv4 view of virtual CPUs, we rely
> > on an irqdomain allocated for that purpose. Let's add a couple
> > of helpers to that effect.
> >
> > At the
On Wed, Nov 08, 2017 at 03:08:36PM +, Marc Zyngier wrote:
> On 07/11/17 21:28, Auger Eric wrote:
> > Hi Marc,
> >
> > On 27/10/2017 16:28, Marc Zyngier wrote:
> >> Upon updating a property, we propagate it all the way to the physical
> >> ITS, and ask for an INV command to be executed there.
When the user set a precise_ip greater than the highest precision available,
perf should return EINVAL to indicate the invalid precise_ip setting.
Currently, in get_event_modifier(), perf compares the user-specified precise_ip
with 3, instead of the highest precision available in the current
Hi Masahiro-san,
On 11/09/2017 11:41 PM, Masahiro Yamada wrote:
> For the out-of-tree build, scripts/Makefile.build creates output
> directories, but this operation is not efficient.
>
> scripts/Makefile.lib calculates obj-dirs as follows:
>
> obj-dirs := $(dir $(multi-objs) $(obj-y))
>
>
On 10/11/17 08:41, Christoffer Dall wrote:
> On Tue, Nov 07, 2017 at 10:23:25PM +0100, Auger Eric wrote:
>> Hi Marc,
>>
>> On 27/10/2017 16:28, Marc Zyngier wrote:
>>> Since when updating the properties one LPI at a time, there is no
>> Since we update the properties one LPI at a time, ... ?
>>>
Hi Cao,
2017-11-10 17:45 GMT+09:00 Cao jin :
>> +ifneq ($(KBUILD_SRC),)
>> +# Create directories for object files if directory does not exist
>> +obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets
>> +$(shell mkdir -p $(obj-dirs))
>> +endif
>> +
>
> I just
On Wed, Nov 08, 2017 at 06:43:25AM +0900, Alexei Starovoitov wrote:
> On 11/8/17 5:28 AM, Josef Bacik wrote:
> > I'm sending this through Dave since it'll conflict with other BPF changes
> > in his
> > tree, but since it touches tracing as well Dave would like a review from
> > somebody on the
* Josef Bacik wrote:
> @@ -551,6 +578,10 @@ static const struct bpf_func_proto
> *kprobe_prog_func_proto(enum bpf_func_id func
> return _get_stackid_proto;
> case BPF_FUNC_perf_event_read_value:
> return _perf_event_read_value_proto;
> +
Commit-ID: 03b2a320b19f1424e9ac9c21696be9c60b6d0d93
Gitweb: https://git.kernel.org/tip/03b2a320b19f1424e9ac9c21696be9c60b6d0d93
Author: Juergen Gross
AuthorDate: Thu, 9 Nov 2017 14:27:36 +0100
Committer: Ingo Molnar
CommitDate: Fri, 10 Nov 2017
Commit-ID: 120fc3fbb7787fb70240190cc9c113d1f6523c42
Gitweb: https://git.kernel.org/tip/120fc3fbb7787fb70240190cc9c113d1f6523c42
Author: Dou Liyang
AuthorDate: Wed, 8 Nov 2017 18:09:52 +0800
Committer: Ingo Molnar
CommitDate: Fri, 10 Nov 2017
Commit-ID: f72e38e8ec8869ac0ba5a75d7d2f897d98a1454e
Gitweb: https://git.kernel.org/tip/f72e38e8ec8869ac0ba5a75d7d2f897d98a1454e
Author: Juergen Gross
AuthorDate: Thu, 9 Nov 2017 14:27:35 +0100
Committer: Ingo Molnar
CommitDate: Fri, 10 Nov 2017
Commit-ID: 6d7305254ea947d575a066711c3349fafbebaffa
Gitweb: https://git.kernel.org/tip/6d7305254ea947d575a066711c3349fafbebaffa
Author: Juergen Gross
AuthorDate: Thu, 9 Nov 2017 14:27:37 +0100
Committer: Ingo Molnar
CommitDate: Fri, 10 Nov 2017
On Fri, Nov 10, 2017 at 10:29:33AM +0100, Ingo Molnar wrote:
>
> * Kirill A. Shutemov wrote:
>
> > --- a/arch/x86/boot/compressed/head_64.S
> > +++ b/arch/x86/boot/compressed/head_64.S
> > @@ -315,6 +315,18 @@ ENTRY(startup_64)
> > * The first step is go
On Fri, Nov 10, 2017 at 01:49:47AM -0800, Wanpeng Li wrote:
> @@ -2887,7 +2899,7 @@ static void kvm_steal_time_set_preempted(struct
> kvm_vcpu *vcpu)
> if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
> return;
>
> - vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
> +
On Fri, Nov 10, 2017 at 11:15:06AM +0100, Paolo Bonzini wrote:
> On 10/11/2017 11:08, Peter Zijlstra wrote:
> > On Fri, Nov 10, 2017 at 01:49:47AM -0800, Wanpeng Li wrote:
> >> @@ -2887,7 +2899,7 @@ static void kvm_steal_time_set_preempted(struct
> >> kvm_vcpu *vcpu)
> >>if
Stephen Hemminger writes:
> Several types of control operations require that the underlying RNDIS
> infrastructure be restarted. This patch changes the ordering of the
> shutdown to avoid race conditions.
> Stop all transmits before doing RNDIS halt. This involves
Referring TRM Am335X series:
http://www.ti.com/lit/ug/spruh73p/spruh73p.pdf
The LastPowerStateEntered bitfield is present only for PM_CEFUSE
domain. This is not present in any of the other power domains. Hence
remove the generic am33xx_pwrdm_read_prev_pwrst hook which wrongly
reads the reserved
On Mon, Nov 06, 2017 at 10:19:51PM -0800, Eric Biggers wrote:
> From: Eric Biggers
>
> On a non-preemptible kernel, if KEYCTL_DH_COMPUTE is called with the
> largest permitted inputs (16384 bits), the kernel spends 10+ seconds
> doing modular exponentiation in mpi_powm()
On Wed, Nov 01, 2017 at 04:20:04PM -0700, Florian Fainelli wrote:
> Hi,
>
> This patch series adds support for the RNG200 block found on the BCM7278 SoC.
> This requires us to update the compatible string (and associated binding
> document) as well as the Kconfig option to make that driver
RAS Extension add a VSESR_EL2 register which can provides
the syndrome value reported to software on taking a virtual
SError interrupt exception. This patch supports to specify
this Syndrome.
In the RAS Extensions we can not set all-zero syndrome value
for SError, which means 'RAS error:
From: Xie XiuQi
ARM's v8.2 Extentions add support for Reliability, Availability and
Serviceability (RAS). On CPUs with these extensions system software
can use additional barriers to isolate errors and determine if faults
are pending.
Add cpufeature detection and a barrier
The ARM64 RAS SError Interrupt(SEI) syndrome value is specific to the
guest and user space needs a way to tell KVM this value. So we add a
new ioctl. Before user space specifies the Exception Syndrome Register
ESR(ESR), it firstly checks that whether KVM has the capability to
set the guest ESR, If
Hello dear, compliments of the season, I sent series of mail, have you
seen them ?
2017-10-25 Brian Starkey :
> Hi Gustavo,
>
> On Fri, Oct 20, 2017 at 07:50:08PM -0200, Gustavo Padovan wrote:
> > From: Gustavo Padovan
> >
> > Receive in-fence from userspace and add support for waiting on them
> > before queueing the
On Fri, 10 Nov 2017, Prarit Bhargava wrote:
> On 11/09/2017 07:43 PM, Thomas Gleixner wrote:
> > On Sun, 5 Nov 2017, Prarit Bhargava wrote:
> >> [v5]: Change kmalloc to GFP_ATOMIC to fix "sleeping function" warning on
> >> virtual machines.
> >
> > What has this to do with virtual machines? The
On Thu, Nov 9, 2017 at 2:02 PM, Adrian Hunter wrote:
> On 09/11/17 14:52, Linus Walleij wrote:
>> On Thu, Nov 9, 2017 at 8:56 AM, Adrian Hunter
>> wrote:
>>> On 08/11/17 11:30, Linus Walleij wrote:
On Fri, Nov 3, 2017 at 2:20 PM, Adrian
2017-11-09 18:33 GMT+08:00 Arnd Bergmann :
> On Thu, Nov 9, 2017 at 10:02 AM, Greentime Hu wrote:
>> 2017-11-08 18:16 GMT+08:00 Arnd Bergmann :
>>> On Wed, Nov 8, 2017 at 6:55 AM, Greentime Hu wrote:
>
+config
This looks good to me:
Reviewed-by: Christoph Hellwig
Jens, can you pick it up through the block tree given that is where
the issue was introduced?
Add DT bindings for the Meson-AXG SoC Reset Controller include file,
and also slightly update documentation.
Signed-off-by: Yixun Lan
---
.../bindings/reset/amlogic,meson-reset.txt | 3 +-
.../dt-bindings/reset/amlogic,meson-axg-reset.h| 124
This patches add the Reset controller driver which found at
the Amlogic Meson-AXG SoC.
Yixun Lan (3):
dt-bindings: reset: Add bindings for the Meson-AXG SoC Reset
Controller
reset: meson-axg: add compatible string for Meson-AXG SoC
arm64: dts: meson-axg: add new reset DT node
Try to add compatible string explictly to support new Meson-AXG SoC.
Signed-off-by: Yixun Lan
---
drivers/reset/reset-meson.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index c419a3753d00..93cbee1ae8ef
Add reset DT node for Amlogic's Meson-AXG SoC.
Signed-off-by: Yixun Lan
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index
On 09/11/2017 at 15:09:20 +0800, Baolin Wang wrote:
> Use time64_t variables and related APIs for sysfs interfaces to
> support setting time or alarm after the year 2038 on 32-bit system.
>
> Signed-off-by: Baolin Wang
> ---
> drivers/rtc/rtc-sysfs.c | 25
On 10/11/17 08:37, Christoffer Dall wrote:
> On Wed, Nov 08, 2017 at 03:08:36PM +, Marc Zyngier wrote:
>> On 07/11/17 21:28, Auger Eric wrote:
>>> Hi Marc,
>>>
>>> On 27/10/2017 16:28, Marc Zyngier wrote:
Upon updating a property, we propagate it all the way to the physical
ITS, and
On 10/11/17 08:28, Christoffer Dall wrote:
> Hi Eric and Marc,
>
> On Tue, Nov 07, 2017 at 02:42:44PM +, Marc Zyngier wrote:
>> Hi Eric,
>>
>> On 07/11/17 13:06, Auger Eric wrote:
>>> Hi Marc,
>>>
>>> On 27/10/2017 16:28, Marc Zyngier wrote:
Let's use the irq bypass mechanism introduced
On Tue, Oct 31, 2017 at 04:22:46PM -0700, Dan Williams wrote:
> Combine the now three use cases of page-idle callbacks for ZONE_DEVICE
> memory into a common selectable symbol.
Very sparse changelog. I understand the Kconfig bit, but it also seems to
introduce new static key functionality that
From: Alexei Starovoitov
Date: Wed, 8 Nov 2017 06:43:25 +0900
> looks great to me.
> Peter,
> could you please review x86 bits?
I'm still waiting for this.
On Fri, Nov 10, 2017 at 3:38 AM, Andy Lutomirski wrote:
> On Thu, Nov 9, 2017 at 8:14 AM, Djalal Harouni wrote:
>> This patch introduces the new 'pids' mount option, as it was discussed
>> and suggested by Andy Lutomirski [1].
>>
>> * If 'pids=' is passed
On 11/9/17, Djalal Harouni wrote:
> --- a/fs/proc/base.c
> +++ b/fs/proc/base.c
> -static bool has_pid_permissions(struct pid_namespace *pid,
> +static bool has_pid_permissions(struct proc_fs_info *fs_info,
More "const".
> diff --git a/fs/proc/inode.c b/fs/proc/inode.c
>
-20171103: I get past kernel boot, but there's kernel panic
(probably) while X is starting. (I can see the capslock led
blinking.). This still happens on next-20171110, if I boot the machine
"cold". This is new.
Pave
MIPI Discovery And Configuration (DisCo) Specification for SoundWire
specifies properties to be implemented for SoundWire Masters and
Slaves. The DisCo spec doesn't mandate these properties. However,
SDW bus cannot work without knowing these values.
The helper functions read the Master and Slave
A Master registers with SoundWire bus and scans the firmware provided
for device description. In this patch we scan the ACPI namespaces and
create the SoundWire Slave devices based on the ACPI description
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod Koul
SoundWire bus supports read or write register(s) for SoundWire Slave
device. sdw_read() and sdw_write() APIs are provided for single
register read/write. sdw_nread() and sdw_nwrite() for operations on
contiguous registers.
Signed-off-by: Sanyog Kale
Signed-off-by: Vinod
If it is not RAS SError, directly inject virtual SError,
which will keep the old way. If it is RAS SError, firstly
let host ACPI module to handle it. For the ACPI handling,
if the error address is invalid, APEI driver will not
identify the address to hwpoison memory and can not notify
guest to do
Now that IGMP packets no longer is flooded in HW, we want the SW bridge to
forward packets based on bridge configuration. To make that happen,
IGMP packets must have skb->offload_fwd_mark = 0.
Signed-off-by: Egil Hjelmeland
---
net/dsa/tag_lan9303.c | 13 +
Set up the HW switch to trap IGMP packets to CPU port.
And make sure skb->offload_fwd_mark is cleared for incoming IGMP packets.
skb->offload_fwd_mark calculation is a candidate for consolidation into the
DSA core. The calculation can probably be more polished when done at a point
where DSA has
IGMP packets should be trapped to the CPU port. The SW bridge knows
whether to forward to other ports.
With "IGMP snooping for local traffic" merged, IGMP trapping is also
required for stable IGMPv2 operation.
LAN9303 does not trap IGMP packets by default.
Enable IGMP trapping in lan9303_setup.
On Wed, Nov 08, 2017 at 11:47:24AM -0800, Dave Hansen wrote:
> +#define CR3_HW_ASID_BITS 12
> +#define NR_AVAIL_ASIDS ((1< - VM_WARN_ON_ONCE(asid > 4094);
> + VM_WARN_ON_ONCE(asid > NR_AVAIL_ASIDS);
Not the same number
Hi David, nice to see a new driver.
Den 08.11.2017 04.52, skrev David Lechner:
This is a new driver for ILI9225 based display panels.
There are a couple of things that stand out:
1. Despite my best efforts, I could not find a name for this display[1], so I
have made up a generic name
From: Markus Elfring
Date: Fri, 10 Nov 2017 10:40:17 +0100
The script "checkpatch.pl" pointed information out like the following.
ERROR: do not use assignment in if condition
Thus fix the affected source code places.
Signed-off-by: Markus Elfring
* Kirill A. Shutemov wrote:
> > One other detail I noticed:
> >
> > /* Bound size of trampoline code */
> > .orglvl5_trampoline_src + LVL5_TRAMPOLINE_CODE_SIZE
> >
> > will this generate a build error if the trampoline code exceeds 0x40?
>
> Yes,
* Dave Hansen wrote:
> From: Dave Hansen
>
> These patches are based on work from a team at Graz University of
> Technology: https://github.com/IAIK/KAISER . This work would not have
> been possible without their work as a starting
On Thu, Nov 9, 2017 at 6:47 PM, Colin King wrote:
> From: Colin Ian King
>
> The current error exit path when ofs fails to allocate jumps
> to clean-up code that calls ovl_free_fs resulting in a null pointer
> dereference on the null ovl
> +DEFINE_MUTEX(devmap_lock);
static?
> +#if IS_ENABLED(CONFIG_FS_DAX)
> +static void generic_dax_pagefree(struct page *page, void *data)
> +{
> +}
> +
> +struct dax_device *fs_dax_claim_bdev(struct block_device *bdev, void *owner)
> +{
> + struct dax_device *dax_dev;
> + struct
* Kirill A. Shutemov wrote:
> If bootloader enables 64-bit mode with 4-level paging, we need to
> switch over to 5-level paging. The switching requires disabling paging.
> It works fine if kernel itself is loaded below 4G.
>
> If bootloader put the kernel above
* Kirill A. Shutemov wrote:
> --- a/arch/x86/boot/compressed/head_64.S
> +++ b/arch/x86/boot/compressed/head_64.S
> @@ -315,6 +315,18 @@ ENTRY(startup_64)
>* The first step is go into compatibility mode.
>*/
>
> + /*
> + * Find
On 11/10/17 at 08:25P, Ingo Molnar wrote:
>
> * Rafael J. Wysocki wrote:
>
> > Hi Linus,
> >
> > On 11/9/2017 11:38 AM, WANG Chao wrote:
> > > Commit 941f5f0f6ef5 (x86: CPU: Fix up "cpu MHz" in /proc/cpuinfo) caused
> > > a serious performance issue when reading
On Thu, Nov 09, 2017 at 09:52:12AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Thu, Nov 09, 2017 at 08:36:22AM +0100, Jiri Olsa escreveu:
> > On Wed, Nov 08, 2017 at 01:03:21PM -0300, Arnaldo Carvalho de Melo wrote:
> > > Em Wed, Nov 08, 2017 at 11:27:38AM +0100, Jiri Olsa escreveu:
> > > > From:
On Fri, Nov 10, 2017 at 10:14:53AM +0100, Ingo Molnar wrote:
> I'm wondering, how did you test it if no current bootloader puts the kernel
> to
> above addresses of 4G?
I didn't test it directly.
I've checked with debugger that there's no memory accesses above 1M
between disabling paging in
The platforms which support only IOAPIC mode and whose SCI INT is
greater than 16, passes SCI INT via FADT and not via MADT int src override
structure. In such cases current logic fails to handle it and throws error
"Invalid bus_irq %u for legacy override". This patch handles the above
mentioned
On Fri, 10 Nov 2017, Sébastien Szymanski wrote:
> >> Signed-off-by: Sébastien Szymanski
> >> ---
> >> drivers/hid/hid-cp2112.c | 2 +-
> >> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c
Hi Shanker,
On 09/11/17 15:22, Shanker Donthineni wrote:
> On 11/09/2017 05:08 AM, James Morse wrote:
>> On 04/11/17 21:43, Shanker Donthineni wrote:
>>> On 11/03/2017 10:11 AM, Robin Murphy wrote:
On 03/11/17 03:27, Shanker Donthineni wrote:
> The ARM architecture defines the memory
On 11/9/17, Djalal Harouni wrote:
> struct proc_fs_info {
> struct pid_namespace *pid_ns;
> + struct dentry *proc_self; /* For /proc/self/ */
> + struct dentry *proc_thread_self; /* For /proc/thread-self/ */
These are redundant comments.
On Fri, Nov 10, 2017 at 11:26 AM, Alexey Dobriyan wrote:
> On 11/9/17, Djalal Harouni wrote:
>
>> +struct proc_fs_info {
>> + struct pid_namespace *pid_ns;
>> +};
>
>> +static inline struct proc_fs_info *proc_sb(struct super_block *sb)
>> +{
>> +
On 11/10/17, Andrew Morton wrote:
> On Thu, 9 Nov 2017 17:07:14 +0300 Yury Norov
> wrote:
>
>> find_bit functions are widely used in the kernel, including hot paths.
>> This module tests performance of that functions in 2 typical scenarios:
On Fri, Nov 10, 2017 at 11:31 AM, Alexey Dobriyan wrote:
> On 11/9/17, Djalal Harouni wrote:
>
>> struct proc_fs_info {
>> struct pid_namespace *pid_ns;
>> + struct dentry *proc_self; /* For /proc/self/ */
>> + struct dentry
Masahiro-san
On 11/09/2017 11:41 PM, Masahiro Yamada wrote:
> The previous commit largely optimized the object directory creation.
> We can optimize it more for incremental build.
>
> There are already *.cmd files in the output directory. The existing
> *.cmd files have been picked up by
Hi,
On 09-11-17 22:07, Jeremy Cline wrote:
Replace the sst_acpi_check_hid helper function added in
commit 915ae2b9f0fe ("ASoC: Intel: Create a helper to search for
matching machine") with the generic acpi_dev_present helper function
and remove the now unused sst_acpi_check_hid function. This
ARMv8.2 adds a new bit HCR_EL2.TEA which routes synchronous external
aborts to EL2, and adds a trap control bit HCR_EL2.TERR which traps
all Non-secure EL1&0 error record accesses to EL2.
This patch enables the two bits for the guest OS, guaranteeing that
KVM takes external aborts and traps
From: James Morse
When we exit a guest due to an SError the vcpu fault info isn't updated
with the ESR. Today this is only done for traps.
The v8.2 RAS Extensions define ISS values for SError. Update the vcpu's
fault_info with the ESR on SError so that handle_exit() can
This series patches mainly do below things:
1. Trap RAS ERR* registers Accesses to EL2 from Non-secure EL1,
KVM will will do a minimum simulation, there registers are simulated
to RAZ/WI in KVM.
2. Route synchronous External Abort exceptions from Non-secure EL0
and EL1 to EL2. When
ARMv8.2 requires implementation of the RAS extension, in
this extension it adds SEI(SError Interrupt) notification
type, this patch adds new GHES error source SEI handling
functions. This error source parsing and handling method
is similar with the SEA.
Expose API ghes_notify_sei() to external
unsubscribe linux-mtd
Dear all,
2017-11-01 20:33 GMT+01:00 Sean Paul :
> On Tue, Oct 31, 2017 at 12:37:43PM +0800, JeffyChen wrote:
>> Hi Heiko,
>>
>> On 10/31/2017 07:01 AM, Heiko Stuebner wrote:
>> > As I was just looking at the edp dts change in patch1 again, does this
>> > series also
On Fri 10-11-17 11:15:29, Michal Hocko wrote:
> On Fri 10-11-17 09:19:33, Minchan Kim wrote:
> > On Tue, Nov 07, 2017 at 09:54:53AM +, Wang Nan wrote:
> > > tlb_gather_mmu(, mm, 0, -1) means gathering the whole virtual memory
> > > space. In this case, tlb->fullmm is true. Some archs like
On Thu, Nov 9, 2017 at 1:55 PM, Adrian Hunter wrote:
> On 09/11/17 14:26, Linus Walleij wrote:
I think the above approach to put any CQE-specific callbacks
directly into the struct mmc_host_ops is way more viable.
>>>
>>> Nothing to do with CQE. This is CQHCI.
On 9 November 2017 at 19:52, Joel Fernandes wrote:
> capacity_spare_wake in the slow path influences choice of idlest groups,
> as we search for groups with maximum spare capacity. In scenarios where
> RT pressure is high, a sub optimal group can be chosen and hurt
>
On Fri, Nov 10, 2017 at 10:29:51AM +0530, Vinod Koul wrote:
> On Thu, Nov 09, 2017 at 09:14:07PM +, Srinivas Kandagatla wrote:
> >
> >
> > On 19/10/17 04:03, Vinod Koul wrote:
> > >This adds the base SoundWire bus type, bus and driver registration.
> > >along with changes to module device
* Kirill A. Shutemov wrote:
> This patch prepare decompression code to boot-time switching between 4-
> and 5-level paging.
>
> Signed-off-by: Kirill A. Shutemov
> ---
> arch/x86/boot/compressed/head_64.S | 16
On Fri, Nov 10, 2017 at 10:05 AM, Marc Zyngier wrote:
> On 10/11/17 08:28, Christoffer Dall wrote:
>> Hi Eric and Marc,
>>
>> On Tue, Nov 07, 2017 at 02:42:44PM +, Marc Zyngier wrote:
>>> Hi Eric,
>>>
>>> On 07/11/17 13:06, Auger Eric wrote:
Hi Marc,
On
On Fri, Nov 10, 2017 at 10:28:12AM +0100, Ingo Molnar wrote:
>
> * Ingo Molnar wrote:
>
> > > --- a/arch/x86/boot/compressed/head_64.S
> > > +++ b/arch/x86/boot/compressed/head_64.S
> > > @@ -315,6 +315,18 @@ ENTRY(startup_64)
> > >* The first step is go into compatibility
Jiri Kosina wrote:
> > The idea is to prevent cryptographic data for filesystems and other things
> > from being read out of the kernel memory as well as to prevent unauthorised
> > modification of kernel memory.
>
> Then it would make sense to actually lock down dumping of
1 - 100 of 1268 matches
Mail list logo