Hi Zefan,
These four patches are bugfix for ACPI and power management from mainline
v3.6, comments are welcomed!
Thanks
Hanjun Guo
Colin Cross (1):
cpuidle: fix error handling in __cpuidle_register_device
Stephen Boyd (1):
cpufreq: Fix sysfs deadlock with concurrent hotplug/frequency
...@intel.com
Integrated-by: Hanjun Guo guohan...@huawei.com
---
arch/ia64/kernel/acpi.c |5 +++--
arch/x86/mm/srat.c | 16 +---
drivers/acpi/numa.c |8 +---
include/linux/acpi.h|2 +-
4 files changed, 18 insertions(+), 13 deletions(-)
diff --git a/arch/ia64/kernel
-off-by: Rafael J. Wysocki r...@sisk.pl
Integrated-by: Hanjun Guo guohan...@huawei.com
---
drivers/cpufreq/cpufreq.c | 35 +++
1 files changed, 27 insertions(+), 8 deletions(-)
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 7f2f149..fb8a527
Cross ccr...@android.com
Reviewed-by: Rafael J. Wysocki r...@sisk.pl
Signed-off-by: Len Brown len.br...@intel.com
Integrated-by: Hanjun Guo guohan...@huawei.com
---
drivers/cpuidle/cpuidle.c | 13 +
1 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/cpuidle/cpuidle.c
.
Signed-off-by: Thomas Renninger tr...@suse.de
Signed-off-by: Len Brown len.br...@intel.com
Integrated-by: Hanjun Guo guohan...@huawei.com
---
drivers/acpi/numa.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/acpi/numa.c b/drivers/acpi/numa.c
index e56f3be
I made a mistake in sending email, sorry for the bothering, please ignore it.
On 2013/4/10 18:22, Hanjun Guo wrote:
Hi Zefan,
These four patches are bugfix for ACPI and power management from mainline
v3.6, comments are welcomed!
Thanks
Hanjun Guo
Colin Cross (1):
cpuidle: fix
ping...
On 2013/3/8 12:33, Hanjun Guo wrote:
Ioapic hotplug was supported in IA64 code, but will lead to kexec oops
when iosapic was removed. here is the code logic:
iosapic_remove
iosapic_free
memset(iosapic_lists[index], 0, sizeof(iosapic_lists[0]))
iosapic_lists[index].addr
On 2013/3/7 1:38, Toshi Kani wrote:
On Mon, 2013-03-04 at 11:47 +0800, Hanjun Guo wrote:
Ioapic hotplug was supported in IA64 code, but will lead to kexec oops
when iosapic was removed. here is the code logic:
iosapic_remove
iosapic_free
memset(iosapic_lists[index], 0, sizeof
describeinterrupts - describe interrupts
Signed-off-by: Hanjun Guo guohan...@huawei.com
---
arch/ia64/kernel/iosapic.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index ee33c3a..a6e2f75 100644
--- a/arch/ia64
, the patch removes the rte from rte_list
when the iosapic was removed.
v2:
function name delete_rte_from_list was changed to iosapic_delete_rte with
Toshi's advice.
Signed-off-by: Hanjun Guo guohan...@huawei.com
Signed-off-by: Jianguo Wu wujian...@huawei.com
Acked-by: Toshi Kani toshi.k...@hp.com
describeinterrupts - describe interrupts
Signed-off-by: Hanjun Guo guohan...@huawei.com
---
arch/ia64/kernel/iosapic.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index ee33c3a..a6e2f75 100644
--- a/arch/ia64
, the patch removes the rte from rte_list
when the iosapic was removed.
Signed-off-by: Hanjun Guo guohan...@huawei.com
Signed-off-by: Jianguo Wu wujian...@huawei.com
---
arch/ia64/kernel/iosapic.c | 32 +++-
1 files changed, 31 insertions(+), 1 deletions(-)
diff --git
On 2012/11/30 6:27, Toshi Kani wrote:
On Thu, 2012-11-29 at 12:48 +0800, Hanjun Guo wrote:
On 2012/11/29 2:41, Toshi Kani wrote:
On Wed, 2012-11-28 at 19:05 +0800, Hanjun Guo wrote:
On 2012/11/24 1:50, Vasilis Liaskovitis wrote:
As discussed in https://patchwork.kernel.org/patch/1581581
On 2012/12/4 8:10, Toshi Kani wrote:
On Mon, 2012-12-03 at 12:25 +0800, Hanjun Guo wrote:
On 2012/11/30 6:27, Toshi Kani wrote:
On Thu, 2012-11-29 at 12:48 +0800, Hanjun Guo wrote:
On 2012/11/29 2:41, Toshi Kani wrote:
On Wed, 2012-11-28 at 19:05 +0800, Hanjun Guo wrote:
On 2012/11/24 1:50
On 2012/12/5 7:23, Toshi Kani wrote:
On Tue, 2012-12-04 at 17:16 +0800, Hanjun Guo wrote:
On 2012/12/4 8:10, Toshi Kani wrote:
On Mon, 2012-12-03 at 12:25 +0800, Hanjun Guo wrote:
On 2012/11/30 6:27, Toshi Kani wrote:
On Thu, 2012-11-29 at 12:48 +0800, Hanjun Guo wrote:
On 2012/11/29 2:41
On 2012/8/10 22:12, Christoph Lameter (Open Source) wrote:
On Fri, 10 Aug 2012, Hanjun Guo wrote:
On 2012/8/9 22:06, Christoph Lameter (Open Source) wrote:
On Thu, 9 Aug 2012, Hanjun Guo wrote:
Now, We have node masks for both N_NORMAL_MEMORY and
N_HIGH_MEMORY to distinguish between normal
On 2012/8/14 22:14, Christoph Lameter wrote:
On Tue, 14 Aug 2012, Hanjun Guo wrote:
N_NORMAL_MEMORY means !LRU allocs possible.
Ok. I am fine with that change. However this is a significant change that
needs to be mentioned prominently in the changelog and there need to be
some comments
rte_list when the
iosapic is removed.
Actually, the rte_list will keep static when remove/add a existing iosapic
after boot up.
Should we remove the RTE from the rte_list? if yes, we will have more
to do than this patch.
Thanks
Hanjun Guo
--
To unsubscribe from this list: send the line unsubscribe
From: Wu Jianguo wujian...@huawei.com
Hi Christoph,
Now, We have node masks for both N_NORMAL_MEMORY and N_HIGH_MEMORY to
distinguish between normal and highmem on platforms such as x86. But we still
don't have such a mechanism to distinguish between normal and movable
memory.
So this
From: Wu Jianguo wujian...@huawei.com
Hi all,
Now, We have node masks for both N_NORMAL_MEMORY and
N_HIGH_MEMORY to distinguish between normal and highmem on platforms such as
x86.
But we still don't have such a mechanism to distinguish between normal and
movable
memory.
As suggested by
=e0078f76fe30 bsp=e0078f761120
Kernel panic - not syncing: Fatal exception
irq 69: nobody cared (try booting with the irqpoll option)
Signed-off-by: Hanjun Guo guohan...@huawei.com
Signed-off-by: Jianguo Wu wujian...@huawei.com
---
arch/ia64/kernel/iosapic.c |3 +++
1 files changed, 3
On 2012/8/9 22:06, Christoph Lameter (Open Source) wrote:
On Thu, 9 Aug 2012, Hanjun Guo wrote:
Now, We have node masks for both N_NORMAL_MEMORY and
N_HIGH_MEMORY to distinguish between normal and highmem on platforms such as
x86.
But we still don't have such a mechanism to distinguish
(MPT_ADAPTER *ioc), it forgot disable the
pci device when error happened, the irq and gsi will never be released.
this patch will fix it.
Signed-off-by: Hanjun Guo guohan...@huawei.com
Signed-off-by: Jiang Liu jiang@huawei.com
---
drivers/message/fusion/mptbase.c | 18 +++---
1 files
=e0078f76fe30 bsp=e0078f761120
Kernel panic - not syncing: Fatal exception
irq 69: nobody cared (try booting with the irqpoll option)
Signed-off-by: Hanjun Guo guohan...@huawei.com
Signed-off-by: Jianguo Wu wujian...@huawei.com
---
arch/ia64/kernel/iosapic.c |3 +++
1 files changed, 3
On 2012/8/17 3:33, Toshi Kani wrote:
On Thu, 2012-08-16 at 18:28 +0800, Hanjun Guo wrote:
On 2012/8/13 10:54, Luck, Tony wrote:
vec = irq_to_vector(irq);
list_for_each_entry(rte, info-rtes,
rte_list) {
+ if (rte-refcnt
hotplug driver totally have no idea of this.
so, should we do something to settle this down ?
Thanks
Hanjun Guo
The example is as follows:
https://lkml.org/lkml/2012/9/26/318
Thanks,
Yasuaki Ishimatsu
--
To unsubscribe from this list: send the line unsubscribe linux-kernel
On 2012/11/26 14:06, Tang Chen wrote:
On 11/26/2012 01:42 PM, Hanjun Guo wrote:
Hi all,
I think Yasuaki mentioned the key point for the container device remove,
that is dependency.
Currently, container, processor, and memory hotpulg are managed by different
ACPI
hotplug drivers
On 2012/11/26 14:06, Tang Chen wrote:
On 11/26/2012 01:42 PM, Hanjun Guo wrote:
Hi all,
I think Yasuaki mentioned the key point for the container device remove,
that is dependency.
Currently, container, processor, and memory hotpulg are managed by different
ACPI
hotplug drivers
On 2012/11/27 10:38, Tang Chen wrote:
On 11/27/2012 09:08 AM, Hanjun Guo wrote:
On 2012/11/26 14:06, Tang Chen wrote:
On 11/26/2012 01:42 PM, Hanjun Guo wrote:
Hi all,
I think Yasuaki mentioned the key point for the container device remove,
that is dependency.
Currently, container
easily rollback if error happens.
How do you think of this solution, any suggestion ? I think we can achieve
a better way for sharing ideas. :)
Thanks
Hanjun Guo
With this patchset, only acpi memory devices use the new prepare_remove
device operation. The actual memory removal (VM-related offline
On 2012/11/29 2:41, Toshi Kani wrote:
On Wed, 2012-11-28 at 19:05 +0800, Hanjun Guo wrote:
On 2012/11/24 1:50, Vasilis Liaskovitis wrote:
As discussed in https://patchwork.kernel.org/patch/1581581/
the driver core remove function needs to always succeed. This means we need
to know
supported arches.
So this arch_provides_topology_pointers define is pointless and only cause
obfuscation now, remove it.
Tested on x86 machine, topology information in sys/devices/system/cpu/
cpuX/topology/ is the same after appling this patch set.
Signed-off-by: Hanjun Guo hanjun@linaro.org
Macro arch_provides_topology_pointers is pointless now, remove it.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/x86/include/asm/topology.h |3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 095b215..d35f24e
Macro arch_provides_topology_pointers is pointless now, remove it.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/tile/include/asm/topology.h |3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/tile/include/asm/topology.h b/arch/tile/include/asm/topology.h
index d5e86c9
, and replaced the topology array with per cpu variable.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/Kconfig|9 +++
arch/arm64/include/asm/cputype.h | 11
arch/arm64/include/asm/topology.h | 41
arch/arm64/kernel/Makefile|1
into 64 bit and introduce another affinity level,
we can use this affinity level for socket id and use the third highest level
affinity for cluster id, which make the socket id behavior in its original
way.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/include/asm/topology.h |1
Hi Greg,
I sent [PATCH 3/3] twice because of my bad email client,
sorry for the noise, please ignore the duplicated [PATCH 3/3].
Thanks
Hanjun
On 2013-8-17 20:42, Hanjun Guo wrote:
__init belongs after the return type on functions, not before it.
Signed-off-by: Hanjun Guo hanjun
On 2013-8-14 19:27, Catalin Marinas wrote:
On Mon, Jul 29, 2013 at 10:54:01AM +0100, Will Deacon wrote:
On Mon, Jul 29, 2013 at 10:46:06AM +0100, Vincent Guittot wrote:
On 27 July 2013 12:42, Hanjun Guo hanjun@linaro.org wrote:
Power aware scheduling needs the cpu topology information
More than 256 entries in ACPI MADT is supported from ACPI 3.0 Specification,
So the outdated description for MADT entries should be removed.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
Documentation/cpu-hotplug.txt |3 ---
1 file changed, 3 deletions(-)
diff --git a/Documentation
On 2013-6-21 3:52, Rafael J. Wysocki wrote:
On Thursday, June 20, 2013 04:54:42 PM Hanjun Guo wrote:
More than 256 entries in ACPI MADT is supported from ACPI 3.0 Specification,
So the outdated description for MADT entries should be removed.
Well, it kind of is still valid for systems pre
More than 256 entries in ACPI MADT is supported from ACPI 3.0, so the
information should be updated.
-v2: Rephrase the information instead of simply removing it according
to Rafael's advice.
Suggested-by: Rafael J. Wysocki r...@sisk.pl
Signed-off-by: Hanjun Guo hanjun@linaro.org
On 2013-7-29 17:38, Vincent Guittot wrote:
On 27 July 2013 12:42, Hanjun Guo hanjun@linaro.org wrote:
In the cpu topology information, we define topology_physical_package_id()
as cpu socket id, which means that the socket id is the idenfication for
physical processor, not for a cluster
On 2013-7-29 17:46, Vincent Guittot wrote:
On 27 July 2013 12:42, Hanjun Guo hanjun@linaro.org wrote:
Power aware scheduling needs the cpu topology information to improve the
cpu scheduler decision making.
It's not only power aware scheduling. The scheduler already uses
topology
On 2013-7-29 21:36, Dave Martin wrote:
On Mon, Jul 29, 2013 at 10:54:01AM +0100, Will Deacon wrote:
On Mon, Jul 29, 2013 at 10:46:06AM +0100, Vincent Guittot wrote:
On 27 July 2013 12:42, Hanjun Guo hanjun@linaro.org wrote:
Power aware scheduling needs the cpu topology information
'dev_id' in the comments of clk_register_clkdev should
be 'dev_fmt' here.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
drivers/clk/clkdev.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clkdev.c b/drivers/clk/clkdev.c
index 442a313..825b52b 100644
On 2013年12月03日 20:27, Linus Walleij wrote:
On Tue, Dec 3, 2013 at 12:15 PM, Hanjun Guo hanjun@linaro.org wrote:
+ /* if can't be initialised from DT, try ACPI way */
+ if (!arch_timer_get_rate())
+ arch_timer_acpi_init();
+
arch_timer_rate
On 2013年12月03日 22:43, Mark Rutland wrote:
On Tue, Dec 03, 2013 at 02:13:49PM +, Linus Walleij wrote:
On Tue, Dec 3, 2013 at 2:52 PM, Hanjun Guo hanjun@linaro.org wrote:
I will introduce has_arch_timer_node() as you said and use
it as follows:
if (has_arch_timer_node
initialisation, GIC initialisation
and for ACPI drivers.
This patch set is based on:
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
origin/linux-next branch and plus Al Stone's v2 reduced hardware profile
patch.
Hanjun Guo (7):
ACPI: Make ACPI core running without PCI
.
This patch introduces the skeleton of _PDC related file to make
ACPI core can be compiled on ARM64.
Signed-off-by: Al Stone al.st...@linaro.org
Signed-off-by: Graeme Gregory graeme.greg...@linaro.org
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/include/asm/acpi.h | 32
ACPI requires a cpu.h, add a dummy one copied from arm. This will need
updated or replaced as ACPI based cpu hotplug for armv8 is worked out.
Signed-off-by: Graeme Gregory graeme.greg...@linaro.org
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/include/asm/cpu.h | 25
-off-by: Al Stone al.st...@linaro.org
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
drivers/acpi/Makefile |2 +-
drivers/acpi/internal.h|5 +
drivers/acpi/osl.c | 16 ++
drivers/acpi/reboot.c | 47
_PDC related stuff in processor_core.c is little bit X86/IA64 dependent,
rework the code to make it more arch-independent.
The return value of acpi_processor_eval_pdc() should be 'acpi_status' but
defined as 'int', fix it too.
Signed-off-by: Hanjun Guo hanjun@linaro.org
Signed-off-by: Graeme
Implement core functions for parsing MADT table to get the information
about GIC cpu interface and GIC distributor.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/include/asm/acpi.h |3 +
drivers/acpi/plat/arm-core.c | 139 -
drivers
5.2.12.14/15 of ACPI 5.0 spec for GIC and GIC
distributor structure information.
Amit Daniel Kachhap (1):
irqdomain: Add a new API irq_create_acpi_mapping()
Hanjun Guo (8):
ARM64 / ACPI: Implement core functions for parsing MADT table
ARM64 / ACPI: Prefill cpu possible/present maps and map logical
lowlevel suspend function is needed for ACPI based suspend/resume,
introduce ARM related lowlevel function in this patch.
Signed-off-by: Graeme Gregory graeme.greg...@linaro.org
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/include/asm/acpi.h |4
drivers/acpi/plat/arm
to support it.
Signed-off-by: Graeme Gregory graeme.greg...@linaro.org
Signed-off-by: Al Stone al.st...@linaro.org
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/Kconfig |2 ++
drivers/acpi/Kconfig | 12 +---
drivers/acpi/plat/Makefile |2 +-
3 files
introduce arm_core.c and its related head file, after this patch,
we can get ACPI tables from BIOS on ARM64 now.
Signed-off-by: Al Stone al.st...@linaro.org
Signed-off-by: Graeme Gregory graeme.greg...@linaro.org
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/include/asm/acpi.h
If we set the GIC as the default domain then we can access it for IRQ
mapping within the ACPI code.
Signed-off-by: Graeme Gregory graeme.greg...@linaro.org
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
drivers/irqchip/irq-gic.c |7 +++
1 file changed, 7 insertions(+)
diff --git
Get apic id from MADT or _MAT method is not implemented on arm/arm64,
and ACPI 5.0 introduces GIC Structure for it, so this patch introduces
map_gic_id() to get apic id followed the ACPI 5.0 spec.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
drivers/acpi/processor_core.c | 26
-by: Hanjun Guo hanjun@linaro.org
---
include/linux/acpi.h |2 ++
kernel/irq/irqdomain.c | 27 +++
2 files changed, 29 insertions(+)
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 1e6a0ac..edd5806 100644
--- a/include/linux/acpi.h
+++ b/include
Needed because arm uses GIC which is defined in ACPI 5.0 spec.
Signed-off-by: Al Stone al.st...@linaro.org
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
drivers/acpi/bus.c |3 +++
drivers/acpi/plat/arm-core.c |6 +-
include/linux/acpi.h |1 +
3 files
This API is similar to DT based irq_of_parse_and_map but does link
parent/child IRQ controllers. This is tested for primary GIC PPI and GIC SPI
interrupts and not for secondary child irq controllers.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Signed-off-by: Hanjun Guo hanjun
When boot the kernel with MADT, the cpu possible and present maps should be
prefilled for cpu topology and acpi based cpu hot-plug.
The logic cpu id maps to APIC id (GIC id) is also implemented, it is needed
for acpi processor drivers.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch
Parked Address in GIC structure can be used as cpu release address
for spin table SMP initialisation.
This patch gets parked address from MADT and use it for SMP
initialisation when DT is not available.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/include/asm/acpi.h
In MADT table, there are GIC cpu interface base address and
GIC distributor base address, use them to convert GIC to ACPI.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/kernel/irq.c |5
drivers/acpi/plat/arm-core.c | 66
Use arch_timer_acpi_init() on ARM64 to initialise arch timer
in ACPI way when DT is not available.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/kernel/time.c |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/kernel/time.c b/arch/arm64/kernel/time.c
index
amit.dan...@samsung.com
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
drivers/clocksource/arm_arch_timer.c | 129 ++
include/clocksource/arm_arch_timer.h |7 +-
2 files changed, 120 insertions(+), 16 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c
/platforms/foundation-v8.acpi/gtdt.asl
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2013, Al Stone al.st...@linaro.org
+ * Hanjun Guo hanjun@linaro.org
*
* [GTDT] Generic Timer Description Table
* Format: [ByteLength] FieldName : HexFieldValue
@@ -21,22 +22,32 @@
[0004
On 2013年12月04日 00:41, Matthew Garrett wrote:
Given the number of #ifdefs you're adding, wouldn't it make more sense
to just add stub functions to include/linux/pci.h?
Thanks for the suggestion :)
I can add stub functions in include/linux/pci.h for raw_pci_read()/
raw_pci_write(), then can
On 2013年12月04日 00:46, Matthew Garrett wrote:
On Wed, Dec 04, 2013 at 12:36:47AM +0800, Hanjun Guo wrote:
+#if defined(CONFIG_X86) || defined(CONFIG_IA64)
/* Enable coordination with firmware's _TSD info */
buf[2] = ACPI_PDC_SMP_T_SWCOORD;
+ if (boot_option_idle_override
On 2013年12月04日 00:47, One Thousand Gnomes wrote:
diff --git a/drivers/acpi/reboot.c b/drivers/acpi/reboot.c
index a6c77e8b..89a181f 100644
--- a/drivers/acpi/reboot.c
+++ b/drivers/acpi/reboot.c
@@ -3,12 +3,43 @@
#include linux/acpi.h
#include acpi/reboot.h
+/*
+ * There are some rare
On 2013年12月04日 00:51, One Thousand Gnomes wrote:
On Wed, 4 Dec 2013 00:36:47 +0800
Hanjun Guo hanjun@linaro.org wrote:
_PDC related stuff in processor_core.c is little bit X86/IA64 dependent,
rework the code to make it more arch-independent.
The return value of acpi_processor_eval_pdc
On 2013年12月04日 00:53, One Thousand Gnomes wrote:
O +enum idle_boot_override { IDLE_NO_OVERRIDE = 0, IDLE_HALT, IDLE_NOMWAIT,
+ IDLE_POLL, IDLE_FORCE_MWAIT };
This should probably move out of the arch directory to be a single enum
including both platforms values. That will
On 2013年12月04日 00:57, One Thousand Gnomes wrote:
diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c
index 45ff625..8527ecc 100644
--- a/drivers/acpi/plat/arm-core.c
+++ b/drivers/acpi/plat/arm-core.c
@@ -58,6 +58,13 @@ EXPORT_SYMBOL(acpi_pci_disabled);
*/
static u64
On 2013年12月04日 01:04, Mark Rutland wrote:
On Tue, Dec 03, 2013 at 04:41:30PM +, Hanjun Guo wrote:
ACPI GTDT (Generic Timer Description Table) contains information for
arch timer initialization, this patch use this table to probe arm timer.
GTDT table is used for ARM/ARM64 only, please
On 2013年12月04日 01:08, Mark Rutland wrote:
On Tue, Dec 03, 2013 at 04:41:31PM +, Hanjun Guo wrote:
Use arch_timer_acpi_init() on ARM64 to initialise arch timer
in ACPI way when DT is not available.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/kernel/time.c |4
On 2013年12月04日 01:12, Rob Herring wrote:
On Tue, Dec 3, 2013 at 10:36 AM, Hanjun Guo hanjun@linaro.org wrote:
[...]
+#ifndef _ASM_ARM_ACPI_H
+#define _ASM_ARM_ACPI_H
+
+static inline bool arch_has_acpi_pdc(void)
+{
+ return false; /* always false for now */
+}
+
+static inline void
On 2013年12月04日 01:09, Rob Herring wrote:
On Tue, Dec 3, 2013 at 10:39 AM, Hanjun Guo hanjun@linaro.org wrote:
In MADT table, there are GIC cpu interface base address and
GIC distributor base address, use them to convert GIC to ACPI.
Signed-off-by: Hanjun Guo hanjun@linaro.org
On 2013年12月04日 01:13, Mark Rutland wrote:
On Tue, Dec 03, 2013 at 04:36:46PM +, Hanjun Guo wrote:
ACPI requires a cpu.h, add a dummy one copied from arm. This will need
updated or replaced as ACPI based cpu hotplug for armv8 is worked out.
What exactly requires cpu.h, and why?
CPI core
On 2013年12月04日 01:26, Marc Zyngier wrote:
Hi Hanjun,
On 03/12/13 16:39, Hanjun Guo wrote:
In MADT table, there are GIC cpu interface base address and
GIC distributor base address, use them to convert GIC to ACPI.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/arm64/kernel/irq.c
On 2013年12月04日 01:25, Rob Herring wrote:
On Tue, Dec 3, 2013 at 10:39 AM, Hanjun Guo hanjun@linaro.org wrote:
From: Amit Daniel Kachhap amit.dan...@samsung.com
This patch introduces a new API for acpi based irq mapping.
[hanjun: Rework this patch to delete the reference
+CC Lv Zheng
On 2013年12月04日 02:03, Mark Rutland wrote:
On Tue, Dec 03, 2013 at 04:36:49PM +, Hanjun Guo wrote:
introduce arm_core.c and its related head file, after this patch,
we can get ACPI tables from BIOS on ARM64 now.
Signed-off-by: Al Stone al.st...@linaro.org
Signed-off-by: Graeme
On 2013年12月04日 13:46, Zheng, Lv wrote:
From: linux-acpi-ow...@vger.kernel.org
[mailto:linux-acpi-ow...@vger.kernel.org] On Behalf Of Hanjun Guo
Sent: Wednesday, December 04, 2013 12:37 AM
introduce arm_core.c and its related head file, after this patch,
we can get ACPI tables from BIOS
On 2013年12月04日 18:10, Graeme Gregory wrote:
On Wed, Dec 04, 2013 at 12:36:51AM +0800, Hanjun Guo wrote:
Add Kconfigs to build ACPI on ARM64, and make ACPI runable on ARM64.
acpi_idle driver is x86/IA64 dependent now, so make CONFIG_ACPI_PROCESSOR
depends on X86 || IA64, and implement it on ARM
On 2013年12月04日 23:07, Mark Rutland wrote:
On Wed, Dec 04, 2013 at 02:27:22PM +, Hanjun Guo wrote:
On 2013年12月04日 01:08, Mark Rutland wrote:
On Tue, Dec 03, 2013 at 04:41:31PM +, Hanjun Guo wrote:
Use arch_timer_acpi_init() on ARM64 to initialise arch timer
in ACPI way when DT
On 2013年12月04日 23:33, Rob Herring wrote:
On Tue, Dec 3, 2013 at 5:15 AM, Hanjun Guo hanjun@linaro.org wrote:
[...]
+#ifdef CONFIG_ACPI
+void __init arch_timer_acpi_init(void)
+{
+ struct acpi_table_gtdt *gtdt;
+ acpi_size tbl_size;
+ int trigger, polarity;
+ void
On 2013年12月04日 23:47, Rob Herring wrote:
On Tue, Dec 3, 2013 at 10:39 AM, Hanjun Guo hanjun@linaro.org wrote:
When boot the kernel with MADT, the cpu possible and present maps should be
prefilled for cpu topology and acpi based cpu hot-plug.
The logic cpu id maps to APIC id (GIC id
On 2013年12月04日 23:50, Marc Zyngier wrote:
On 04/12/13 15:32, Hanjun Guo wrote:
On 2013年12月04日 01:26, Marc Zyngier wrote:
Hi Hanjun,
On 03/12/13 16:39, Hanjun Guo wrote:
In MADT table, there are GIC cpu interface base address and
GIC distributor base address, use them to convert GIC to ACPI
On 2013年12月05日 11:38, Arnd Bergmann wrote:
On Tuesday 03 December 2013, Hanjun Guo wrote:
+static unsigned int gsi_to_irq(unsigned int gsi)
+{
+ int irq = irq_create_mapping(NULL, gsi);
+
+ return irq;
+}
I think this could use a comment regarding your plans for IRQ domains.
Do
On 2013年12月05日 11:43, Arnd Bergmann wrote:
On Tuesday 03 December 2013, Hanjun Guo wrote:
+#ifdef CONFIG_ACPI
+void __init arch_timer_acpi_init(void)
+{
...
+}
+#else
+void __init arch_timer_acpi_init(void) { return; };
+#endif
The #else clause is broken in combination with
diff --git
On 2013年12月05日 11:48, Arnd Bergmann wrote:
On Tuesday 03 December 2013, Hanjun Guo wrote:
+ /*
+* ACPI have no bindings to indicate SPI or PPI, so we
+* use different mappings from DT in ACPI.
+*
+* For FDT
+* PPI interrupt: in the range [0, 15
On 2013年12月05日 22:09, Rob Herring wrote:
On Tue, Dec 3, 2013 at 10:36 AM, Hanjun Guo hanjun@linaro.org wrote:
[...]
+
#endif /*_ASM_ARM_ACPI_H*/
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index bd9bbd0..8199360 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch
On 2014-2-21 20:37, Sudeep Holla wrote:
Hi Hanjun,
(Adding MarcZ for his views on GIC)
On 20/02/14 03:59, Hanjun Guo wrote:
Hi Sudeep,
Thanks for your comments, please refer to the replies below. :)
On 2014年02月19日 22:33, Sudeep Holla wrote:
Hi Hanjun,
On 18/02/14 16:23, Hanjun Guo
On 2014-2-22 19:30, Marc Zyngier wrote:
On 2014-02-22 10:21, Hanjun Guo wrote:
On 2014-2-21 20:37, Sudeep Holla wrote:
Hi Hanjun,
(Adding MarcZ for his views on GIC)
On 20/02/14 03:59, Hanjun Guo wrote:
Hi Sudeep,
Thanks for your comments, please refer to the replies below. :)
On 2014年
Guo wrote:
_PDC related stuff in processor_core.c is little bit X86/IA64 dependent,
rework the code to make it more arch-independent, no functional change
in this patch.
Signed-off-by: Hanjun Guo hanjun@linaro.org
Signed-off-by: Graeme Gregory graeme.greg...@linaro.org
I've queued up
On 2014年02月19日 13:10, Hanjun Guo wrote:
_PDC related stuff in processor_core.c is little bit X86/IA64
dependent, macros of ACPI_PDC_* are _PDC bit definitions for
Intel processors, if we use these macros in processor_core.c,
we can not compile it when ACPI is enabled on ARM/ARM64.
This patch
On 2014-2-18 9:13, Rafael J. Wysocki wrote:
On Saturday, February 08, 2014 09:10:16 PM Hanjun Guo wrote:
idle_boot_override depends on x86 and ia64 now, and we can not
foresee it will be used on ARM or ARM64,so move the code into
CONFIG_X86 and CONFIG_IA64 #ifdefs to make processor_core.c
can
This patch just do some clean up to replace printk with pr_*,
no functional change.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
drivers/acpi/tables.c | 51 +++--
1 file changed, 20 insertions(+), 31 deletions(-)
diff --git a/drivers/acpi
of the arch directory suggested
by Alan;
c) Make these 3 patches as a separate patch set since there are
not not related to the ARM/ARM64 platform.
Hanjun Guo (5):
ACPI / idle: Make idle_boot_override depend on x86 and ia64
ACPI / processor_core: Rework _PDC related stuff to make it more
arch
BAD_MADT_ENTRY() is arch independent and will be used for all
archs which parsing MADT table, so move it to linux/acpi.h to
simply the code.
Signed-off-by: Hanjun Guo hanjun@linaro.org
---
arch/ia64/kernel/acpi.c |4
arch/x86/kernel/acpi/boot.c |4
include/linux/acpi.h
1 - 100 of 2962 matches
Mail list logo
