Re: [PATCH 01/14] ARM: dts: sun8i: Add SID node

Hello, thank you for the review. On 24.6.2016 04:41, Chen-Yu Tsai wrote: > On Fri, Jun 24, 2016 at 3:20 AM, wrote: >> From: Josef Gajdusek >> >> Add a node describing the Security ID memory to the Allwinner H3 .dtsi file. >> >> Signed-off-by: Josef Gajdusek

Re: [PATCH 03/14] thermal: Add support for sun8i THS on Allwinner H3

an <meg...@megous.com> >> > > The subject could read: > > thermal: sun8i_ths: Add support for the thermal sensor on Allwinner H3 > >> This patch adds support for the sun8i thermal sensor on >> Allwinner H3 SoC. >> >> Signed-off-by: Ondřej Jirman <meg

Re: [PATCH v2 04/14] regulator: SY8106A regulator driver

On 26.6.2016 13:26, Mark Brown wrote: > On Sat, Jun 25, 2016 at 05:45:01AM +0200, meg...@megous.com wrote: >> From: Ondrej Jirman >> >> SY8106A is I2C attached single output voltage regulator >> made by Silergy. > > I'm missing almost all of this series, I've just got this and

Re: [PATCH v2 05/14] dt-bindings: document SY8106A regulator driver

On 26.6.2016 13:27, Mark Brown wrote: > On Sat, Jun 25, 2016 at 05:45:02AM +0200, meg...@megous.com wrote: >> From: Ondrej Jirman >> >> This patch adds the binding documentation for the >> sy8106a regulator driver. > > Please submit patches using subject lines reflecting the

Re: [PATCH 06/14] ARM: dts: sun8i: Add cpu0 label to sun8i-h3.dtsi

Hello, comments below. On 24.6.2016 05:48, Chen-Yu Tsai wrote: > On Fri, Jun 24, 2016 at 3:20 AM, wrote: >> From: Ondrej Jirman >> >> Add label to the first cpu so that it can be referenced >> from derived dts files. >> >> Signed-off-by: Ondrej Jirman

Re: [PATCH 03/14] thermal: Add support for sun8i THS on Allwinner H3

On 24.6.2016 05:09, Chen-Yu Tsai wrote: >> +static int sun8i_ths_h3_init(struct platform_device *pdev, >> +struct sun8i_ths_data *data) >> +{ >> + int ret; >> + size_t callen; >> + s32 *caldata; >> + >> + data->busclk = devm_clk_get(>dev, "ahb");

Re: [PATCH 07/14] regulator: SY8106A regulator driver

OR_WM8994) += wm8994-regulator.o >> - >> +obj-$(CONFIG_REGULATOR_SY8106A) += sy8106a-regulator.o > > Follow the existing ordering in the Makefile. > >> >> ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG >> diff --git a/drivers/regulator/sy8106a-regulator.

Re: [PATCH 03/14] thermal: Add support for sun8i THS on Allwinner H3

On 25.6.2016 02:54, Chen-Yu Tsai wrote: > On Sat, Jun 25, 2016 at 8:35 AM, Ondřej Jirman <meg...@megous.com> wrote: >> On 24.6.2016 05:09, Chen-Yu Tsai wrote: >>>> +static int sun8i_ths_h3_init(struct platform_device *pdev, >>>> +

Re: [linux-sunxi] [PATCH 13/14] ARM: dts: sun8i: Add gpio-regulator used on Orange Pi One

Hi Julian, thank you for the review. You're right. I added the pinctrl client nodes. Also the patches were split incorrectly, so I fixed that too. regards, Ondrej On 24.6.2016 04:51, Julian Calaby wrote: > Hi Ondrej, > > On Fri, Jun 24, 2016 at 5:21 AM, wrote: >> From:

Re: [PATCH 06/14] ARM: dts: sun8i: Add cpu0 label to sun8i-h3.dtsi

On 25.6.2016 09:02, Maxime Ripard wrote: > On Sat, Jun 25, 2016 at 09:02:48AM +0800, Chen-Yu Tsai wrote: >> On Sat, Jun 25, 2016 at 6:51 AM, Ondřej Jirman <meg...@megous.com> wrote: >>> Hello, >>> >>> comments below. >>> >>> On 24.6.2016

Re: [PATCH v2 02/14] thermal: sun8i_ths: Add support for the thermal sensor on Allwinner H3

On 25.6.2016 09:10, Maxime Ripard wrote: > On Sat, Jun 25, 2016 at 05:44:59AM +0200, meg...@megous.com wrote: >> From: Ondrej Jirman <meg...@megous.com> >> >> This patch adds support for the sun8i thermal sensor on >> Allwinner H3 SoC. >> >> Si

Re: [PATCH v2 01/14] ARM: clk: sunxi: Add driver for the H3 THS clock

Hi Maxime, I try to base everything on the torvalds's kernel. I did notice the patches. Is there some main git tree/branch where this work is tracked in? I'd gladly use it. Also there's a PLL1 rate application patch, that would need to be ported to the new CCU code, in the case I would use it

Re: Changed: sunxi-ng clock code - NKMP clock implementation is wrong

Hi Maxime, I don't have your sunxi-ng clock patches in my mailbox, so I'm replying to this. On 26.7.2016 08:32, Maxime Ripard wrote: > On Thu, Jul 21, 2016 at 11:52:15AM +0200, Ondřej Jirman wrote: >>>>> If so, then yes, trying to switch to the 24MHz oscillator before >>

Re: [linux-sunxi] [PATCH v2 14/14] ARM: dts: sun8i: Enable DVFS on Orange Pi One

Hello Michal, On 30.6.2016 13:13, Michal Suchanek wrote: > Hello, > > On 25 June 2016 at 05:45, wrote: >> From: Ondrej Jirman >> >> Use Xulong Orange Pi One GPIO based regulator for >> passive cooling and thermal management. >> >> Signed-off-by: Ondrej

Re: Changed: sunxi-ng clock code - NKMP clock implementation is wrong

On 28.7.2016 23:00, Maxime Ripard wrote: > Hi Ondrej, > > On Thu, Jul 28, 2016 at 01:27:05PM +0200, Ondřej Jirman wrote: >> Hi Maxime, >> >> I don't have your sunxi-ng clock patches in my mailbox, so I'm replying >> to this. > > You can find it

Re: Changed: sunxi-ng clock code - NKMP clock implementation is wrong

Hi, On 31.7.2016 12:31, Maxime Ripard wrote: > Hi, > > On Fri, Jul 29, 2016 at 12:01:09AM +0200, Ondřej Jirman wrote: >> On 28.7.2016 23:00, Maxime Ripard wrote: >>> Hi Ondrej, >>> >>> On Thu, Jul 28, 2016 at 01:27:05PM +0200, Ondřej Jirman wrote: &

Re: [PATCH v2 06/14] ARM: sun8i: clk: Add clk-factor rate application method

On 21.7.2016 11:48, Maxime Ripard wrote: > On Fri, Jul 15, 2016 at 12:38:54PM +0200, Ondřej Jirman wrote: >> On 15.7.2016 10:53, Maxime Ripard wrote: >>> On Fri, Jul 01, 2016 at 02:50:57AM +0200, Ondřej Jirman wrote: >>>>>> /** >>>>>>

Re: [PATCH 06/14] ARM: dts: sun8i: Add cpu0 label to sun8i-h3.dtsi

On 25.6.2016 09:02, Maxime Ripard wrote: > On Sat, Jun 25, 2016 at 09:02:48AM +0800, Chen-Yu Tsai wrote: >> On Sat, Jun 25, 2016 at 6:51 AM, Ondřej Jirman <meg...@megous.com> wrote: >>> Hello, >>> >>> comments below. >>> >>> On 24.6.20

Re: [PATCH v2 06/14] ARM: sun8i: clk: Add clk-factor rate application method

On 15.7.2016 10:53, Maxime Ripard wrote: > On Fri, Jul 01, 2016 at 02:50:57AM +0200, Ondřej Jirman wrote: >>>> /** >>>> + * sun8i_h3_apply_pll1_factors() - applies n, k, m, p factors to the >>>> + * register using an algorithm that tries to reserve the PLL

Re: [PATCH v2 06/14] ARM: sun8i: clk: Add clk-factor rate application method

On 15.7.2016 15:27, Jean-Francois Moine wrote: > On Fri, 15 Jul 2016 12:38:54 +0200 > Ondřej Jirman <meg...@megous.com> wrote: > >>> If so, then yes, trying to switch to the 24MHz oscillator before >>> applying the factors, and then switching back when the

Re: [linux-sunxi] Re: [PATCH v2 06/14] ARM: sun8i: clk: Add clk-factor rate application method

On 15.7.2016 16:22, Michal Suchanek wrote: > Hello, > > On 15 July 2016 at 15:48, Ondřej Jirman <meg...@megous.com> wrote: >> >> >> On 15.7.2016 15:27, Jean-Francois Moine wrote: >>> On Fri, 15 Jul 2016 12:38:54 +0200 >>> Ondřej Jirman <meg..

Re: [PATCH v2 04/14] regulator: SY8106A regulator driver

On 27.6.2016 16:54, Mark Brown wrote: > On Sun, Jun 26, 2016 at 05:07:16PM +0200, Ondřej Jirman wrote: >> On 26.6.2016 13:26, Mark Brown wrote: > >>> I'm missing almost all of this series, I've just got this and another >>> patch which look like a standalone

Re: [linux-sunxi] [PATCH v2 14/14] ARM: dts: sun8i: Enable DVFS on Orange Pi One

Hello, On 30.6.2016 13:13, Michal Suchanek wrote: > Hello, > > On 25 June 2016 at 05:45, wrote: >> From: Ondrej Jirman >> >> Use Xulong Orange Pi One GPIO based regulator for >> passive cooling and thermal management. >> >> Signed-off-by: Ondrej Jirman

Re: [linux-sunxi] [PATCH v2 14/14] ARM: dts: sun8i: Enable DVFS on Orange Pi One

On 30.6.2016 17:50, Michal Suchanek wrote: > On 30 June 2016 at 17:16, Michal Suchanek <hramr...@gmail.com> wrote: >> On 30 June 2016 at 16:19, Ondřej Jirman <meg...@megous.com> wrote: >>> Hello, >>> >>> On 30.6.2016 13:13, Michal Suchanek wrote

Re: [linux-sunxi] [PATCH v2 14/14] ARM: dts: sun8i: Enable DVFS on Orange Pi One

On 30.6.2016 17:16, Michal Suchanek wrote: > On 30 June 2016 at 16:19, Ondřej Jirman <meg...@megous.com> wrote: >> Hello, >> >> On 30.6.2016 13:13, Michal Suchanek wrote: >>> Hello, >>> >>> On 25 June 2016 at 05:45, <meg...@megou

Re: [PATCH v2 06/14] ARM: sun8i: clk: Add clk-factor rate application method

On 30.6.2016 22:40, Maxime Ripard wrote: > Hi, > > On Sat, Jun 25, 2016 at 05:45:03AM +0200, meg...@megous.com wrote: >> From: Ondrej Jirman >> >> PLL1 on H3 requires special factors application algorithm, >> when the rate is changed. This algorithm was extracted >> from the

Re: [linux-sunxi] [PATCH v2 14/14] ARM: dts: sun8i: Enable DVFS on Orange Pi One

On 30.6.2016 16:23, Siarhei Siamashka wrote: > On Thu, 30 Jun 2016 13:13:48 +0200 > Michal Suchanek wrote: > >> Hello, >> >> On 25 June 2016 at 05:45, wrote: >>> From: Ondrej Jirman >>> >>> Use Xulong Orange Pi One GPIO based

Re: [PATCH v2 06/14] ARM: sun8i: clk: Add clk-factor rate application method

Hi, On 30.6.2016 22:40, Maxime Ripard wrote: > Hi, > > On Sat, Jun 25, 2016 at 05:45:03AM +0200, meg...@megous.com wrote: >> From: Ondrej Jirman >> >> PLL1 on H3 requires special factors application algorithm, >> when the rate is changed. This algorithm was extracted >> from

Re: [PATCH v2 06/14] ARM: sun8i: clk: Add clk-factor rate application method

On 1.7.2016 07:37, Jean-Francois Moine wrote: > On Fri, 1 Jul 2016 02:50:57 +0200 > Ondřej Jirman <meg...@megous.com> wrote: > >>> Since this is really specific, I guess you could simply make the >>> clk_ops for the nkmp clocks public, and just re-implement set_r

Re: [PATCH 06/14] ARM: dts: sun8i: Add cpu0 label to sun8i-h3.dtsi

On 29.6.2016 22:45, Maxime Ripard wrote: > Hi, > > On Sat, Jun 25, 2016 at 04:50:24PM +0200, Ondřej Jirman wrote: >> On 25.6.2016 09:02, Maxime Ripard wrote: >>> On Sat, Jun 25, 2016 at 09:02:48AM +0800, Chen-Yu Tsai wrote: >>>> On Sat, Jun 25, 2016 at 6:51

Re: [linux-sunxi] [PATCH 1/4] phy: sun4i-usb: support PHY0 on H3 in MUSB mode

Dne 16.1.2017 v 20:14 Icenowy Zheng napsal(a): > The PHY0 on H3 can be wired either to MUSB controller or OHCI/EHCI > controller. > > The original driver wired it to OHCI/EHCI controller; however, as the > code to use PHY0 as OHCI/EHCI is missing, it makes the PHY fully > unusable. > > Rename

Re: [linux-sunxi] [PATCH] clk: sunxi-ng: fix PLL_CPUX adjusting on H3

Dne 18.1.2017 v 17:56 Maxime Ripard napsal(a): >>> What's your current plan to fix that? I guess the easiest (and most >>> likely to be reusable) would be to allow for clock tables, instead of >>> using the generic approach. We might have some other clocks (like >>> audio or video) that would need

Re: [linux-sunxi] [PATCH] clk: sunxi-ng: fix PLL_CPUX adjusting on H3

Hi Maxime, Dne 16.1.2017 v 17:43 Maxime Ripard napsal(a): >> It does lock up quickly with mainline ccu_nkmp_find_best algorithm >> for finding factors. >> >> Even with linux kernel, it breaks. It's just more difficult to hit the >> right conditions. I got oops only right after boot when running

Re: [linux-sunxi] [PATCH 1/3] phy: sun4i: check PHY id when poking unknown bit of pmu

Dne 24.10.2016 v 05:59 Icenowy Zheng napsal(a): > Allwinner SoC's PHY 0, when used as OTG controller, have no pmu part. > The code that poke some unknown bit of PMU for H3/A64 didn't check > the PHY, and will cause kernel oops when PHY 0 is used. > > Fixes: b3e0d141ca9f (phy: sun4i: add support

Re: [linux-sunxi] [PATCH] clk: sunxi-ng: fix PLL_CPUX adjusting on H3

Maxime, Dne 25.11.2016 v 01:28 meg...@megous.com napsal(a): > From: Ondrej Jirman > > When adjusting PLL_CPUX on H3, the PLL is temporarily driven > too high, and the system becomes unstable (oopses or hangs). > > Add a notifier to avoid this situation by temporarily

Re: [linux-sunxi] [PATCH] clk: sunxi-ng: fix PLL_CPUX adjusting on H3

Dne 9.1.2017 v 10:59 Maxime Ripard napsal(a): > On Sat, Jan 07, 2017 at 04:49:18PM +0100, Ondřej Jirman wrote: >> Maxime, >> >> Dne 25.11.2016 v 01:28 meg...@megous.com napsal(a): >>> From: Ondrej Jirman <meg...@megous.com> >>> >>> When a

Re: [linux-sunxi] [PATCH 1/5] clk: sunxi-ng: prevent NKMP clocks from temporarily get higher freq

Hi Icenowy, I already tried this approach to changing CPUX_PLL and it didn't work well. I've written a test program for CPUS (additional RISC-V processor on H3 SoC) for testing various NKMP clock change algorithms, by randomly changing the PLL frequency. Everything except simply not using

Re: [linux-sunxi] [PATCH v3 0/5] Add dual-role OTG support for Allwinner H3

Hi Icenowy, when I was trying to add OTG support I found an issue with powercycling. When I have USB cable connecting PC and the OTG port on the SBC, when the board enables the vbus, it would become impossible to power cycle the board after poweroff. The reason being that when vbus is enabled,

Re: [linux-sunxi] [PATCH v4 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu

Hi Icenowy, icen...@aosc.io píše v Čt 20. 07. 2017 v 16:21 +0800: > 在 2017-07-20 06:59，Ondřej Jirman 写道： > > Hi, > > > > Icenowy Zheng píše v Út 04. 04. 2017 v 17:50 +0800: > > > From: Icenowy Zheng <icen...@aosc.xyz> > > > > > > Now we

Re: [linux-sunxi] [PATCH 10/10] ARM: dts: sun8i: Add SY8106A regulator to Orange Pi PC

Maxime Ripard píše v St 26. 07. 2017 v 13:44 +0200: > Hi, > > On Wed, Jul 26, 2017 at 12:23:48PM +0200, Ondřej Jirman wrote: > > Hi, > > > > icen...@aosc.io píše v St 26. 07. 2017 v 15:36 +0800: > > > > > > > > > > > > > >

Re: [linux-sunxi] [PATCH 10/10] ARM: dts: sun8i: Add SY8106A regulator to Orange Pi PC

Hi, icen...@aosc.io píše v St 26. 07. 2017 v 15:36 +0800: > > > > > > > > > Otherwse > > > > > > > > > + regulator-max-microvolt = <140>; > > > > > + regulator-ramp-delay = <200>; > > > > > > > > Is this an actual constraint of the SoC? Or is it a

Re: [linux-sunxi] [PATCH v4 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu

Hi, Icenowy Zheng píše v Út 04. 04. 2017 v 17:50 +0800: > From: Icenowy Zheng > > Now we have driver for the PRCM CCU, switch to use it instead of > old-style clock nodes for apb0-related clocks in sunxi-h3-h5.dtsi . > > The mux 3 of R_CCU is still the internal oscillator,

Re: [linux-sunxi] [PATCH v2 1/3] media: V3s: Add support for Allwinner CSI.

Hello Yong, I noticed one issue in the register macros. See below. Yong Deng píše v Čt 27. 07. 2017 v 13:01 +0800: > Allwinner V3s SoC have two CSI module. CSI0 is used for MIPI interface > and CSI1 is used for parallel interface. This is not documented in > datasheet but by testing and guess. >

Re: [linux-sunxi] [PATCH v3 1/3] media: V3s: Add support for Allwinner CSI.

Hello, Thanks for your patches. I've been working with CSI on A83T, so I have a few notes. My review is below. :) Yong Deng píše v Po 13. 11. 2017 v 15:30 +0800: > Allwinner V3s SoC have two CSI module. CSI0 is used for MIPI interface > and CSI1 is used for parallel interface. This is not

Re: [linux-sunxi] [PATCH v4 0/2] Initial Allwinner V3s CSI Support

Hello, On Mon, Dec 25, 2017 at 11:15:26AM +0800, Yong wrote: > Hi, > > On Fri, 22 Dec 2017 14:46:48 +0100 > Ondřej Jirman <meg...@megous.com> wrote: > > > Hello, > > > > Yong Deng píše v Pá 22. 12. 2017 v 17:32 +0800: > > > > &g

Re: [linux-sunxi] [PATCH 10/16] iio: adc: sun4i-gpadc-iio: add support for A83T thermal sensor

Hi, On Fri, Jan 26, 2018 at 04:19:35PM +0100, Philipp Rossak wrote: > This patch adds support for the A83T ths sensor. > > The A83T does not support interrupts. This seems to be broken. Though, you use support_irq = true below. And in my tests, IRQ for THS works on A83T. regards, o. > The

Re: [linux-sunxi] [PATCH v4 0/2] Initial Allwinner V3s CSI Support

buffer for next frame before the > the current frame done IRQ triggered. This is not documented > but reported by Ondřej Jirman. > The BSP code has workaround for this too. It skip to mark the > first buffer as frame done for VB2 and pass the second buffer > to CSI in

Re: [linux-sunxi] [PATCH v4 0/2] Initial Allwinner V3s CSI Support

On Thu, Jan 04, 2018 at 03:06:25PM +0100, Maxime Ripard wrote: > On Mon, Dec 25, 2017 at 09:58:02AM +0100, Ondřej Jirman wrote: > > Hello, > > > > On Mon, Dec 25, 2017 at 11:15:26AM +0800, Yong wrote: > > > Hi, > > > > > > On Fri, 22 Dec 2017 14:46

Re: [PATCH v3 1/3] Input: edt-ft5x06 - Add support for regulator

Hello Mylène, On Wed, Jul 18, 2018 at 08:27:17PM +0200, Mylène Josserand wrote: > Add the support of regulator to use it as VCC source. > > Signed-off-by: Mylène Josserand > --- > .../bindings/input/touchscreen/edt-ft5x06.txt | 1 + > drivers/input/touchscreen/edt-ft5x06.c |

Re: [linux-sunxi] [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON

Hi, On Thu, Mar 01, 2018 at 10:34:32PM +0100, Jernej Skrabec wrote: > Currently exclusive TCON clock lock is never released, which, for > example, prevents changing resolution on HDMI. > > In order to fix that, release clock when disabling TCON. TCON is always > disabled first before new mode is

Re: [linux-sunxi] [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON

Hi, On Fri, Mar 09, 2018 at 07:19:33AM +0100, Jernej Škrabec wrote: > Hi, > > Dne petek, 09. marec 2018 ob 01:44:55 CET je Ondřej Jirman napisal(a): > > Hi, > > > > I've debugged this further and it seems that the code has incorrect > > assumptions. See docs

Re: [linux-sunxi] [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON

Hi Jernej, On Thu, Mar 08, 2018 at 11:57:40PM +0100, Jernej Škrabec wrote: > Hi, > > Dne četrtek, 08. marec 2018 ob 23:47:17 CET je Ondřej Jirman napisal(a): > > Hi, > > > > On Thu, Mar 01, 2018 at 10:34:32PM +0100, Jernej Skrabec wrote: > > > Currentl

Re: [linux-sunxi] [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON

(..., 1, false) is called multiple times, which leads to unbalanced calls to clk_set_rate_exclusive and clk_rate_exclusive_put. I don't know how to fix this. regards, o. On Fri, Mar 09, 2018 at 01:13:14AM +0100, 'Ondřej Jirman' via linux-sunxi wrote: > Hi Jernej, > > On Thu, Mar

Re: [v2] drm/sun4i: add lvds mode_valid function

Hello Giulio, this patch breaks LVDS output on A83T. Without it, modesetting works, with it there's no output. Some more info below... On Tue, Mar 13, 2018 at 12:20:19PM +0100, Giulio Benetti wrote: > mode_valid function is missing for lvds. > > Add it making it pointed by encoder helper

Re: [v2] drm/sun4i: add lvds mode_valid function

Hello, On Thu, Apr 19, 2018 at 04:02:08PM +0200, Giulio Benetti wrote: > Hi everybody, > > Il 19/04/2018 15:36, Chen-Yu Tsai ha scritto: > > On Thu, Apr 19, 2018 at 9:34 PM, Ondřej Jirman > > <doudahwezomiechah...@xff.cz> wrote: > > > Hello Giulio, > &

Re: [PATCH v6 00/11] Sunxi: Add SMP support on A83T

Hello Mylène, Please also add this: diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index ce53ceaf4cc5..d9c8ecf88ec6 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -51,7 +51,7 @@ config MACH_SUN9I config ARCH_SUNXI_MC_SMP bool

Re: [linux-sunxi] [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON

Hi, On Thu, Mar 01, 2018 at 10:34:32PM +0100, Jernej Skrabec wrote: > Currently exclusive TCON clock lock is never released, which, for > example, prevents changing resolution on HDMI. > > In order to fix that, release clock when disabling TCON. TCON is always > disabled first before new mode is

Re: [linux-sunxi] [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON

Hi Jernej, On Thu, Mar 08, 2018 at 11:57:40PM +0100, Jernej Škrabec wrote: > Hi, > > Dne četrtek, 08. marec 2018 ob 23:47:17 CET je Ondřej Jirman napisal(a): > > Hi, > > > > On Thu, Mar 01, 2018 at 10:34:32PM +0100, Jernej Skrabec wrote: > > > Currentl

Re: [linux-sunxi] [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON

(..., 1, false) is called multiple times, which leads to unbalanced calls to clk_set_rate_exclusive and clk_rate_exclusive_put. I don't know how to fix this. regards, o. On Fri, Mar 09, 2018 at 01:13:14AM +0100, 'Ondřej Jirman' via linux-sunxi wrote: > Hi Jernej, > > On Thu, Mar

Re: [linux-sunxi] [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON

Hi, On Fri, Mar 09, 2018 at 07:19:33AM +0100, Jernej Škrabec wrote: > Hi, > > Dne petek, 09. marec 2018 ob 01:44:55 CET je Ondřej Jirman napisal(a): > > Hi, > > > > I've debugged this further and it seems that the code has incorrect > > assumptions. See docs

Re: [linux-sunxi] [PATCH v4 0/2] Initial Allwinner V3s CSI Support

On Thu, Jan 04, 2018 at 03:06:25PM +0100, Maxime Ripard wrote: > On Mon, Dec 25, 2017 at 09:58:02AM +0100, Ondřej Jirman wrote: > > Hello, > > > > On Mon, Dec 25, 2017 at 11:15:26AM +0800, Yong wrote: > > > Hi, > > > > > > On Fri, 22 De

Re: [linux-sunxi] [PATCH v4 0/2] Initial Allwinner V3s CSI Support

buffer for next frame before the > the current frame done IRQ triggered. This is not documented > but reported by Ondřej Jirman. > The BSP code has workaround for this too. It skip to mark the > first buffer as frame done for VB2 and pass the second buffer > to CSI in

Re: [linux-sunxi] [PATCH v4 0/2] Initial Allwinner V3s CSI Support

Hello, On Mon, Dec 25, 2017 at 11:15:26AM +0800, Yong wrote: > Hi, > > On Fri, 22 Dec 2017 14:46:48 +0100 > Ondřej Jirman wrote: > > > Hello, > > > > Yong Deng píše v Pá 22. 12. 2017 v 17:32 +0800: > > > > > > Test input 0: > > &g

Re: [linux-sunxi] [PATCH v3 1/3] media: V3s: Add support for Allwinner CSI.

Hello, Thanks for your patches. I've been working with CSI on A83T, so I have a few notes. My review is below. :) Yong Deng píše v Po 13. 11. 2017 v 15:30 +0800: > Allwinner V3s SoC have two CSI module. CSI0 is used for MIPI interface > and CSI1 is used for parallel interface. This is not

Re: [linux-sunxi] [PATCH v2 1/3] media: V3s: Add support for Allwinner CSI.

Hello Yong, I noticed one issue in the register macros. See below. Yong Deng píše v Čt 27. 07. 2017 v 13:01 +0800: > Allwinner V3s SoC have two CSI module. CSI0 is used for MIPI interface > and CSI1 is used for parallel interface. This is not documented in > datasheet but by testing and guess. >

Re: [linux-sunxi] [PATCH 10/10] ARM: dts: sun8i: Add SY8106A regulator to Orange Pi PC

Hi, icen...@aosc.io píše v St 26. 07. 2017 v 15:36 +0800: > > > > > > > > > Otherwse > > > > > > > > > + regulator-max-microvolt = <140>; > > > > > + regulator-ramp-delay = <200>; > > > > > > > > Is this an actual constraint of the SoC? Or is it a

Re: [linux-sunxi] [PATCH 10/10] ARM: dts: sun8i: Add SY8106A regulator to Orange Pi PC

Maxime Ripard píše v St 26. 07. 2017 v 13:44 +0200: > Hi, > > On Wed, Jul 26, 2017 at 12:23:48PM +0200, Ondřej Jirman wrote: > > Hi, > > > > icen...@aosc.io píše v St 26. 07. 2017 v 15:36 +0800: > > > > > > > > > > > > > >

Re: [v2] drm/sun4i: add lvds mode_valid function

Hello, On Thu, Apr 19, 2018 at 04:02:08PM +0200, Giulio Benetti wrote: > Hi everybody, > > Il 19/04/2018 15:36, Chen-Yu Tsai ha scritto: > > On Thu, Apr 19, 2018 at 9:34 PM, Ondřej Jirman > > wrote: > > > Hello Giulio, > > > > > > this patch bre

Re: [PATCH v6 00/11] Sunxi: Add SMP support on A83T

Hello Mylène, Please also add this: diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index ce53ceaf4cc5..d9c8ecf88ec6 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -51,7 +51,7 @@ config MACH_SUN9I config ARCH_SUNXI_MC_SMP bool

Re: [v2] drm/sun4i: add lvds mode_valid function

Hello Giulio, this patch breaks LVDS output on A83T. Without it, modesetting works, with it there's no output. Some more info below... On Tue, Mar 13, 2018 at 12:20:19PM +0100, Giulio Benetti wrote: > mode_valid function is missing for lvds. > > Add it making it pointed by encoder helper

Re: [linux-sunxi] [PATCH v4 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu

Hi, Icenowy Zheng píše v Út 04. 04. 2017 v 17:50 +0800: > From: Icenowy Zheng > > Now we have driver for the PRCM CCU, switch to use it instead of > old-style clock nodes for apb0-related clocks in sunxi-h3-h5.dtsi . > > The mux 3 of R_CCU is still the internal oscillator, which is said to be

Re: [linux-sunxi] [PATCH v4 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu

Hi Icenowy, icen...@aosc.io píše v Čt 20. 07. 2017 v 16:21 +0800: > 在 2017-07-20 06:59，Ondřej Jirman 写道： > > Hi, > > > > Icenowy Zheng píše v Út 04. 04. 2017 v 17:50 +0800: > > > From: Icenowy Zheng > > > > > > Now we have driver for the PRCM

Re: [PATCH] RFC: arm64: arch_timer: Fix timer inconsistency test for A64

Hello Roman, On Tue, Sep 29, 2020 at 02:13:47PM +0300, Roman Stratiienko wrote: > Fixes linux_kselftest:timers_inconsistency-check_arm_64 > > Test logs without the fix: > ''' > binary returned non-zero. Exit code: 1, stderr: , stdout: > Consistent CLOCK_REALTIME > 1601335525:467086804 >

Re: [PATCH] mfd: sun4i-gpadc: Interrupt numbers should start from 1

Hello Maxime, On Thu, Sep 17, 2020 at 03:19:04PM +0200, Maxime Ripard wrote: > Hi, > > On Sat, Sep 12, 2020 at 01:22:00PM +0200, Ondrej Jirman wrote: > > mfd: sun4i-gpadc: Interrupt numbers should start from 1 > > Why? An hwirq with 0 is totally fine > > > This avoids a warning: > > > > [

Re: [PATCH] RFC: sun4i/drm: Swap back U and V channels for DRM_FORMAT_YVU4xx

On Tue, Sep 01, 2020 at 11:30:47PM +0300, Roman Stratiienko wrote: > Fixes: e1ef9006663b ("drm/sun4i: Wire in DE2 YUV support") > Signed-off-by: Roman Stratiienko > > --- > CC: meg...@megous.com > CC: jernej.skra...@gmail.com > CC: linux-su...@googlegroups.com > CC:

Re: [linux-sunxi] [PATCH v2 2/3] rtc: sun6i: Add support for H6 RTC

Hi, On Sat, Aug 24, 2019 at 02:32:32PM +0200, Jernej Škrabec wrote: > Hi! > > Dne torek, 20. avgust 2019 ob 17:19:33 CEST je meg...@megous.com napisal(a): > > From: Ondrej Jirman > > > > RTC on H6 is mostly the same as on H5 and H3. It has slight differences > > mostly in features that are not

Re: [linux-sunxi] [PATCH v2 0/3] Add basic support for RTC on Allwinner H6 SoC

Hi, On Sat, Aug 24, 2019 at 10:06:14AM +0200, Jernej Škrabec wrote: > Dne sobota, 24. avgust 2019 ob 10:04:24 CEST je Jernej Škrabec napisal(a): > > Hi! > > > > Dne torek, 20. avgust 2019 ob 17:19:31 CEST je meg...@megous.com napisal(a): > > > From: Ondrej Jirman > > > > > > I went through the

Re: [linux-sunxi] [PATCH v2 2/3] rtc: sun6i: Add support for H6 RTC

On Sat, Aug 24, 2019 at 02:51:54PM +0200, Jernej Škrabec wrote: > Dne sobota, 24. avgust 2019 ob 14:46:54 CEST je Ondřej Jirman napisal(a): > > Hi, > > > > On Sat, Aug 24, 2019 at 02:32:32PM +0200, Jernej Škrabec wrote: > > > Hi! > > > > > > Dn

Re: [linux-sunxi] [PATCH v2 2/3] rtc: sun6i: Add support for H6 RTC

On Sat, Aug 24, 2019 at 03:16:41PM +0200, Jernej Škrabec wrote: > Dne sobota, 24. avgust 2019 ob 15:05:44 CEST je Ondřej Jirman napisal(a): > > On Sat, Aug 24, 2019 at 02:51:54PM +0200, Jernej Škrabec wrote: > > > Dne sobota, 24. avgust 2019 ob 14:46:54 CEST je Ondřej Jirman napi

Re: [linux-sunxi] [PATCH v2 2/3] rtc: sun6i: Add support for H6 RTC

Hello Jernej, On Sat, Aug 24, 2019 at 11:09:49PM +0200, Jernej Škrabec wrote: > > Visually? > > > > That would explain why it doesn't work for you. The mainline RTC driver > > disables auto-switch feature, and if your board doesn't have a crystal for > > LOSC, RTC will not generate a clock for

Re: [linux-sunxi] [PATCH v2 2/3] rtc: sun6i: Add support for H6 RTC

On Sat, Aug 24, 2019 at 11:36:26PM +0200, Jernej Škrabec wrote: > Dne sobota, 24. avgust 2019 ob 23:27:46 CEST je Ondřej Jirman napisal(a): > > Hello Jernej, > > > > On Sat, Aug 24, 2019 at 11:09:49PM +0200, Jernej Škrabec wrote: > > > > Visually? > &

Re: [PATCH v4 04/10] mailbox: sunxi-msgbox: Add a new mailbox driver

Hi Samuel, On Mon, Aug 19, 2019 at 10:23:05PM -0500, Samuel Holland wrote: > Allwinner sun8i, sun9i, and sun50i SoCs contain a hardware message box > used for communication between the ARM CPUs and the ARISC management > coprocessor. The hardware contains 8 unidirectional 4-message FIFOs. > >

Re: [PATCH v4 04/10] mailbox: sunxi-msgbox: Add a new mailbox driver

Hi, On Tue, Aug 20, 2019 at 08:07:53AM -0500, Samuel Holland wrote: > On 8/20/19 6:18 AM, Ondřej Jirman wrote: > > Hi Samuel, > > > > On Mon, Aug 19, 2019 at 10:23:05PM -0500, Samuel Holland wrote: > >> Allwinner sun8i, sun9i, and sun50i SoCs contain a

Re: [PATCH 3/6] net: stmmac: sun8i: Use devm_regulator_get for PHY regulator

Hi Andrew, On Tue, Aug 20, 2019 at 05:39:39PM +0200, Andrew Lunn wrote: > On Tue, Aug 20, 2019 at 04:53:40PM +0200, meg...@megous.com wrote: > > From: Ondrej Jirman > > > > Use devm_regulator_get instead of devm_regulator_get_optional and rely > > on dummy supply. This avoids NULL checks before

Re: [PATCH 3/6] net: stmmac: sun8i: Use devm_regulator_get for PHY regulator

On Tue, Aug 20, 2019 at 05:39:39PM +0200, Andrew Lunn wrote: > On Tue, Aug 20, 2019 at 04:53:40PM +0200, meg...@megous.com wrote: > > From: Ondrej Jirman > > > > Use devm_regulator_get instead of devm_regulator_get_optional and rely > > on dummy supply. This avoids NULL checks before

Re: [PATCH 3/6] net: stmmac: sun8i: Use devm_regulator_get for PHY regulator

Hi, On Tue, Aug 20, 2019 at 05:57:44PM +0200, Andrew Lunn wrote: > On Tue, Aug 20, 2019 at 05:47:14PM +0200, Ondřej Jirman wrote: > > Hi Andrew, > > > > On Tue, Aug 20, 2019 at 05:39:39PM +0200, Andrew Lunn wrote: > > > On Tue, Aug 20, 2019 at 04:53:40PM

Re: [PATCH 2/6] dt-bindings: net: sun8i-a83t-emac: Add phy-io-supply property

On Tue, Aug 20, 2019 at 11:20:22AM -0500, Rob Herring wrote: > On Tue, Aug 20, 2019 at 9:53 AM wrote: > > > > From: Ondrej Jirman > > > > Some PHYs require separate power supply for I/O pins in some modes > > of operation. Add phy-io-supply property, to allow enabling this > > power supply. > >

Re: [PATCH 2/6] dt-bindings: net: sun8i-a83t-emac: Add phy-io-supply property

On Tue, Aug 20, 2019 at 11:57:06AM -0500, Rob Herring wrote: > On Tue, Aug 20, 2019 at 11:34 AM Ondřej Jirman wrote: > > > > On Tue, Aug 20, 2019 at 11:20:22AM -0500, Rob Herring wrote: > > > On Tue, Aug 20, 2019 at 9:53 AM wrote: > > > > > > > >

Re: [linux-sunxi] [PATCH 0/3] Add basic support for RTC on Allwinner H6 SoC

On Tue, Aug 06, 2019 at 08:30:45PM +0200, megous hlavni wrote: > On Mon, Apr 15, 2019 at 04:18:12PM +0800, Chen-Yu Tsai wrote: > > On Fri, Apr 12, 2019 at 8:07 PM megous via linux-sunxi > > wrote: > > > > > > From: Ondrej Jirman > > > > > > I went through the datasheets for H6 and H5, and

Re: [linux-sunxi] [PATCH 0/3] Add basic support for RTC on Allwinner H6 SoC

On Wed, Aug 07, 2019 at 12:55:02PM +0200, Alexandre Belloni wrote: > Hi, > > On 06/08/2019 20:30:45+0200, Ondřej Jirman wrote: > > Maybe whether XO or DCXO is used also matters if you want to do some fine > > tunning of DCXO (control register has pletny of options), but

Re: [PATCH v3 10/12] arm64: dts: allwinner: h6: Add IR receiver node

Hello Clément, On Tue, May 28, 2019 at 06:14:38PM +0200, Clément Péron wrote: > Allwinner H6 IR is similar to A31 and can use same driver. > > Add support for it. > > Signed-off-by: Clément Péron > --- > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 19 +++ > 1 file changed,

Re: [linux-sunxi] Re: [PATCH v3 10/12] arm64: dts: allwinner: h6: Add IR receiver node

Hello Clément, On Fri, May 31, 2019 at 12:25:32AM +0200, Clément Péron wrote: > Hi Ondrej, > > On Thu, 30 May 2019 at 16:55, Ondřej Jirman wrote: > > > > Hello Clément, > > > > On Tue, May 28, 2019 at 06:14:38PM +0200, Clément Péron wrote: > > > All

Re: [PATCH net-next 0/3] net: stmmac: Convert to phylink

On Mon, Jul 22, 2019 at 01:28:51PM +, Jose Abreu wrote: > From: Ondřej Jirman > Date: Jul/22/2019, 13:42:40 (UTC+00:00) > > > Hello Jose, > > > > On Tue, Jun 11, 2019 at 05:18:44PM +0200, Jose Abreu wrote: > > > [ Hope this diff lo

Re: [PATCH net-next 0/3] net: stmmac: Convert to phylink

On Mon, Jul 22, 2019 at 02:26:45PM +, Jose Abreu wrote: > From: Andrew Lunn > Date: Jul/22/2019, 15:19:43 (UTC+00:00) > > > On Mon, Jul 22, 2019 at 01:58:20PM +, Jose Abreu wrote: > > > From: Andrew Lunn > > > Date: Jul/22/2019, 14:40:23 (UTC+00:00) > > > > > > > Does this mean that

Re: [PATCH v2 13/14] [DO NOT MERGE] arm64: dts: allwinner: h6: Add GPU OPP table

On Fri, Aug 28, 2020 at 02:16:36PM +0200, Clément Péron wrote: > Hi Maxime, > > On Tue, 25 Aug 2020 at 15:35, Maxime Ripard wrote: > > > > Hi Clement, > > > > On Mon, Aug 03, 2020 at 09:54:05AM +0200, Clément Péron wrote: > > > Hi Maxime and All, > > > > > > On Sat, 4 Jul 2020 at 16:56, Clément

Re: [linux-sunxi] [PATCH] drm/sun4i: Fix dsi dcs long write function

On Fri, Aug 28, 2020 at 02:35:26PM +0200, Jernej Škrabec wrote: > Dne petek, 28. avgust 2020 ob 13:24:44 CEST je Ondrej Jirman napisal(a): > > It's writing too much data. regmap_bulk_write expects number of > > register sized chunks to write, not a byte sized length of the > > bounce buffer.

Re: [PATCH 2/2] dt-bindings: arm: sunxi: Fix Orange Pi Zero bindings

Hello Michal, On Mon, Oct 12, 2020 at 08:04:02PM +0200, Michal Suchánek wrote: > On Mon, Oct 12, 2020 at 04:47:53PM +0200, Maxime Ripard wrote: > > On Thu, Oct 08, 2020 at 08:40:06PM +0200, Michal Suchanek wrote: > > > There are two models of Orange Pi zero which are confusingly marketed > > >

Re: [BUG] Error applying setting, reverse things back on lot of devices

Hello Michał, On Sat, Oct 24, 2020 at 01:53:07PM +0200, Michał Mirosław wrote: > On Fri, Oct 23, 2020 at 10:39:43PM +0200, Corentin Labbe wrote: > > On Fri, Oct 23, 2020 at 03:42:01PM +0200, Corentin Labbe wrote: > > > On Wed, Oct 21, 2020 at 08:31:49PM +0200, Corentin Labbe wrote: > > > > [

Re: [PATCH v1] regulator: defer probe when trying to get voltage from unresolved supply

its parent > (like bypassed ones) supply. Return -EPROBE_DEFER when the supply > is expected but not resolved yet. > Tested-by: Ondřej Jirman thank you very much, Ondrej > Fixes: aea6cb99703e ("regulator: resolve supply after creating regulator") > Cc: sta...@vger

Re: [PATCH] i2c: mv64xxx: Add runtime PM support

Hello Samuel, On Thu, Jan 28, 2021 at 10:22:08AM +0100, Wolfram Sang wrote: > On Sun, Jan 03, 2021 at 04:51:46AM -0600, Samuel Holland wrote: > > To save power, gate the clock when the bus is inactive, during system > > sleep, and during shutdown. On some platforms, specifically Allwinner > >

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