The following series implements support for the AMD Cryptographic
Coprocessor (CCP). The AMD CCP provides hardware encryption, hashing
and other related operations.
This patch series is based on the 3.12 kernel.
---
Tom Lendacky (10):
crypto: authenc - Find proper IV address
Update the MAINTAINERS file for the AMD CCP device driver.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
MAINTAINERS |7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 051e4dc..de22604 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -525,6
These routines provide crypto API support for the CMAC mode of AES
on the AMD CCP.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-aes-cmac.c | 355 ++
1 file changed, 355 insertions(+)
create mode 100644 drivers/crypto/ccp/ccp
These routines provide the support for the interface between the crypto API
and the AMD CCP. This includes insuring that requests associated with a
given tfm on the same cpu are processed in the order received.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto
sg_nents does not follow the chain pointer to the chained scatterlist.
Update scatterwalk_sg_chain to set the chain pointer indication bit as is
done by the sg_chain function.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
include/crypto/scatterwalk.h |1 +
1 file changed, 1 insertion
These routines provide crypto API support for SHA1, SHA224 and SHA256
on the AMD CCP. HMAC support for these SHA modes is also provided.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-sha.c | 497 +++
1 file changed, 497
in
crypto_authenc_encrypt function which sets up the callback.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
crypto/authenc.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/crypto/authenc.c b/crypto/authenc.c
index ffce19d..528b00b 100644
--- a/crypto/authenc.c
+++ b
These routines provide crypto API support for the XTS-AES mode of AES
on the AMD CCP.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-aes-xts.c | 285 +++
1 file changed, 285 insertions(+)
create mode 100644 drivers/crypto/ccp
These files provide the ability to configure and build the
AMD CCP device driver and crypto API support.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/Kconfig | 12
drivers/crypto/Makefile |1 +
drivers/crypto/ccp/Kconfig | 23
These routines provide crypto API support for AES on the AMD CCP.
Support for AES modes: ECB, CBC, OFB, CFB and CTR
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-aes.c | 375 +++
1 file changed, 375 insertions(+)
create
These routines provide the support for the interface between the crypto API
and the AMD CCP. This includes insuring that requests associated with a
given tfm on the same cpu are processed in the order received.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto
sg_nents does not follow the chain pointer to the chained scatterlist.
Update scatterwalk_sg_chain to set the chain pointer indication bit as is
done by the sg_chain function.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
include/crypto/scatterwalk.h |1 +
1 file changed, 1 insertion
in
crypto_authenc_encrypt function which sets up the callback.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
crypto/authenc.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/crypto/authenc.c b/crypto/authenc.c
index ffce19d..528b00b 100644
--- a/crypto/authenc.c
+++ b
These routines provide crypto API support for the XTS-AES mode of AES
on the AMD CCP.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-aes-xts.c | 285 +++
1 file changed, 285 insertions(+)
create mode 100644 drivers/crypto/ccp
Update the MAINTAINERS file for the AMD CCP device driver.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
MAINTAINERS |7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 051e4dc..de22604 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -525,6
These files provide the ability to configure and build the
AMD CCP device driver and crypto API support.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/Kconfig | 12
drivers/crypto/Makefile |1 +
drivers/crypto/ccp/Kconfig | 23
Resending because of typo in mailing list address...
The following series implements support for the AMD Cryptographic
Coprocessor (CCP). The AMD CCP provides hardware encryption, hashing
and other related operations.
This patch series is based on the 3.12 kernel.
---
Tom Lendacky (10
These routines provide crypto API support for SHA1, SHA224 and SHA256
on the AMD CCP. HMAC support for these SHA modes is also provided.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-sha.c | 497 +++
1 file changed, 497
These routines provide crypto API support for the CMAC mode of AES
on the AMD CCP.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-aes-cmac.c | 355 ++
1 file changed, 355 insertions(+)
create mode 100644 drivers/crypto/ccp/ccp
These routines provide crypto API support for AES on the AMD CCP.
Support for AES modes: ECB, CBC, OFB, CFB and CTR
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-aes.c | 375 +++
1 file changed, 375 insertions(+)
create
Hi Herbert,
Is the crypto tree the right tree to go through for this support
or would you prefer I go through another tree?
Thanks,
Tom
On Tuesday, November 12, 2013 11:45:59 AM Tom Lendacky wrote:
Resending because of typo in mailing list address...
The following series implements support
On Thursday, December 05, 2013 09:03:02 AM Josh Boyer wrote:
Hi All,
We've had a report [1] of the backtrace below on the latest rawhide
kernel, which is essentially Linus' tree as of yesterday. We aren't
carrying any patches to crypto at the moment. It's basically hitting
the second
Now that scatterwalk_sg_chain sets the chain pointer bit the sg_page
call in scatterwalk_sg_next hits a BUG_ON when CONFIG_DEBUG_SG is
enabled. Use sg_chain_ptr instead of sg_page on a chain entry.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
include/crypto/scatterwalk.h |2 +-
1
When the crypto layer is able to queue up a command for processing
by the CCP on the initial call to ccp_crypto_enqueue_request and
the CCP returns -EBUSY, then if the backlog flag is not set the
command needs to be freed and not added to the active command list.
Signed-off-by: Tom Lendacky
If a CCP command has been queued for processing at the
crypto layer then, when dequeueing it for processing, the
can backlog flag must be set so that the request isn't
lost if the CCP backlog queue limit is reached.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp
Invoke the callback routine associated with the crypto context
if an error is encountered sending the command to the CCP during
backlog processing. This is needed to free any resources used
by the command.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto
insertions(+), 7 deletions(-)
--
Tom Lendacky
--
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On 06/06/2014 01:45 AM, Stephen Rothwell wrote:
Hi all,
After merging the net-next tree, today's linux-next build (powerpc allyesconfig)
failed like this:
drivers/net/ethernet/amd/xgbe/xgbe-dev.c:119:25: fatal error: asm/cputype.h: No
such file or directory
#include asm/cputype.h
The include of asm/cputype.h breaks the powerpc build. This
include was accidentally left in from driver debugging and
can be removed.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/net/ethernet/amd/xgbe/xgbe-dev.c |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers
to be
changed to 'dst'.
I have no hardware to test this, so this is untested.
Yes, this was a cut-and-paste error that was not discovered with my tests. I've
updated my testcases and tested/verified this fix.
Herbert, this should probably go through the cryptodev-2.6 tree right?
Acked-by: Tom Lendacky
Introduce module parameters that allow for disabling of a
crypto algorithm by not registering the algorithm with the
crypto API.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-main.c | 37 +++---
1 file changed, 25 insertions
was not working properly so a single queue is used now.
This patch series is based on the cryptodev-2.6 kernel tree.
---
Tom Lendacky (4):
crypto: ccp - Allow for selective disablement of crypto API algorithms
crypto: ccp - Move HMAC calculation down to ccp ops file
crypto: ccp - Use
Change from scheduling work to scheduling a tasklet to perform
the callback operations.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-dev.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev.c b
Move to a single queue to serialize requests within a tfm. When
testing using IPSec with a large number of network connections
the per cpu tfm queuing logic was not working properly.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-main.c | 164
Move the support to perform an HMAC calculation into
the CCP operations file. This eliminates the need to
perform a synchronous SHA operation used to calculate
the HMAC.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-sha.c | 130
Fix some memory allocations to use the appropriate gfp_t type based
on the CRYPTO_TFM_REQ_MAY_SLEEP flag.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-aes-cmac.c |5 -
drivers/crypto/ccp/ccp-crypto-sha.c |5 -
2 files changed, 8
on the cryptodev-2.6 kernel tree.
---
Tom Lendacky (6):
crypto: ccp - Apply appropriate gfp_t type to memory allocations
crypto: ccp - Cleanup scatterlist usage
crypto: ccp - Check for caller result area before using it
crypto: ccp - Change data length declarations to u64
crypto
For a hash operation, the caller doesn't have to supply a result
area on every call so don't use it / update it if it hasn't
been supplied.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-aes-cmac.c |4 +++-
drivers/crypto/ccp/ccp-crypto-sha.c
operations.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-aes-cmac.c | 21 +++
drivers/crypto/ccp/ccp-crypto-sha.c | 21 +++
drivers/crypto/ccp/ccp-crypto.h | 10 +++--
drivers/crypto/ccp/ccp-ops.c
The CCP cannot be hot-plugged so it will either be there
or it won't. Do not allow the driver to stay loaded if the
CCP does not successfully initialize.
Provide stub routines in the ccp.h file that return -ENODEV
if the CCP has not been configured in the build.
Signed-off-by: Tom Lendacky
Cleanup up the usage of scatterlists to make the code cleaner
and avoid extra memory allocations when not needed.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-aes-cmac.c |6 ++-
drivers/crypto/ccp/ccp-crypto-sha.c | 53
Cleanup the ahash digest invocations to check the init
return code and make use of the finup routine.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-aes-cmac.c |2 +-
drivers/crypto/ccp/ccp-crypto-sha.c |8 ++--
2 files changed, 7
On Tuesday, December 10, 2013 06:02:29 PM Greg Kroah-Hartman wrote:
On Tue, Dec 10, 2013 at 02:46:46PM +, Lendacky, Thomas wrote:
Hi Greg,
This patch is probably not needed in any of the stable branches, but if
you do add it you'll need to also include a patch that changes the use
On Monday, December 09, 2013 10:30:17 PM Jim Davis wrote:
Building with the attached random configuration file,
drivers/built-in.o: In function `ccp_init':
/home/jim/linux/drivers/crypto/ccp/ccp-dev.c:402: undefined reference
to `hwrng_register'
drivers/built-in.o: In function
On Tuesday, December 10, 2013 07:21:36 AM Jim Davis wrote:
Building with the attached random configuration file,
drivers/crypto/ccp/ccp-pci.c: In function ‘ccp_get_msix_irqs’:
drivers/crypto/ccp/ccp-pci.c:44:20: error: array type has incomplete
element type
The following series implements fixes and cleanup for some reported
errors and suggestions (sparse errors, randconfig build errors and
pr_err usage).
This patch series is based on the cryptodev-2.6 kernel tree.
---
Tom Lendacky (3):
crypto: ccp - Fix sparse warnings in ccp-crypto-sha.c
Update the Kconfig to include PCI on the 'depends on'
and add 'select HW_RANDOM' to insure the necessary PCI
and HW_RANDOM functions are available/included in the
build.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/Kconfig |2 +-
drivers/crypto/ccp/Kconfig
The sha initialization data generated the following sparse warnings:
sparse: incorrect type in initializer (different base types)
expected unsigned int
got restricted __be32 [usertype] noident
Change the initialization data type from u32 to __be32.
Signed-off-by: Tom Lendacky
Remove the pr_err calls that are issued during parameter
checking in some AES operations. This will eliminate the
possibility of filling up syslog through these paths.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-crypto-aes-cmac.c |4 +---
drivers/crypto/ccp
On Thursday, December 19, 2013 11:35:09 AM Randy Dunlap wrote:
On 12/10/13 07:34, Tom Lendacky wrote:
On Tuesday, December 10, 2013 07:21:36 AM Jim Davis wrote:
Building with the attached random configuration file,
drivers/crypto/ccp/ccp-pci.c: In function ‘ccp_get_msix_irqs
On 07/24/2014 02:04 AM, Randy Dunlap wrote:
On 07/23/2014 08:08 PM, Stephen Rothwell wrote:
Hi Herbert,
After merging the crypto tree, today's linux-next build (powerpc
ppc64_defconfig) produced these messages:
fs/sysfs/Kconfig:1:error: recursive dependency detected!
fs/sysfs/Kconfig:1:
On 11/03/2014 08:49 AM, Herbert Xu wrote:
On Mon, Nov 03, 2014 at 03:18:29PM +0100, Stephan Mueller wrote:
+ * CRYPTO_ALG_TYPE_DIGEST Raw message digest
+ * CRYPTO_ALG_TYPE_HASHAlias for CRYPTO_ALG_TYPE_DIGEST
+ * CRYPTO_ALG_TYPE_SHASH Synchronous multi-block hash
+
, 2015 at 02:45:30PM +, Tom Lendacky wrote:
I have tested ACPI-enablement patches for the amd-xgbe/amd-xgbe-phy
drivers that I'm about to submit upstream with the V7 patch series
on the AMD Seattle server platform. There does not appear to be support
for the _CCA attribute in this patch series
On 01/16/2015 01:17 AM, Hanjun Guo wrote:
On 2015年01月16日 02:23, Catalin Marinas wrote:
Hi Grant,
On Thu, Jan 15, 2015 at 04:26:20PM +, Grant Likely wrote:
On Wed, Jan 14, 2015 at 3:04 PM, Hanjun Guo hanjun@linaro.org
wrote:
This is the v7 of ACPI core patches for ARM64 based on ACPI
Hi Will,
On 01/16/2015 08:55 AM, Will Deacon wrote:
Hi Tom,
On Fri, Jan 16, 2015 at 02:45:30PM +, Tom Lendacky wrote:
I have tested ACPI-enablement patches for the amd-xgbe/amd-xgbe-phy
drivers that I'm about to submit upstream with the V7 patch series
on the AMD Seattle server platform
On 01/21/2015 09:06 AM, Andrey Ryabinin wrote:
x86_match_cpu() expects array of x86_cpu_ids terminated
with empty element.
Signed-off-by: Andrey Ryabinin a.ryabi...@samsung.com
Acked-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-dev.c | 1 +
1 file changed, 1
On 05/05/2015 11:13 AM, Suravee Suthikulanit wrote:
On 5/5/2015 11:12 AM, Arnd Bergmann wrote:
On Tuesday 05 May 2015 11:09:38 Suravee Suthikulanit wrote:
However, codes in several places are making use of dma_map_ops without
checking if the ops are NULL (i.e.
On 04/01/2015 10:20 AM, Suravee Suthikulpanit wrote:
ACPI v5.1 introduced _CCA object for specifying cache coherency attribute
for devices. This patch implements a logic, which traverses device namespace
to parse the coherency information, and calling the corresponded
arch_setup_dma_ops().
It
in errors/bugs being generated.
The following patches are included in this series:
- Introduce the sg_nents_for_len function
- Update the ccp driver to use the sg_nents_for_len function
This patch series is based on cryptodev-2.6.
---
Tom Lendacky (2):
scatterlist: introduce
to the dma_map_sg() call to successfully map the
sg.
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
include/linux/scatterlist.h |1 +
lib/scatterlist.c | 32
2 files changed, 33 insertions(+)
diff --git a/include/linux/scatterlist.h b/include/linux
() function which
returns only the number of sg entries required to meet the desired
length and supplying that value to dma_map_sg().
Signed-off-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-ops.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git
On 05/27/2015 11:17 PM, Stephen Rothwell wrote:
Hi all,
Today's linux-next merge of the net-next tree got a conflict in
drivers/net/phy/amd-xgbe-phy.c between commit 983942a5eaca
(amd-xgbe-phy: Fix initial mode when autoneg is disabled) from Linus'
tree and commit 7c12aa08779c (amd-xgbe: Move
-by: Tom Lendacky thomas.lenda...@amd.com
---
drivers/crypto/ccp/ccp-platform.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/crypto/ccp/ccp-platform.c
b/drivers/crypto/ccp/ccp-platform.c
index f2e6de3..bb241c3 100644
--- a/drivers/crypto/ccp/ccp-platform.c
+++ b/drivers/crypto/ccp
On 07/13/2015 12:06 AM, Vishnu Pratap Singh wrote:
Hi Tom,
Hi Vishnu,
Can you please share the complete show_mem output, I wanted to know the
reserved
pages value.
sysrq: SysRq : Show Memory
Mem-Info:
active_anon:1427 inactive_anon:161 isolated_anon:0
active_file:524 inactive_file:953
On 10/20/2015 02:33 AM, LABBE Corentin wrote:
Precalculated hash for empty message are now present in hash headers.
This patch just use them.
Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com>
Tested-by: Tom Lendacky <thomas.lenda...@amd.com>
Acked-by: Tom Lendacky &
On 10/12/2015 11:53 AM, LABBE Corentin wrote:
Precalculated hash for empty message are now present in hash headers.
This patch just use them.
Signed-off-by: LABBE Corentin <clabbe.montj...@gmail.com>
Just a minor comment below.
Tested-by: Tom Lendacky <thomas.lenda...@amd.com>
A
Hi Vishnu,
Commit 49abd8c28046 (lib/show_mem.c: add cma reserved information)
causes the following output (last four lines shown):
...
261888 pages RAM
0 pages HighMem/MovableOnly
18446744073709545533 pages reserved
8192 pages cma reserved
The very large pages reserved number is obviously
On 09/30/2015 05:48 AM, Geliang Tang wrote:
Added kfree() to avoid the memory leak when debugfs_create_dir() fails.
Signed-off-by: Geliang Tang <geliangt...@163.com>
Acked-by: Tom Lendacky <thomas.lenda...@amd.com>
---
drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c | 1 +
1 fil
On 09/18/2015 07:57 AM, LABBE Corentin wrote:
Some driver use a modified version of sg_nents_for_len with an
additional parameter bool *chained for knowing if the scatterlist is
chained or not.
So, for removing duplicate code, add sg_nents_len_chained in
lib/scatterlist.c
Signed-off-by: LABBE
On 06/08/2016 05:07 AM, Matt Fleming wrote:
> (Sorry for the delay)
No worries, thanks for all the feedback.
>
> On Thu, 26 May, at 08:45:58AM, Tom Lendacky wrote:
>>
>> The patch in question is patch 6/18 where PAGE_KERNEL is changed to
>> include the _PAGE_ENC att
On 06/08/2016 06:18 AM, Matt Fleming wrote:
> On Tue, 26 Apr, at 05:57:40PM, Tom Lendacky wrote:
>> The EFI tables are not encrypted and need to be accessed as such. Be sure
>> to memmap them without the encryption attribute set. For EFI support that
>> lives outside of the
On 06/13/2016 07:03 AM, Matt Fleming wrote:
> On Thu, 09 Jun, at 11:16:40AM, Tom Lendacky wrote:
>>
>> So maybe something along the lines of an enum that would have entries
>> (initially) like KERNEL_DATA (equal to zero) and EFI_DATA. Others could
>> be added
On 05/25/2016 02:30 PM, Matt Fleming wrote:
> On Tue, 24 May, at 09:54:31AM, Tom Lendacky wrote:
>>
>> I looked into this and this would be a large change also to parse tables
>> and build lists. It occurred to me that this could all be taken care of
>> if the early_
On 06/13/2016 08:51 AM, Matt Fleming wrote:
> On Thu, 09 Jun, at 01:33:30PM, Tom Lendacky wrote:
>>
>> I was trying to play it safe here, but as you say, the firmware should
>> be using our page tables so we can get rid of this call. The problem
>> will actually be if we
On 06/15/2016 08:17 AM, Tom Lendacky wrote:
> On 06/13/2016 08:51 AM, Matt Fleming wrote:
>> On Thu, 09 Jun, at 01:33:30PM, Tom Lendacky wrote:
>>>
[...]
>>
>>> I'll look further into this, but I saw that this area of virtual memory
>>> was mapped un-enc
On 04/12/2016 09:28 AM, Greg Kroah-Hartman wrote:
> On Tue, Apr 12, 2016 at 02:56:52AM +0100, Ben Hutchings wrote:
>> On Sun, 2016-04-10 at 11:34 -0700, Greg Kroah-Hartman wrote:
>>> 4.5-stable review patch. If anyone has any objections, please let me know.
>>
>> I object, because this introduces
For AMD processors that support PAT, set the write-protect cache mode
(_PAGE_CACHE_MODE_WP) entry to the actual write-protect value (x05).
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/mm/pat.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff
Encrypt memory areas in place when possible (e.g. zero page, etc.) so
that special handling isn't needed afterwards.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/kernel/head64.c | 90 +++---
arch/x86/kernel/setup.c |8 +
.
When freeing boot services related memory, since it has been mapped as
un-encrypted, be sure to change the mapping to encrypted for future use.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/include/asm/cacheflush.h |3 +
arch/x86/include/asm/mem_encrypt.h
so that it is used by default
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/include/asm/fixmap.h|7 ++
arch/x86/include/asm/mem_encrypt.h | 18 +++
arch/x86/include/asm/pgtable_types.h | 41 ++---
arch/x86/i
is implies that the hardware will never give the core a
dirty line with this memtype.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/include/asm/fixmap.h|9 +
arch/x86/include/asm/pgtable_types.h |8
arch/x86/mm/ioremap.c
Provide support for Secure Memory Encryption (SME). This initial support
defines the memory encryption mask as a variable for quick access and an
accessor for retrieving the number of physical addressing bits lost if
SME is enabled.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
:
http://support.amd.com/TechDocs/24593.pdf
SME is section 7.10
SEV is section 15.34
This patch series is based off of the master branch of tip.
Commit 8d54fcebd9b3 ("Merge branch 'x86/urgent'")
---
Tom Lendacky (18):
x86: Set the write-protect cache mode for AMD processors
For AMD processors that support PAT, set the write-protect cache mode
(_PAGE_CACHE_MODE_WP) entry to the actual write-protect value (x05).
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/mm/pat.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff
:
http://support.amd.com/TechDocs/24593.pdf
SME is section 7.10
SEV is section 15.34
This patch series is based off of the master branch of tip.
Commit 8d54fcebd9b3 ("Merge branch 'x86/urgent'")
---
Tom Lendacky (18):
x86: Set the write-protect cache mode for AMD processors
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
Documentation/kernel-parameters.txt |3
arch/x86/kernel/asm-offsets.c |2
arch/x86/kernel/mem_encrypt.S | 306 +++
3 files changed, 311 insertions(+)
diff --git a/Docu
the initrd will have been loaded by the boot loader and
will not be encrypted, but the memory that it resides in is marked as
encrypted).
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/include/asm/mem_encrypt.h | 15 ++
arch/x86/mm/mem_encrypt.c
Provide the Kconfig support to build the SME support in the kernel.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/Kconfig |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 7bb1574..13249b5 100644
--- a/arch/x86/K
Update the cpu features to include identifying and reporting on the
Secure Memory Encryption feature.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/include/asm/cpufeature.h |1 +
arch/x86/include/asm/cpufeatures.h |5 -
arch/x86/kernel/cpu/scattered.c
is implies that the hardware will never give the core a
dirty line with this memtype.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/include/asm/fixmap.h|9 +
arch/x86/include/asm/pgtable_types.h |8
arch/x86/mm/ioremap.c
When System Memory Encryption (SME) is enabled, the physical address
space is reduced. Adjust the x86_phys_bits value to reflect this
reduction.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/kernel/cpu/common.c |2 ++
1 file changed, 2 insertions(+)
diff --git
Provide the Kconfig support to build the SME support in the kernel.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/Kconfig |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 7bb1574..13249b5 100644
--- a/arch/x86/K
Provide support for Secure Memory Encryption (SME). This initial support
defines the memory encryption mask as a variable for quick access and an
accessor for retrieving the number of physical addressing bits lost if
SME is enabled.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
so that it is used by default
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/include/asm/fixmap.h|7 ++
arch/x86/include/asm/mem_encrypt.h | 18 +++
arch/x86/include/asm/pgtable_types.h | 41 ++---
arch/x86/i
Update the cpu features to include identifying and reporting on the
Secure Memory Encryption feature.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/include/asm/cpufeature.h |1 +
arch/x86/include/asm/cpufeatures.h |5 -
arch/x86/kernel/cpu/scattered.c
When System Memory Encryption (SME) is enabled, the physical address
space is reduced. Adjust the x86_phys_bits value to reflect this
reduction.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/kernel/cpu/common.c |2 ++
1 file changed, 2 insertions(+)
diff --git
Encrypt memory areas in place when possible (e.g. zero page, etc.) so
that special handling isn't needed afterwards.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/kernel/head64.c | 90 +++---
arch/x86/kernel/setup.c |8 +
-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/include/asm/dma-mapping.h |5 ++-
arch/x86/include/asm/mem_encrypt.h |5 +++
arch/x86/kernel/pci-dma.c | 11 --
arch/x86/kernel/pci-nommu.c|2 +
arch/x86/kernel/pci-swiotlb.c |8 +++--
arch/
.
When freeing boot services related memory, since it has been mapped as
un-encrypted, be sure to change the mapping to encrypted for future use.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/include/asm/cacheflush.h |3 +
arch/x86/include/asm/mem_encrypt.h
Add support to set the memory encryption enable flag on the APs during
realmode initialization. When an AP is started it checks this flag, and
if set, enables memory encryption on its core.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
---
arch/x86/include/asm/msr-index.h
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