On Wed, May 08, 2024 at 05:10:46PM -0700, Charlie Jenkins wrote:
On Wed, Apr 03, 2024 at 04:34:49PM -0700, Deepak Gupta wrote:
envcfg CSR defines enabling bits for cache management instructions and
soon will control enabling for control flow integrity and pointer
masking features.
Control flow
On Wed, Apr 03, 2024 at 04:34:49PM -0700, Deepak Gupta wrote:
> envcfg CSR defines enabling bits for cache management instructions and
> soon will control enabling for control flow integrity and pointer
> masking features.
>
> Control flow integrity enabling for forward cfi and backward cfi are
>
envcfg CSR defines enabling bits for cache management instructions and
soon will control enabling for control flow integrity and pointer
masking features.
Control flow integrity enabling for forward cfi and backward cfi are
controlled via envcfg and thus need to be enabled on per thread basis.
Th
