On Mon, Feb 05, 2024 at 03:34:05PM +, Marc Zyngier wrote:
> Mark Brown wrote:
> > On Mon, Feb 05, 2024 at 09:46:16AM +, Marc Zyngier wrote:
> > > We have had this discussion in the past. This must be based on the
> > > VM's configuration. Guarding the check with the host capability is a
>
On Mon, 05 Feb 2024 12:35:53 +,
Mark Brown wrote:
>
> On Mon, Feb 05, 2024 at 09:46:16AM +, Marc Zyngier wrote:
> > On Sat, 03 Feb 2024 12:25:39 +,
> > Mark Brown wrote:
>
> > > +++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
> > > @@ -25,6 +25,8 @@ static inline void __sysreg_save
On Mon, Feb 05, 2024 at 09:46:16AM +, Marc Zyngier wrote:
> On Sat, 03 Feb 2024 12:25:39 +,
> Mark Brown wrote:
> > +++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
> > @@ -25,6 +25,8 @@ static inline void __sysreg_save_user_state(struct
> > kvm_cpu_context *ctxt)
> > {
> > ctxt_sys
On Sat, 03 Feb 2024 12:25:39 +,
Mark Brown wrote:
>
> GCS introduces a number of system registers for EL1 and EL0, on systems
and EL2.
> with GCS we need to context switch them and expose them to VMMs to allow
> guests to use GCS, as well as describe their fine grained traps to
> nested vir
GCS introduces a number of system registers for EL1 and EL0, on systems
with GCS we need to context switch them and expose them to VMMs to allow
guests to use GCS, as well as describe their fine grained traps to
nested virtualisation. Traps are already disabled.
Signed-off-by: Mark Brown
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ar
