This adds a compatible for H6. H6 VPU supports 10-bit HEVC decoding and
additional AFBC output format for HEVC.
Signed-off-by: Jernej Skrabec
---
Documentation/devicetree/bindings/media/cedrus.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/media
H6 VPU doesn't work if DMA offset is set.
Add a quirk for it.
Signed-off-by: Jernej Skrabec
---
drivers/staging/media/sunxi/cedrus/cedrus.h| 3 +++
drivers/staging/media/sunxi/cedrus/cedrus_hw.c | 3 ++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/
This patch series adds basic support for H6 VPU. VPU itself has some new
features like 10-bit HEVC decoding, support for AFBC output format when
decoding HEVC and IOMMU. However, none of that is currently implemented.
Please take a look.
Best regards,
Jernej
Jernej Skrabec (6):
dt-bindings
This adds the Video engine node for H6. It can use whole DRAM range so
there is no need for reserved memory node.
Signed-off-by: Jernej Skrabec
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i
This introduces a new compatible for the H6 SRAM C1 section, that is
compatible with the SRAM C1 section as found on the A10.
Signed-off-by: Jernej Skrabec
---
Documentation/devicetree/bindings/sram/sunxi-sram.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree
Add a node for H6 SRAM C1 section.
Manual calls it VE SRAM, but for consistency with older SoCs, SRAM C1
name is used.
Signed-off-by: Jernej Skrabec
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts
H6 has improved VPU. It supports 10-bit HEVC decoding and AFBC output
format for HEVC.
Signed-off-by: Jernej Skrabec
---
drivers/staging/media/sunxi/cedrus/cedrus.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c
b/drivers/staging/media
OrangePi Win board contains IR receiver. Enable it.
Signed-off-by: Jernej Skrabec
---
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
b/arch/arm64/boot/dts/allwinner
A64 IR is compatible with A13, so add A64 compatible with A13 as a
fallback.
Signed-off-by: Jernej Skrabec
---
Documentation/devicetree/bindings/media/sunxi-ir.txt | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/sunxi-ir.txt
b
IR on A64 is nothing special and very similar to IR on A13 to the point
that same driver can be used.
Following patches just add necessary DT changes.
Best regards,
Jernej
Igors Makejevs (1):
arm64: dts: allwinner: a64: Add IR node
Jernej Skrabec (2):
media: dt: bindings: sunxi-ir: Add A64
From: Igors Makejevs
IR is similar to that in A13 and can use same driver.
Signed-off-by: Igors Makejevs
Signed-off-by: Jernej Skrabec
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner
Currently media request ioctl operations fail on 64-bit kernel with
32-bit userspace due to missing .compat_ioctl callback.
Because no ioctl command uses any argument, just reuse existing ioctl
handler for compat_ioctl too.
Signed-off-by: Jernej Skrabec
---
drivers/media/media-request.c | 3
Enable HDMI output on all boards which include HDMI connector.
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 33 +
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 33 +
arch/arm/boot/dts/sun8i-h3-nanopi-m1
Add documentation about Allwinner DWC HDMI TX node, found in H3 SoC.
Signed-off-by: Jernej Skrabec
---
.../bindings/display/sunxi/sun4i-drm.txt | 158 -
1 file changed, 157 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/sunxi
When setting the HDMI clock of H3, the PLL_VIDEO clock needs to be set.
Add CLK_SET_RATE_PARENT flag for H3 HDMI clock.
Signed-off-by: Jernej Skrabec
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Allwinner H3 features DesignWare HDMI Transmitter paired with custom
PHY.
Add a glue driver for it.
For now, only video and CEC are supported. Audio will be supported at
a later time.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/Kconfig | 9 +
drivers/gpu/drm/sun4i
.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 09cb5a3e4c71..72969240a9d4 100644
--- a/drivers/gpu
/DWC_HDMI_Controller
Thanks to Jens Kuske, who figured out that it is actually DW HDMI controller
and mapped scrambled register offsets to original ones.
Icenowy Zheng (1):
ARM: sun8i: h3: Add DesignWare HDMI controller node
Jernej Skrabec (6):
drm: bridge: Enable polling hpd event in dw_hdmi
Some custom phys don't support hpd interrupts. Add support for polling
such events.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gp
From: Icenowy Zheng
The H3 SoC has a DesignWare HDMI controller with some Allwinner-specific
glue and custom PHY.
Since H3 and H5 have same HDMI controller, add related device node in
shared dtsi file.
Signed-off-by: Icenowy Zheng
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-h3
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