Some leftover declarations are still in the cedrus_dec header although
they were moved to cedrus_video already. Clean them up.
Signed-off-by: Paul Kocialkowski
---
drivers/staging/media/sunxi/cedrus/cedrus_dec.h | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/staging/media
Hi,
On Tue, 2019-01-08 at 09:16 +0800, Ayaka wrote:
>
> Sent from my iPad
>
> > On Jan 7, 2019, at 5:57 PM, Paul Kocialkowski
> > wrote:
> >
> > Hi,
> >
> > > On Mon, 2019-01-07 at 11:49 +0800, Randy Li wrote:
> > > &
Hi,
On Mon, 2019-01-07 at 11:49 +0800, Randy Li wrote:
> On 12/12/18 8:51 PM, Paul Kocialkowski wrote:
> > Hi,
> >
> > On Wed, 2018-12-05 at 21:59 +0100, Jernej Škrabec wrote:
> >
> > > > +
> > > > +#define V4L2_HEVC
Hi,
On Fri, 2018-12-21 at 17:56 +0100, meg...@megous.com wrote:
> From: Ondrej Jirman
>
> When cedrus_hw_probe is called, v4l2_dev is not yet initialized.
> Use dev_err instead.
Good catch and thanks for the patch!
Acked-by: Paul Kocialkowski
Cheers,
Paul
> Signed-off-by
o be updated one more
> time when pending 4.20 fixes are merged back into our master since
> those patches will move the cedrus mpeg controls to a different header.
I hit the same build issue that Jonas reported already. With the
appropriate fix, this works fine with the cedrus driver.
ture buffer.
Hans, do you want to include that change in a future revision of this
series or should that be a separate follow-up patch?
I'm fine with both options (and could definitely craft the change in
the latter case).
Cheers,
Paul
> > In our sample code we only keep at most one out
Hi,
On Wed, 2018-12-05 at 21:59 +0100, Jernej Škrabec wrote:
> Hi!
>
> Dne petek, 23. november 2018 ob 14:02:08 CET je Paul Kocialkowski napisal(a):
> > This introduces the required definitions for HEVC decoding support with
> > stateless VPUs. The controls associated to
Hi,
On Fri, 2018-12-07 at 22:22 +0100, Jernej Škrabec wrote:
> Hi!
>
> Dne sreda, 05. december 2018 ob 10:24:44 CET je Paul Kocialkowski napisal(a):
> > This adds the Video Engine node for the A64. Since it can map the whole
> > DRAM range, there is no particular need for a
ies:
>
> $ git grep -E "=\s*\{\s*\}"|wc -l
> 1951
>
> The standard-C compliant pattern has about 2500 entries:
>
> $ git grep -E "=\s*\{\s*NULL\s*\}"|wc -l
> 137
> $ git grep -E "=\s*\{\s*0\s*\}"|wc -l
>
x27;. (kzalloc returns null)
>
> While here, remove the memset(), as kzalloc() already zeroes the
> struct.
Good catch, thanks for the patch!
> Signed-off-by: Mauro Carvalho Chehab
Acked-by: Paul Kocialkowski
> ---
> drivers/staging/media/sunxi/cedrus/cedrus.c | 3 ++-
erence frame for another
> + one.
> +
> + .. note::
> +
> + The API currently requires one frame of encoded data per ``OUTPUT``
> buffer,
> + even though some encoded formats may present their data in smaller
> chunks
> + (e.g. H.264's frames can
getting the MPEG-2
> (and later H264/5) state controls right.
Thanks a lot for this change, I'm glad we can take time to properly
stabilize these controls!
For the whole series:
Reviewed-by: Paul Kocialkowski
Cheers,
Paul
> Regards,
>
> Hans
>
> Hans Verkuil (2):
&
Hi,
On Wed, 2018-12-05 at 17:49 +0800, Chen-Yu Tsai wrote:
> On Wed, Dec 5, 2018 at 5:48 PM Paul Kocialkowski
> wrote:
> > Hi,
> >
> > On Wed, 2018-12-05 at 17:45 +0800, Chen-Yu Tsai wrote:
> > > On Wed, Dec 5, 2018 at 5:25 PM Paul Kocialkowski
> > >
Hi,
On Wed, 2018-12-05 at 17:45 +0800, Chen-Yu Tsai wrote:
> On Wed, Dec 5, 2018 at 5:25 PM Paul Kocialkowski
> wrote:
> > Add the H5-specific system control node description to its device-tree
> > with support for the SRAM C1 section, that will be used by the video
>
and H3;
* Corrected the SRAM bases and sizes to the best of our knowledge;
* Dropped cosmetic dt changes already included in the sunxi tree.
Paul Kocialkowski (15):
ARM: dts: sun8i: h3: Fix the system-control register range
ARM: dts: sun8i: a33: Remove unnecessary reserved memory node
ARM: dts
-off-by: Paul Kocialkowski
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index c2da3a3d373a..dbb7e71b6d69 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/sram/sunxi-sram.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/sram/sunxi-sram.txt
b/Documentation/devicetree/bindings/sram/sunxi-sram.txt
index
.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Chen-Yu Tsai
---
drivers/soc/sunxi/sunxi_sram.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c
index 71e3ee4a3f19..fd81a3c0db45 100644
--- a/drivers/soc/sunxi
This adds the H5 SoC compatible to the list of device-tree matches for
the SRAM driver. Since the variant is the same as the A64 (that precedes
the H5), the same variant description is used.
Signed-off-by: Paul Kocialkowski
---
drivers/soc/sunxi/sunxi_sram.c | 4
1 file changed, 4
Just like on the A33, the video engine on the H3 can map any address in
memory, so there is no particular need to have reserved memory at a fixed
address.
As a result, remove the reserved memory node and let the kernel allocate
the CMA pool wherever it sees fit.
Signed-off-by: Paul Kocialkowski
driver use
the node corresponding to the proper SRAM driver (by switching the
syscon label over to each dtsi). This way, we no longer have two
separate nodes for the same register space.
Signed-off-by: Paul Kocialkowski
---
arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
arch/arm/boot/dts/sunxi
.
Signed-off-by: Paul Kocialkowski
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 22
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index b41dc1aab67d..42bfb560b367 100644
--- a
Add the description for the SRAM C1 section to the A64 device-tree.
Since there is no entry for this section in the A64 manual, the base
address and size were only verified to be consistent empirically.
Signed-off-by: Paul Kocialkowski
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 14
This introduces a new compatible for the A64 SRAM C1 section, that is
compatible with the SRAM C1 section as found on the A10.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/sram/sunxi-sram.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a
Add the necessary compatible for supporting the A64 SoC along with a
description of the capabilities of this variant.
Signed-off-by: Paul Kocialkowski
---
drivers/staging/media/sunxi/cedrus/cedrus.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/staging/media/sunxi/cedrus
This introduces two new compatibles for the cedrus driver, for the
A64 and H5 platforms.
Signed-off-by: Paul Kocialkowski
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/media/cedrus.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings
Add the necessary compatible for supporting the H5 SoC along with a
description of the capabilities of this variant.
Signed-off-by: Paul Kocialkowski
---
drivers/staging/media/sunxi/cedrus/cedrus.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/staging/media/sunxi/cedrus
This adds the Video Engine node for the H5. Since it can map the whole
DRAM range, there is no particular need for a reserved memory node
(unlike platforms preceding the A33).
Signed-off-by: Paul Kocialkowski
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 11 +++
1 file changed, 11
This adds the Video Engine node for the A64. Since it can map the whole
DRAM range, there is no particular need for a reserved memory node
(unlike platforms preceding the A33).
Signed-off-by: Paul Kocialkowski
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 11 +++
1 file changed
-by: Paul Kocialkowski
---
arch/arm/boot/dts/sun8i-a33.dtsi | 15 ---
1 file changed, 15 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index c2c10cd4a210..9ac4fae6c10d 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts
Hi,
On Mon, 2018-12-03 at 14:51 +0100, hverkuil-ci...@xs4all.nl wrote:
> From: Hans Verkuil
>
> Replace old reference frame indices by new tag method.
> Signed-off-by: Hans Verkuil
> Reviewed-by: Paul Kocialkowski
I missed it earlier, but we should remember to update the
ng?" etc?
Or just leave it as is because we're all grown up and don't freak out
when a piece of text contains the word "fuck".
I still don't understand why people think that the word "fuck" is what
would keep certain groups from contributing to the Linux ke
Hi,
On Fri, 2018-11-30 at 11:38 +0800, Chen-Yu Tsai wrote:
> On Fri, Nov 16, 2018 at 12:52 AM Chen-Yu Tsai wrote:
> > On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
> > wrote:
> > > Add the H5-specific system control node description to its device-tree
> >
Hi,
On Thu, 2018-11-15 at 23:35 +0800, Chen-Yu Tsai wrote:
> On Thu, Nov 15, 2018 at 10:51 PM Paul Kocialkowski
> wrote:
> > This adds nodes for the Video Engine and the associated reserved memory
> > for the H5. Up to 96 MiB of memory are dedicated to the CMA pool.
> >
0x0-0x4000, 0x4000-0x8000 and so on,
so the issue does not occur.
I've discovered the issue while testing the H.265 series where I had
added the PHYS_OFFSET subtraction and found that the issue applied to
H.264 as well.
Cheers,
Paul
> Signed-off-by: Maxime Ripard
> ---
>
for future codec support.
As a result, remove the global IRQ spin lock.
Signed-off-by: Paul Kocialkowski
Acked-by: Maxime Ripard
---
Changes since v2:
* Rebased on top of the next media tree.
Changes since v1:
* Reworked commit message as suggested by Maxime.
drivers/staging/media/sunxi
Hi,
On Fri, 2018-11-16 at 11:47 +0100, Maxime Ripard wrote:
> On Thu, Nov 15, 2018 at 03:39:55PM +0100, Paul Kocialkowski wrote:
> > We initially introduced a spin lock to ensure that the VPU registers
> > are not accessed concurrently between our setup function and IRQ
> >
for future codec support.
As a result, remove the global IRQ spin lock.
Signed-off-by: Paul Kocialkowski
Acked-by: Maxime Ripard
---
drivers/staging/media/sunxi/cedrus/cedrus.c | 1 -
drivers/staging/media/sunxi/cedrus/cedrus.h | 2 --
drivers/staging/media/sunxi/cedrus
Changes since v1:
* Reworked commit message as suggested by Maxime.
Paul Kocialkowski (1):
media: cedrus: Remove global IRQ spin lock from the driver
drivers/staging/media/sunxi/cedrus/cedrus.c | 1 -
drivers/staging/media/sunxi/cedrus/cedrus.h | 2 --
drivers/staging/media
s: c27bb30e7b6d ("media: v4l: Add definitions for MPEG-2 slice format and
> metadata")
> Signed-off-by: Jonas Karlman
Acked-by: Paul Kocialkowski
Cheers,
Paul
> ---
>
> drivers/media/v4l2-core/v4l2-ctrls.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
igned-off-by: Dan Carpenter
Acked-by: Paul Kocialkowski
Cheers,
Paul
> ---
> drivers/staging/media/sunxi/cedrus/cedrus_hw.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c
> b/drivers/staging/media/
, 4 bits.
Signed-off-by: Paul Kocialkowski
---
Documentation/media/uapi/v4l/biblio.rst | 9 +
.../media/uapi/v4l/extended-controls.rst | 417 ++
.../media/uapi/v4l/pixfmt-compressed.rst | 15 +
.../media/uapi/v4l/vidioc-queryctrl.rst | 18 +
.../media
This introduces support for HEVC/H.265 to the Cedrus VPU driver, with
both uni-directional and bi-directional prediction modes supported.
Field-coded (interlaced) pictures, custom quantization matrices and
10-bit output are not supported at this point.
Signed-off-by: Paul Kocialkowski
.
Cheers!
Paul Kocialkowski (2):
media: v4l: Add definitions for the HEVC slice format and controls
media: cedrus: Add HEVC/H.265 decoding support
Documentation/media/uapi/v4l/biblio.rst | 9 +
.../media/uapi/v4l/extended-controls.rst | 417 ++
.../media/uapi/v4l/pixfmt
Hi,
On Wed, 2018-10-10 at 17:33 +0900, Tomasz Figa wrote:
> Hi Paul,
>
> On Tue, Aug 28, 2018 at 5:02 PM Paul Kocialkowski
> wrote:
> > This introduces the required definitions for HEVC decoding support with
> > stateless VPUs. The controls associated to the HEVC slic
Dear Hans,
Am 22.11.18 um 13:43 schrieb Hans Verkuil:
On 11/16/2018 03:39 PM, Paul Menzel wrote:
On 11/15/18 12:38, Mauro Carvalho Chehab wrote:
Em Thu, 15 Nov 2018 11:42:32 +0100 Paul Menzel escreveu:
I tried to get a Logitech QuickCam USB camera working, but unfortunately, it is
not
gt; >
> > I also removed the 'pad' fields from the mpeg2 control structs (it
> > should never been added in the first place) and aligned the structs
> > to a u32 boundary (u64 for the tag values).
> >
> > Note that this might change further (Paul suggested u
Dear Mauro,
Thank you very much for the quick reply.
On 11/15/18 12:38, Mauro Carvalho Chehab wrote:
> Em Thu, 15 Nov 2018 11:42:32 +0100 Paul Menzel escreveu:
>> I tried to get a Logitech QuickCam USB camera working, but unfortunately, it
>> is
>> not detected
Hi,
Le jeudi 15 novembre 2018 à 23:50 +0800, Chen-Yu Tsai a écrit :
> On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
> wrote:
> > This cosmetic change removes the heading 0 in the video-codec unit
> > address, as it's done for other nodes.
> >
> > Signed-
Hi,
Le vendredi 16 novembre 2018 à 17:47 +0800, Chen-Yu Tsai a écrit :
> On Fri, Nov 16, 2018 at 5:39 PM Maxime Ripard
> wrote:
> > On Thu, Nov 15, 2018 at 03:50:06PM +0100, Paul Kocialkowski wrote:
> > > Now that we have specific nodes for the H3 and H5 system-contro
.
Signed-off-by: Paul Kocialkowski
---
Documentation/devicetree/bindings/sram/sunxi-sram.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/sram/sunxi-sram.txt
b/Documentation/devicetree/bindings/sram/sunxi-sram.txt
index 62dd0748f0ef..c043a6a4011e 100644
This cosmetic change removes the heading 0 in the video-codec unit
address, as it's done for other nodes.
Signed-off-by: Paul Kocialkowski
---
arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boo
there for this purpose) on the H3 and H5.
Some minor cosmetic fixes are also included regarding the video-codec
addresses in the device-tree.
Paul Kocialkowski (15):
ARM: dts: sun8i-a33: Remove heading 0 in video-codec unit address
ARM: dts: sun8i-h3: Remove heading 0 in video-codec unit
This cosmetic change removes the heading 0 in the video-codec unit
address, as it's done for other nodes.
Signed-off-by: Paul Kocialkowski
---
arch/arm/boot/dts/sun8i-a33.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm
-off-by: Paul Kocialkowski
---
arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 35d025af7deb..7157d954fb8c 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts
This adds the H5 SoC compatible to the list of device-tree matches for
the SRAM driver. Since the variant is the same as the A64 (that precedes
the H5), the same variant description is used.
Signed-off-by: Paul Kocialkowski
---
drivers/soc/sunxi/sunxi_sram.c | 4
1 file changed, 4
This introduces a new compatible for the A64 SRAM C1 section, that is
compatible with the SRAM C1 section as found on the A10.
Signed-off-by: Paul Kocialkowski
---
Documentation/devicetree/bindings/sram/sunxi-sram.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree
This introduces two new compatibles for the cedrus driver, for the
A64 and H5 platforms.
Signed-off-by: Paul Kocialkowski
---
Documentation/devicetree/bindings/media/cedrus.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/cedrus.txt
b
Add the description for the SRAM C1 section to the A64 device-tree.
Signed-off-by: Paul Kocialkowski
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts
.
Signed-off-by: Paul Kocialkowski
---
drivers/soc/sunxi/sunxi_sram.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c
index b4b0f3480bd3..afa86b5506eb 100644
--- a/drivers/soc/sunxi/sunxi_sram.c
+++ b/drivers/soc
Add the necessary compatible for supporting the A64 SoC along with a
description of the capabilities of this variant.
Signed-off-by: Paul Kocialkowski
---
drivers/staging/media/sunxi/cedrus/cedrus.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/staging/media/sunxi/cedrus
platform, but it seems safer that way.
Signed-off-by: Paul Kocialkowski
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 25
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index
platform, but it seems safer that way.
Signed-off-by: Paul Kocialkowski
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 25 +++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index
Add the necessary compatible for supporting the H5 SoC along with a
description of the capabilities of this variant.
Signed-off-by: Paul Kocialkowski
---
drivers/staging/media/sunxi/cedrus/cedrus.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/staging/media/sunxi/cedrus
Now that we have specific nodes for the H3 and H5 system-controller
that allow proper access to the EMAC clock configuration register,
we no longer need a common dummy syscon node.
Switch the syscon label over to each platform's dtsi file.
Signed-off-by: Paul Kocialkowski
---
arch/arm/boo
Add the H5-specific system control node description to its device-tree
with support for the SRAM C1 section, that will be used by the video
codec node later on.
Signed-off-by: Paul Kocialkowski
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 22
1 file changed, 22
result, remove the global IRQ spin lock.
Signed-off-by: Paul Kocialkowski
---
drivers/staging/media/sunxi/cedrus/cedrus.c | 1 -
drivers/staging/media/sunxi/cedrus/cedrus.h | 2 --
drivers/staging/media/sunxi/cedrus/cedrus_dec.c | 9 -
drivers/staging/media/sunxi/cedrus
63553.
==
No stream found.
v4l2: ioctl set mute failed: Invalid argument
v4l2: 0 frames successfully processed, 0 frames dropped.
Exiting... (End of file)
```
Do you have an idea, what the issue. I know it worked fine several years
ago.
Kind regards,
Paul
smime.p7s
Description: S/MIME Cryptogr
Hi,
On Thu, 2018-11-15 at 08:49 +0100, Hans Verkuil wrote:
> Mention that the request validation should increment the memory refcount
> of reference buffers so we don't forget to do this.
Thanks for adding this item, we should definitely take care of it before
unstaging.
Ack
Hi,
On Mon, 2018-11-12 at 18:05 -0300, Ezequiel Garcia wrote:
> On Mon, 12 Nov 2018 at 13:52, Paul Kocialkowski
> wrote:
> > Hi,
> >
> > On Sun, 2018-11-11 at 18:26 -0300, Ezequiel Garcia wrote:
> > > On Thu, 2018-10-18 at 15:02 -0300, Ezequiel Garcia wrote:
>
imultaneous
> jobs. Either v4l2_m2m_cancel_job() will wait for the worker, or the
> worker will be unable to run a new job.
>
> Patches apply on top of Request API and the Cedrus VPU
> driver.
>
> Tested with cedrus driver using v4l2-request-test and
> vicodec driver using
longer needed and we
> can get rid of it.
>
> Signed-off-by: Ezequiel Garcia
Acked-by: Paul Kocialkowski
Cheers,
Paul
> ---
> .../staging/media/sunxi/cedrus/cedrus_hw.c| 26 ---
> 1 file changed, 5 insertions(+), 21 deletions(-)
>
> diff --git a/dr
, 88 deletions(-)
> >
>
> Hans, Maxime:
>
> Any feedback for this?
I just tested the whole series with the cedrus driver and everything
looks good!
Removing the interrupt bottom-half in favor of a workqueue in the core
seems like a good way to simplify m2m driver development by avoiding
per-driver workqueues or threaded irqs.
Cheers,
Paul
--
Paul Kocialkowski, Bootlin (formerly Free Electrons)
Embedded Linux and kernel engineering
https://bootlin.com
signature.asc
Description: This is a digitally signed message part
*buf = ctx->dst_bufs[index];
> + struct vb2_buffer *buf;
>
> + if (index < 0)
> + return 0;
Maybe adding a new line here would increase readability?
Cheers,
Paul
> + buf = ctx->dst_bufs[index];
> return buf ? cedrus_buf_addr(buf, &ctx->
r should be used. Otherwise, the hardware can't use
different partly-decoded buffers as references (and the tag API doesn't
allow that either, since a single buffer index is returned for a tag).
What do you think?
Cheers,
Paul
> Regards,
>
> Hans
>
> Changes
rn (void *)v4l2_buffer_get_tag(buf);
That is because we are on a 32-bit architecture here, so pointers are
not 64-bit long, thus we can't have an equivalency between tag and
pointer.
It looks like this isn't used in the following patches, so perhaps it
should be dropped?
Cheers,
Paul
>
commit/?h=request_api&id=dafb7f9aef2fd44991ff1691721ff765a23be27b
So it looks like we won't be needing this one!
Cheers,
Paul
> Signed-off-by: Jean Delvare
> Fixes: c27bb30e7b6d ("media: v4l: Add definitions for MPEG-2 slice format and
> metadata")
> Cc: Paul K
_ptr(struct v4l2_buffer *buf)
> {
> return (void *)v4l2_buffer_get_cookie(buf);
> }
>
> Why not just use __u64? Because the alignment in v4l2_buffer is a nightmare.
> Using __u64 would create holes, made even worse by different struct timeval
> sizes depending on the architect
Hi,
Le mercredi 19 septembre 2018 à 13:28 +0900, Tomasz Figa a écrit :
> On Thu, Sep 13, 2018 at 9:15 PM Paul Kocialkowski wrote:
> > Hi,
> >
> > On Wed, 2018-09-05 at 19:00 -0300, Ezequiel Garcia wrote:
> > > From: Shunqian Zheng
> > >
> > > Ad
Hi,
Le mardi 09 octobre 2018 à 14:58 +0900, Tomasz Figa a écrit :
> Hi Paul,
>
> On Thu, Oct 4, 2018 at 9:40 PM Paul Kocialkowski wrote:
> > Hi Alexandre,
> >
> > Thanks for submitting this second version of the RFC, it is very
> > appreciated! I will try to
Hi,
Le mardi 09 octobre 2018 à 16:36 +0900, Tomasz Figa a écrit :
> On Sat, Oct 6, 2018 at 2:09 AM Paul Kocialkowski wrote:
> > Hi,
> >
> > Le jeudi 04 octobre 2018 à 14:10 -0400, Nicolas Dufresne a écrit :
> > > Le jeudi 04 octobre 2018 à 14:47 +0
Hi,
Le mardi 09 octobre 2018 à 16:30 +0900, Tomasz Figa a écrit :
> On Thu, Oct 4, 2018 at 9:46 PM Paul Kocialkowski wrote:
> >
> > Hi,
> >
> > Here are a few minor suggestion about H.264 controls.
> >
> > Le jeudi 04 octobre 2018 à 17:11 +0900, Alexand
Hi,
Le jeudi 04 octobre 2018 à 14:10 -0400, Nicolas Dufresne a écrit :
> Le jeudi 04 octobre 2018 à 14:47 +0200, Paul Kocialkowski a écrit :
> > > +Instance of struct v4l2_ctrl_h264_scaling_matrix, containing the
> > > scaling
> > > +matrix to use when
ion
> field to the quantization control. The user would be able to set a baseline
> or extended profile thru a (future) profile control, and if 16-bit
> tables are found, and if the hardware supports them, the driver
> would be able to support them.
>
> Another option, which mig
Hi,
On Thu, 2018-09-13 at 14:14 +0200, Paul Kocialkowski wrote:
> Hi,
>
> On Wed, 2018-09-05 at 19:00 -0300, Ezequiel Garcia wrote:
> > From: Shunqian Zheng
> >
> > Add V4L2_CID_JPEG_QUANTIZATION compound control to allow userspace
> > configure the JPEG qua
ster..
>
> (or just do a sed -E s,\\bcedrus_check_format\\b,cedrus_find_format,g as
> a separate patch)
>
> and get rid of cedrus_check_format() for good.
Agreed, the name is probably explicit enough anyway. I probably should
have done that in the first place anyway.
Cheers,
Paul
--
Deve
INTERVAL control already.
In addition to these points, I see that among all the JPEG profiles,
some have to do with arithmetic coding which will probably require a
specific control on its own (not sure how it should look at this point
though).
What do you think?
Cheers,
Paul
> +``V4L2_CID_JP
support
Cheers!
Paul Kocialkowski (2):
media: v4l: Add definitions for the HEVC slice format and controls
media: cedrus: Add HEVC/H.265 decoding support
.../media/uapi/v4l/extended-controls.rst | 416 ++
.../media/uapi/v4l/pixfmt-compressed.rst | 15 +
.../media/uapi
x27;d be best to merge
both matrices into a single control.
What do you think?
Paul
> Signed-off-by: Shunqian Zheng
> Signed-off-by: Ezequiel Garcia
> ---
> Documentation/media/uapi/v4l/extended-controls.rst | 13 +
> drivers/media/v4l2-core/v4l2-ctrls.c
ack any
> new state information and repeat the process.
>
> That said, I'm not sure if the cedrus driver for example can handle this
> at the moment. It is also inefficient and it won't work if codecs require
> more than one buffer in the queue for whatever reason.
>
Hi,
On Wed, 2018-08-22 at 14:33 -0300, Ezequiel Garcia wrote:
> On Wed, 2018-08-22 at 16:10 +0200, Paul Kocialkowski wrote:
> > Hi,
> >
> > On Tue, 2018-08-21 at 17:52 +0900, Tomasz Figa wrote:
> > > Hi Hans, Paul,
> > >
> > > On Mon, Aug 6
Hi,
On Wed, 2018-08-15 at 09:57 -0400, Nicolas Dufresne wrote:
> Le lundi 06 août 2018 à 10:16 +0200, Paul Kocialkowski a écrit :
> > Hi Hans and all,
> >
> > On Sat, 2018-08-04 at 15:50 +0200, Hans Verkuil wrote:
> > > Hi all,
> > >
> > > Whil
Hi,
On Tue, 2018-08-21 at 17:52 +0900, Tomasz Figa wrote:
> Hi Hans, Paul,
>
> On Mon, Aug 6, 2018 at 6:29 PM Paul Kocialkowski
> wrote:
> >
> > On Mon, 2018-08-06 at 11:23 +0200, Hans Verkuil wrote:
> > > On 08/06/2018 11:13 AM, Paul Kocialkowski wrote:
&g
Hi,
[...]
On Wed, 2018-08-15 at 14:51 +0200, Maxime Jourdan wrote:
> Hi Paul, I think we need to go deeper than just exposing the supported
> profiles/levels and also include a way to query the CAPTURE pixel
> formats that are supported for each profile.
>
> Maybe HEVC Main produ
On Mon, 2018-08-06 at 11:23 +0200, Hans Verkuil wrote:
> On 08/06/2018 11:13 AM, Paul Kocialkowski wrote:
> > Hi,
> >
> > On Mon, 2018-08-06 at 10:32 +0200, Hans Verkuil wrote:
> > > On 08/06/2018 10:16 AM, Paul Kocialkowski wrote:
> > > > On Sat, 201
Hi,
On Mon, 2018-08-06 at 10:32 +0200, Hans Verkuil wrote:
> On 08/06/2018 10:16 AM, Paul Kocialkowski wrote:
> > On Sat, 2018-08-04 at 15:50 +0200, Hans Verkuil wrote:
> > > Regarding point 3: I think this should be documented next to the pixel
> > > format. I.e.
&g
er supports for decoding. I would suggest reusing the already-
existing dedicated controls used for encoding for this purpose. For
decoders, they would be used to expose the (read-only) maximum
profile/level that is supported by the hardware and keep using them as a
settable value in a range (matching
5:16:40 2018 -0400
>
> Add support for the 8-bit IR format GUID defined in the Microsoft Kernel
> Streaming Media API.
>
> Reported-by: Paul Menzel
> Signed-off-by: Laurent Pinchart
> Tested-by: Paul Menzel
> Signed-off-by: Mauro Carvalho Chehab
>
> drivers/media
This adds nodes for the Video Engine and the associated reserved memory
for the H3. Up to 96 MiB of memory are dedicated to the CMA pool.
Signed-off-by: Paul Kocialkowski
---
arch/arm/boot/dts/sun8i-h3.dtsi | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm
tream software, the last 96 MiB of the first 256 MiB of RAM are
reserved for this purpose.
Signed-off-by: Paul Kocialkowski
---
arch/arm/boot/dts/sun8i-a33.dtsi | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33
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