Hi Kieran,
On Fri, Nov 17, 2017 at 4:47 PM, Kieran Bingham
wrote:
> Each display list currently allocates an area of DMA memory to store register
> settings for the VSP1 to process. Each of these allocations adds pressure to
> the IPMMU TLB entries.
>
> We can reduce the pressure by pre-allocatin
Each display list currently allocates an area of DMA memory to store register
settings for the VSP1 to process. Each of these allocations adds pressure to
the IPMMU TLB entries.
We can reduce the pressure by pre-allocating larger areas and dividing the area
across multiple bodies represented as a
