Hi Naman,
On 2017-07-24 14:30:52 +0530, Naman Jain wrote:
> i am using renesas soc with video decoder adv7281m
> i have done thr device tree configuration by following dt bindings
> i am getting timeout of reading the phy clock lane, after i start streaming
> and nothing is displayed on the screen
On Mon, Jul 24, 2017 at 3:11 PM, Niklas Söderlund
wrote:
> Hi Naman,
>
> On 2017-07-24 14:30:52 +0530, Naman Jain wrote:
>> i am using renesas soc with video decoder adv7281m
>> i have done thr device tree configuration by following dt bindings
>> i am getting timeout of reading the phy clock lane
Hi Naman,
On 2017-07-24 22:43:06 +0530, Naman Jain wrote:
> On Mon, Jul 24, 2017 at 3:11 PM, Niklas Söderlund
> wrote:
> > Hi Naman,
> >
> > On 2017-07-24 14:30:52 +0530, Naman Jain wrote:
> >> i am using renesas soc with video decoder adv7281m
> >> i have done thr device tree configuration by fo
Hi Niklas,
adv7281m driver powers up the CSI transmitter in s_power(), which is
called before setting up of D-PHY layer of R-Car CSI-2 Receiver.
I shifted the part of code which enables CSI transmitter in adv7281m
(Low Power state to High Speed state) to s_stream() -
if (state->chip_info->flags &
Hi Naman,
On 2017-08-23 00:15:41 +0530, Naman Jain wrote:
> Hi Niklas,
>
> adv7281m driver powers up the CSI transmitter in s_power(), which is
> called before setting up of D-PHY layer of R-Car CSI-2 Receiver.
> I shifted the part of code which enables CSI transmitter in adv7281m
> (Low Power st