In status register, fifo_count is bit[29:17].
(0x1FFF is correctly)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/mmc/host/dw_mmc.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
On Thu, Jan 5, 2012 at 10:12 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
In status register, fifo_count is bit[29:17].
(0x1FFF is correctly)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/mmc/host/dw_mmc.h | 2
Hi Guennadi,
On Wed, Jan 04, 2012 at 03:17:11PM +0100, Guennadi Liakhovetski wrote:
Now, that all users of tmio_mmc_cd_wakeup() have been converted over to
drivers/mmc/core/cd-gpio.c, that function can be removed.
Signed-off-by: Guennadi Liakhovetski g.liakhovet...@gmx.de
Acked-by: Samuel
While running some usual tests on mmc-next, I came across this warning..
[1.379608] [ cut here ]
[1.384552] WARNING: at
/home/svenkatr/views/linux-2.6/kernel/lockdep.c:2980
sysfs_add_file_mode+0x84/0xe8()
[1.394927] Modules linked in:
[1.398223] [c001b364]
Aaron Lu a écrit :
On Wed, Jan 04, 2012 at 04:01:07PM +0100, Matthieu CASTET wrote:
Hi,
our controller set Max Block Length to 3 (4096 byte), but the linux driver
ignore this value [1].
Is there any reason to do that .
The reason is, sd host controller spec defines 3 as reserved, not
Hi,
On Thu, Jan 05 2012, Will Newton wrote:
On Thu, Jan 5, 2012 at 10:12 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
In status register, fifo_count is bit[29:17].
(0x1FFF is correctly)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park
Hi Sylwester,
On 4 January 2012 21:07, Sylwester Nawrocki s.nawro...@samsung.com wrote:
Hi Kgene, Thomas
On 11/08/2011 04:23 PM, Thomas Abraham wrote:
Hi Grant,
On 8 November 2011 02:47, Grant Likely grant.lik...@secretlab.ca wrote:
On Thu, Nov 03, 2011 at 02:06:03AM +0530, Thomas Abraham
Hi Thomas,
On 01/05/2012 04:45 PM, Thomas Abraham wrote:
On Thu, Nov 03, 2011 at 02:06:03AM +0530, Thomas Abraham wrote:
Add device tree based discovery support for Samsung's sdhci controller
Cc: Ben Dooks ben-li...@fluff.org
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
Hi Sylwester,
On 5 January 2012 21:52, Sylwester Nawrocki s.nawro...@samsung.com wrote:
[...]
Sorry for the delaying in completing this patchset. I will redo this
patchset and submit it soon. But 3.3-rc1 looks unlikely.
Ok, thanks. It's fine, there is no rush. I was just curious because we
On Wed, Jan 4, 2012 at 3:46 AM, Ulf Hansson ulf.hans...@stericsson.com wrote:
Dmitry Shmidt wrote:
Signed-off-by: Dmitry Shmidt dimitr...@google.com
---
drivers/mmc/card/block.c | 2 +-
drivers/mmc/core/bus.c | 25 +++--
include/linux/mmc/card.h | 2 +-
3
2012/1/4 Eric W. Biederman ebied...@xmission.com:
Hopefully I have added some relevant Cc's. The sdhci driver attempting
to abuse sysfs and sysfs is refusing to put up with it.
Can someone who understands the sdhci driver take a look at this?
Eric
I forgot to add lspci output. Sorry for
Hi Guennadi,
On Wed, Jan 4, 2012 at 11:17 PM, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
On ARM the same clock is used by the PM subsystem and by the driver
directly. This leads to the clock staying permanently on, independent of
the runtime PM state. This patch makes clock enable and
On Wed, Jan 4, 2012 at 11:17 PM, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
Now, that all users of tmio_mmc_cd_wakeup() have been converted over to
drivers/mmc/core/cd-gpio.c, that function can be removed.
Signed-off-by: Guennadi Liakhovetski g.liakhovet...@gmx.de
---
On Wed, Jan 4, 2012 at 11:17 PM, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
If the platform specified a GPIO number and IRQ trigger polarity flags, use
the generic MMC GPIO card hotplug helper.
Signed-off-by: Guennadi Liakhovetski g.liakhovet...@gmx.de
---
Hi, Chris
I worked one patch to replace this patch based on yours.
But, the other two patches will be posted because they has been affected by the
new hooks.
-Original Message-
From: Chris Ball [mailto:c...@laptop.org]
Sent: Tuesday, January 03, 2012 10:12 AM
To: Wolfram Sang
Cc:
And I have one question,
This group patches has five, and this version will only include 3/5, 4/5, 5/5.
Can I repost the 1/5 and 2/5? These two patches has no changes.
-Original Message-
From: Chris Ball [mailto:c...@laptop.org]
Sent: Tuesday, January 03, 2012 10:12 AM
To: Wolfram
changes in v9:
Updated the changes suggested by Chris for kernel coding comaptibility
changes in v8:
Updated the changes suggested by Philip for bus mode test.
changes in v7:
Updated with review comments for minor changes in host conditional
handling. added the
This patch adds the support of the HS200 bus speed for eMMC 4.5 devices.
The eMMC 4.5 devices have support for 200MHz bus speed. The function
prototype of the tuning function is modified to handle the tuning command
number which is different in sd and mmc case.
cc: Chris Ball c...@laptop.org
This patch adds support for the HS200 mode on the host side.
Also enables the tuning feature required when the HS200 mode
is selected.
cc: Chris Ball c...@laptop.org
Signed-off-by: Girish K S girish.shivananja...@linaro.org
---
drivers/mmc/host/sdhci.c | 45
From: Jerry Huang chang-ming.hu...@freescale.com
For some FSL ESDHC controller(e.g. P2020E, Rev1.0), the SDHC can not work on
DMA mode because of the hardware bug, so we set a broken dma flag and use
PIO mode.
Signed-off-by: Gao Guanhua b22...@freescale.com
Signed-off-by: Jerry Huang
From: Jerry Huang chang-ming.hu...@freescale.com
The below patches are the workaround for FSL's eSDHC controller.
the patches (3/5, 4/5, 5/5) are modified based on Chris's hook patch,
the other patches (1/5, 2/5) have no any change.
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
--
From: Jerry Huang chang-ming.hu...@freescale.com
When access the card on some FSL platform board (e.g p2020, p1010, mpc8536),
the following error is reported with the timeout value calculated:
mmc0: Got data interrupt 0x0020 even though no data operation was
in progress.
mmc0: Got data
From: Jerry Huang chang-ming.hu...@freescale.com
For FSL ESDHC controllor, when enter the sleep, the controller will power off,
therefore the register will lost its valuse, and driver should save value of
register during suspend and used during resume.
Signed-off-by: Jerry Huang
From: Jerry Huang chang-ming.hu...@freescale.com
SD card read was failing (data crc error)on some cards at
maximum possible frequency on P1010(CCB frequency set to 400MHz).
Some clock deviations are also observed at this frequency.
Hence reduced the mmc clock freq.
Signed-off-by: Priyanka Jain
From: Jerry Huang chang-ming.hu...@freescale.com
When linux is booted with DMA mode enabled in esdhc module on P1010,
there were following errors:
mmc0: ADMA error
mmc0: error -5 whilst initialising SD card
It is because FSL ESDHC controller has different bit setting for PROCTL
register, when
Hello, Chris,
Do you have any concern for this patch?
Best Regards,
Shaohui Xie
-Original Message-
From: Xie Shaohui-B21989
Sent: Thursday, December 29, 2011 4:33 PM
To: linux-mmc@vger.kernel.org
Cc: linuxppc-...@lists.ozlabs.org; Xie Shaohui-B21989
Subject: [PATCH][v2] mmc:sdhci:
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