On Sat, Apr 14, 2012 at 7:11 PM, Russell King - ARM Linux
wrote:
> res can be one of several resources, as this variable is re-used several
> times during probe. This can cause the wrong resource parameters to be
> passed to release_mem_region().
>
> Get the original memory resource before callin
Hi all,
I've tested (temporary) write-protection feature of eMMC flash.
#1. set the temporary write-protection (using CMD28)
#2. write data to the write-protected area (using dd or similar)
-> gives no error at all.
#3. checking the area confirms that write-protection is working,
On 04/17/2012 06:12 AM, Stephan Uphoff wrote:
Hi Arnd,
On Mon, Apr 16, 2012 at 12:59 PM, Arnd Bergmann wrote:
On Monday 16 April 2012, Stephan Uphoff wrote:
opportunity to plant a few ideas.
In contrast to rotational disks read/write operation overhead and
costs are not symmetric.
While rand
Hi Arnd,
On 04/17/2012 03:59 AM, Arnd Bergmann wrote:
On Monday 16 April 2012, Stephan Uphoff wrote:
opportunity to plant a few ideas.
In contrast to rotational disks read/write operation overhead and
costs are not symmetric.
While random reads are much faster on flash - the number of write
op
Include the linux/mmc/cd-gpio.h header to pickup the prototypes
for the two exported symbols.
This quiets the sparse warnings:
warning: symbol 'mmc_cd_gpio_request' was not declared. Should it be static?
warning: symbol 'mmc_cd_gpio_free' was not declared. Should it be static?
Signed-off-by: H H
Commit 06e8935feb "optimized SDIO IRQ handling for single irq"
introduced some spurious calls to SDIO function interrupt handlers,
such as when the SDIO IRQ thread is started, or the safety check
performed upon a system resume. Let's add a flag to perform the
optimization only when a real interrup
Hi Arnd,
On Mon, Apr 16, 2012 at 12:59 PM, Arnd Bergmann wrote:
> On Monday 16 April 2012, Stephan Uphoff wrote:
>> opportunity to plant a few ideas.
>>
>> In contrast to rotational disks read/write operation overhead and
>> costs are not symmetric.
>> While random reads are much faster on flash
On Mon, 16 Apr 2012, Rafael J. Wysocki wrote:
> On Friday, April 13, 2012, Guennadi Liakhovetski wrote:
> > Hi
> >
> > Just confirming, that the 3 outstanding ARM patches, that I mentioned in
> > recent emails:
> >
> > http://article.gmane.org/gmane.linux.kernel.mmc/12748
> > http://article.gma
Hi,
This commit breaks libertas_sdio suspend:
commit b6ad726e3fe69e1ff3c3b2ad272ba3e4c376cd6a
Author: Ulf Hansson
Date: Thu Oct 13 16:03:58 2011 +0200
mmc: core: Prevent too long response times for suspend
While trying to suspend the mmc host there could still be
ongoing requests
On Monday 16 April 2012, Stephan Uphoff wrote:
> opportunity to plant a few ideas.
>
> In contrast to rotational disks read/write operation overhead and
> costs are not symmetric.
> While random reads are much faster on flash - the number of write
> operations is limited by wearout and garbage col
I really like where this is going and would like to use the
opportunity to plant a few ideas.
In contrast to rotational disks read/write operation overhead and
costs are not symmetric.
While random reads are much faster on flash - the number of write
operations is limited by wearout and garbage co
On Monday 16 April 2012 15:25:55 Shashidhar Hiremath wrote:
> Hi,
> is the 8bit bus width supported by the hardware ?
yes. I works with just fine with a chromeos 3.0 kernel and 3.1 kernel (from nv-
tegra.nvidia.com).
Marc
>
> On Fri, Apr 13, 2012 at 11:29 PM, Marc Dietrich wrote:
> > Hi,
> >
On Friday, April 13, 2012, Guennadi Liakhovetski wrote:
> Hi
>
> Just confirming, that the 3 outstanding ARM patches, that I mentioned in
> recent emails:
>
> http://article.gmane.org/gmane.linux.kernel.mmc/12748
> http://article.gmane.org/gmane.linux.ports.sh.devel/13535
> http://article.gmane.
Hi,
is the 8bit bus width supported by the hardware ?
On Fri, Apr 13, 2012 at 11:29 PM, Marc Dietrich wrote:
> Hi,
>
> I'm running linux-next on a tegra-sdhci host which has a Toshiba
> THGBM2G6D2FBAI9 eMMC connected. During boot I get a "mmc1: power class
> selection to bus width 8 failed" war
This macro is not used anymove in atmel-mci driver. It has been removed
by a patch that was dealing with dw_dmac.c e2b35f3:
(dmaengine/dw_dmac: Fix dw_dmac user drivers to adapt to slave_config changes)
We are now using the dmaengine API to specify the slave DMA parameters:
dmaengine_slave_config(
On 04/15/2012 04:59 PM, Sujit Reddy Thumma wrote:
On Sun, 15 Apr 2012, Sujit Reddy Thumma wrote:
Hi Nicolas,
Commit 06e8935feb "optimized SDIO IRQ handling for single irq"
introduced some spurious calls to SDIO function interrupt handlers,
such as when the SDIO IRQ thread is started, or t
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